[llvm] [DAG] Improve known bits of Zext/Sext loads with range metadata (PR #80829)

[David Sherwood via llvm-commits]

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@@ -3612,32 +3612,42 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
           }
         }
       }
-    } else if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
-      // If this is a ZEXTLoad and we are looking at the loaded value.
-      EVT VT = LD->getMemoryVT();
-      unsigned MemBits = VT.getScalarSizeInBits();
-      Known.Zero.setBitsFrom(MemBits);
-    } else if (const MDNode *Ranges = LD->getRanges()) {
-      EVT VT = LD->getValueType(0);
-
-      // TODO: Handle for extending loads
-      if (LD->getExtensionType() == ISD::NON_EXTLOAD) {
+    } else if (Op.getResNo() == 0) {
+      KnownBits Known0(!LD->getMemoryVT().isScalableVT()
+                           ? LD->getMemoryVT().getSizeInBits()
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david-arm wrote:

nit: Can you call `getFixedSizeInBits` here instead given we know it's fixed-width? I think it's a bit clearer and it does have a compile-time advantage too because it avoids going through the more expensive TypeSize->uint64_t cast operator, which is a function call.

https://github.com/llvm/llvm-project/pull/80829