[llvm] R11 not preserved with PAC-M and AAPCS frame chain defect fix (PR #81249)

[via llvm-commits]

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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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``````````bash
git-clang-format --diff c227eca73970c65d9663e6d65abe3f9daef2a25f bae9fcda4b064f7e2137b9e0a1045e691c44558e -- llvm/lib/Target/ARM/ARMBaseRegisterInfo.h llvm/lib/Target/ARM/ARMSubtarget.cpp llvm/lib/Target/ARM/ARMSubtarget.h
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
index 95c108ed9d..71f23edaad 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
@@ -78,9 +78,13 @@ static inline bool isSplitFPArea1Register(unsigned Reg,
   switch (Reg) {
     case R0:  case R1:  case R2:  case R3:
     case R4:  case R5:  case R6:  case R7:
-    case R8:  case R9: case SP:  case PC:
+    case R8:
+    case R9:
+    case SP:
+    case PC:
       return true;
-    case R10: case R12:
+    case R10:
+    case R12:
       return !SplitFramePushPop;
     case LR:
       return SplitFramePushPop;
@@ -94,14 +98,15 @@ static inline bool isSplitFPArea2Register(unsigned Reg,
   using namespace ARM;
 
   switch (Reg) {
-    case R10: case R12:
-      return SplitFramePushPop;
-    case R11:
-      return true;
-    case LR:
-      return !SplitFramePushPop;
-    default:
-      return false;
+  case R10:
+  case R12:
+    return SplitFramePushPop;
+  case R11:
+    return true;
+  case LR:
+    return !SplitFramePushPop;
+  default:
+    return false;
   }
 }
 
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index 3a28a2cc04..39cb39a365 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -496,9 +496,11 @@ bool ARMSubtarget::ignoreCSRForAllocationOrder(const MachineFunction &MF,
 
 bool ARMSubtarget::splitFramePointerPush(const MachineFunction &MF) const {
   const Function &F = MF.getFunction();
-  const std::vector<CalleeSavedInfo> CSI = MF.getFrameInfo().getCalleeSavedInfo();
+  const std::vector<CalleeSavedInfo> CSI =
+      MF.getFrameInfo().getCalleeSavedInfo();
 
-  if (CSI.size() > 1 && MF.getInfo<ARMFunctionInfo>()->shouldSignReturnAddress()) {
+  if (CSI.size() > 1 &&
+      MF.getInfo<ARMFunctionInfo>()->shouldSignReturnAddress()) {
     bool r11InCSI = false;
     bool lrInCSI = false;
     unsigned long r11Idx = 0;
@@ -507,13 +509,12 @@ bool ARMSubtarget::splitFramePointerPush(const MachineFunction &MF) const {
       if (CSI[i].getReg() == ARM::LR) {
         lrIdx = i;
         lrInCSI = true;
-      }
-      else if (CSI[i].getReg() == ARM::R11) {
+      } else if (CSI[i].getReg() == ARM::R11) {
         r11Idx = i;
         r11InCSI = true;
       }
     }
-    if (lrIdx +1 != r11Idx && r11InCSI && lrInCSI)
+    if (lrIdx + 1 != r11Idx && r11InCSI && lrInCSI)
       return true;
   }
 
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h
index 19dac4ffcb..09a32a45df 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.h
+++ b/llvm/lib/Target/ARM/ARMSubtarget.h
@@ -445,7 +445,8 @@ public:
   /// to lr. This is always required on Thumb1-only targets, as the push and
   /// pop instructions can't access the high registers.
   bool splitFramePushPop(const MachineFunction &MF) const {
-    if (MF.getInfo<ARMFunctionInfo>()->shouldSignReturnAddress() && !createAAPCSFrameChain())
+    if (MF.getInfo<ARMFunctionInfo>()->shouldSignReturnAddress() &&
+        !createAAPCSFrameChain())
       return true;
     return (getFramePointerReg() == ARM::R7 &&
             MF.getTarget().Options.DisableFramePointerElim(MF)) ||

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https://github.com/llvm/llvm-project/pull/81249