[llvm] 758fd59 - [DirectX][NFC] Change usage pattern *Dxil* to *DXIL* for uniformity (#80778)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 8 10:02:36 PST 2024
Author: S. Bharadwaj Yadavalli
Date: 2024-02-08T10:02:32-08:00
New Revision: 758fd59d018fe01262dd246e3e1e3d4389cb82e4
URL: https://github.com/llvm/llvm-project/commit/758fd59d018fe01262dd246e3e1e3d4389cb82e4
DIFF: https://github.com/llvm/llvm-project/commit/758fd59d018fe01262dd246e3e1e3d4389cb82e4.diff
LOG: [DirectX][NFC] Change usage pattern *Dxil* to *DXIL* for uniformity (#80778)
Match DXIL TableGen class names with structure names in DXIL Emitter.
Delete unnecessary Name field.
Added:
Modified:
llvm/lib/Target/DirectX/DXIL.td
llvm/lib/Target/DirectX/DXILMetadata.cpp
llvm/utils/TableGen/DXILEmitter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index aec64607e24602..3f3ace5a1a3a36 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -14,28 +14,28 @@
include "llvm/IR/Intrinsics.td"
// Abstract representation of the class a DXIL Operation belongs to.
-class DxilOpClass<string name> {
+class DXILOpClass<string name> {
string Name = name;
}
// Abstract representation of the category a DXIL Operation belongs to
-class DxilOpCategory<string name> {
+class DXILOpCategory<string name> {
string Name = name;
}
-def UnaryClass : DxilOpClass<"Unary">;
-def BinaryClass : DxilOpClass<"Binary">;
-def FlattenedThreadIdInGroupClass : DxilOpClass<"FlattenedThreadIdInGroup">;
-def ThreadIdInGroupClass : DxilOpClass<"ThreadIdInGroup">;
-def ThreadIdClass : DxilOpClass<"ThreadId">;
-def GroupIdClass : DxilOpClass<"GroupId">;
+def UnaryClass : DXILOpClass<"Unary">;
+def BinaryClass : DXILOpClass<"Binary">;
+def FlattenedThreadIdInGroupClass : DXILOpClass<"FlattenedThreadIdInGroup">;
+def ThreadIdInGroupClass : DXILOpClass<"ThreadIdInGroup">;
+def ThreadIdClass : DXILOpClass<"ThreadId">;
+def GroupIdClass : DXILOpClass<"GroupId">;
-def BinaryUintCategory : DxilOpCategory<"Binary uint">;
-def UnaryFloatCategory : DxilOpCategory<"Unary float">;
-def ComputeIDCategory : DxilOpCategory<"Compute/Mesh/Amplification shader">;
+def BinaryUintCategory : DXILOpCategory<"Binary uint">;
+def UnaryFloatCategory : DXILOpCategory<"Unary float">;
+def ComputeIDCategory : DXILOpCategory<"Compute/Mesh/Amplification shader">;
// The parameter description for a DXIL operation
-class DxilOpParameter<int pos, string type, string name, string doc,
+class DXILOpParameter<int pos, string type, string name, string doc,
bit isConstant = 0, string enumName = "",
int maxValue = 0> {
int Pos = pos; // Position in parameter list
@@ -49,16 +49,13 @@ class DxilOpParameter<int pos, string type, string name, string doc,
}
// A representation for a DXIL operation
-class DxilOperationDesc<string name> {
- // TODO : Appears redundant. OpName should serve the same purpose
- string Name = name; // short, unique name
-
+class DXILOperationDesc {
string OpName = ""; // Name of DXIL operation
int OpCode = 0; // Unique non-negative integer associated with the operation
- DxilOpClass OpClass; // Class of the operation
- DxilOpCategory OpCategory; // Category of the operation
+ DXILOpClass OpClass; // Class of the operation
+ DXILOpCategory OpCategory; // Category of the operation
string Doc = ""; // Description of the operation
- list<DxilOpParameter> Params = []; // Parameter list of the operation
+ list<DXILOpParameter> Params = []; // Parameter list of the operation
string OverloadTypes = ""; // Overload types, if applicable
string Attributes = ""; // Attribute shorthands: rn=does not access
// memory,ro=only reads from memory,
@@ -73,9 +70,9 @@ class DxilOperationDesc<string name> {
list<string> StatsGroup = [];
}
-class DxilOperation<string name, int opCode, DxilOpClass opClass, DxilOpCategory opCategory, string doc,
- string oloadTypes, string attrs, list<DxilOpParameter> params,
- list<string> statsGroup = []> : DxilOperationDesc<name> {
+class DXILOperation<string name, int opCode, DXILOpClass opClass, DXILOpCategory opCategory, string doc,
+ string oloadTypes, string attrs, list<DXILOpParameter> params,
+ list<string> statsGroup = []> : DXILOperationDesc {
let OpName = name;
let OpCode = opCode;
let Doc = doc;
@@ -90,56 +87,56 @@ class DxilOperation<string name, int opCode, DxilOpClass opClass, DxilOpCategory
// LLVM intrinsic that DXIL operation maps to.
class LLVMIntrinsic<Intrinsic llvm_intrinsic_> { Intrinsic llvm_intrinsic = llvm_intrinsic_; }
-def Sin : DxilOperation<"Sin", 13, UnaryClass, UnaryFloatCategory, "returns sine(theta) for theta in radians.",
+def Sin : DXILOperation<"Sin", 13, UnaryClass, UnaryFloatCategory, "returns sine(theta) for theta in radians.",
"half;float;", "rn",
[
- DxilOpParameter<0, "$o", "", "operation result">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "$o", "value", "input value">
+ DXILOpParameter<0, "$o", "", "operation result">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "$o", "value", "input value">
],
["floats"]>,
LLVMIntrinsic<int_sin>;
-def UMax : DxilOperation< "UMax", 39, BinaryClass, BinaryUintCategory, "unsigned integer maximum. UMax(a,b) = a > b ? a : b",
+def UMax : DXILOperation< "UMax", 39, BinaryClass, BinaryUintCategory, "unsigned integer maximum. UMax(a,b) = a > b ? a : b",
"i16;i32;i64;", "rn",
[
- DxilOpParameter<0, "$o", "", "operation result">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "$o", "a", "input value">,
- DxilOpParameter<3, "$o", "b", "input value">
+ DXILOpParameter<0, "$o", "", "operation result">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "$o", "a", "input value">,
+ DXILOpParameter<3, "$o", "b", "input value">
],
["uints"]>,
LLVMIntrinsic<int_umax>;
-def ThreadId : DxilOperation< "ThreadId", 93, ThreadIdClass, ComputeIDCategory, "reads the thread ID", "i32;", "rn",
+def ThreadId : DXILOperation< "ThreadId", 93, ThreadIdClass, ComputeIDCategory, "reads the thread ID", "i32;", "rn",
[
- DxilOpParameter<0, "i32", "", "thread ID component">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "i32", "component", "component to read (x,y,z)">
+ DXILOpParameter<0, "i32", "", "thread ID component">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "i32", "component", "component to read (x,y,z)">
]>,
LLVMIntrinsic<int_dx_thread_id>;
-def GroupId : DxilOperation< "GroupId", 94, GroupIdClass, ComputeIDCategory, "reads the group ID (SV_GroupID)", "i32;", "rn",
+def GroupId : DXILOperation< "GroupId", 94, GroupIdClass, ComputeIDCategory, "reads the group ID (SV_GroupID)", "i32;", "rn",
[
- DxilOpParameter<0, "i32", "", "group ID component">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "i32", "component", "component to read">
+ DXILOpParameter<0, "i32", "", "group ID component">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "i32", "component", "component to read">
]>,
LLVMIntrinsic<int_dx_group_id>;
-def ThreadIdInGroup : DxilOperation< "ThreadIdInGroup", 95, ThreadIdInGroupClass, ComputeIDCategory,
+def ThreadIdInGroup : DXILOperation< "ThreadIdInGroup", 95, ThreadIdInGroupClass, ComputeIDCategory,
"reads the thread ID within the group (SV_GroupThreadID)", "i32;", "rn",
[
- DxilOpParameter<0, "i32", "", "thread ID in group component">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "i32", "component", "component to read (x,y,z)">
+ DXILOpParameter<0, "i32", "", "thread ID in group component">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "i32", "component", "component to read (x,y,z)">
]>,
LLVMIntrinsic<int_dx_thread_id_in_group>;
-def FlattenedThreadIdInGroup : DxilOperation< "FlattenedThreadIdInGroup", 96, FlattenedThreadIdInGroupClass, ComputeIDCategory,
+def FlattenedThreadIdInGroup : DXILOperation< "FlattenedThreadIdInGroup", 96, FlattenedThreadIdInGroupClass, ComputeIDCategory,
"provides a flattened index for a given thread within a given group (SV_GroupIndex)", "i32;", "rn",
[
- DxilOpParameter<0, "i32", "", "result">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">
+ DXILOpParameter<0, "i32", "", "result">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">
]>,
LLVMIntrinsic<int_dx_flattened_thread_id_in_group>;
diff --git a/llvm/lib/Target/DirectX/DXILMetadata.cpp b/llvm/lib/Target/DirectX/DXILMetadata.cpp
index db55f25c50774d..2d94490a7f24c3 100644
--- a/llvm/lib/Target/DirectX/DXILMetadata.cpp
+++ b/llvm/lib/Target/DirectX/DXILMetadata.cpp
@@ -213,7 +213,7 @@ class EntryMD {
// FIXME: add signature for profile other than CS.
// See https://github.com/llvm/llvm-project/issues/57928.
MDTuple *Signatures = nullptr;
- return emitDxilEntryPointTuple(
+ return emitDXILEntryPointTuple(
&F, F.getName().str(), Signatures, Resources,
Props.emitDXILEntryProps(RawShaderFlag, Ctx, /*IsLib*/ false), Ctx);
}
@@ -222,7 +222,7 @@ class EntryMD {
// FIXME: add signature for profile other than CS.
// See https://github.com/llvm/llvm-project/issues/57928.
MDTuple *Signatures = nullptr;
- return emitDxilEntryPointTuple(
+ return emitDXILEntryPointTuple(
&F, F.getName().str(), Signatures,
/*entry in lib doesn't need resources metadata*/ nullptr,
Props.emitDXILEntryProps(RawShaderFlag, Ctx, /*IsLib*/ true), Ctx);
@@ -233,13 +233,13 @@ class EntryMD {
static MDTuple *emitEmptyEntryForLib(MDTuple *Resources,
uint64_t RawShaderFlag,
LLVMContext &Ctx) {
- return emitDxilEntryPointTuple(
+ return emitDXILEntryPointTuple(
nullptr, "", nullptr, Resources,
EntryProps::emitEntryPropsForEmptyEntry(RawShaderFlag, Ctx), Ctx);
}
private:
- static MDTuple *emitDxilEntryPointTuple(Function *Fn, const std::string &Name,
+ static MDTuple *emitDXILEntryPointTuple(Function *Fn, const std::string &Name,
MDTuple *Signatures,
MDTuple *Resources,
MDTuple *Properties,
diff --git a/llvm/utils/TableGen/DXILEmitter.cpp b/llvm/utils/TableGen/DXILEmitter.cpp
index 475a57a0cadf86..cb9f9c6b03c636 100644
--- a/llvm/utils/TableGen/DXILEmitter.cpp
+++ b/llvm/utils/TableGen/DXILEmitter.cpp
@@ -30,7 +30,7 @@ struct DXILShaderModel {
int Minor = 0;
};
-struct DXILParam {
+struct DXILParameter {
int Pos; // position in parameter list
ParameterKind Kind;
StringRef Name; // short, unique name
@@ -38,23 +38,21 @@ struct DXILParam {
bool IsConst; // whether this argument requires a constant value in the IR
StringRef EnumName; // the name of the enum type if applicable
int MaxValue; // the maximum value for this parameter if applicable
- DXILParam(const Record *R);
+ DXILParameter(const Record *R);
};
-struct DXILOperationData {
- StringRef Name; // short, unique name
-
- StringRef DXILOp; // name of DXIL operation
- int DXILOpID; // ID of DXIL operation
- StringRef DXILClass; // name of the opcode class
+struct DXILOperationDesc {
+ StringRef OpName; // name of DXIL operation
+ int OpCode; // ID of DXIL operation
+ StringRef OpClass; // name of the opcode class
StringRef Category; // classification for this instruction
StringRef Doc; // the documentation description of this instruction
- SmallVector<DXILParam> Params; // the operands that this instruction takes
+ SmallVector<DXILParameter> Params; // the operands that this instruction takes
StringRef OverloadTypes; // overload types if applicable
StringRef FnAttr; // attribute shorthands: rn=does not access
// memory,ro=only reads from memory
- StringRef Intrinsic; // The llvm intrinsic map to DXILOp. Default is "" which
+ StringRef Intrinsic; // The llvm intrinsic map to OpName. Default is "" which
// means no map exist
bool IsDeriv = false; // whether this is some kind of derivative
bool IsGradient = false; // whether this requires a gradient calculation
@@ -71,11 +69,10 @@ struct DXILOperationData {
int OverloadParamIndex; // parameter index which control the overload.
// When < 0, should be only 1 overload type.
SmallVector<StringRef, 4> counters; // counters for this inst.
- DXILOperationData(const Record *R) {
- Name = R->getValueAsString("Name");
- DXILOp = R->getValueAsString("OpName");
- DXILOpID = R->getValueAsInt("OpCode");
- DXILClass = R->getValueAsDef("OpClass")->getValueAsString("Name");
+ DXILOperationDesc(const Record *R) {
+ OpName = R->getValueAsString("OpName");
+ OpCode = R->getValueAsInt("OpCode");
+ OpClass = R->getValueAsDef("OpClass")->getValueAsString("Name");
Category = R->getValueAsDef("OpCategory")->getValueAsString("Name");
if (R->getValue("llvm_intrinsic")) {
@@ -92,7 +89,7 @@ struct DXILOperationData {
OverloadParamIndex = -1;
for (unsigned I = 0; I < ParamList->size(); ++I) {
Record *Param = ParamList->getElementAsRecord(I);
- Params.emplace_back(DXILParam(Param));
+ Params.emplace_back(DXILParameter(Param));
auto &CurParam = Params.back();
if (CurParam.Kind >= ParameterKind::OVERLOAD)
OverloadParamIndex = I;
@@ -121,7 +118,7 @@ static ParameterKind parameterTypeNameToKind(StringRef Name) {
.Default(ParameterKind::INVALID);
}
-DXILParam::DXILParam(const Record *R) {
+DXILParameter::DXILParameter(const Record *R) {
Name = R->getValueAsString("Name");
Pos = R->getValueAsInt("Pos");
Kind = parameterTypeNameToKind(R->getValueAsString("LLVMType"));
@@ -166,10 +163,9 @@ static std::string parameterKindToString(ParameterKind Kind) {
llvm_unreachable("Unknown llvm::dxil::ParameterKind enum");
}
-static void emitDXILOpEnum(DXILOperationData &DXILOp, raw_ostream &OS) {
+static void emitDXILOpEnum(DXILOperationDesc &Op, raw_ostream &OS) {
// Name = ID, // Doc
- OS << DXILOp.Name << " = " << DXILOp.DXILOpID << ", // " << DXILOp.Doc
- << "\n";
+ OS << Op.OpName << " = " << Op.OpCode << ", // " << Op.Doc << "\n";
}
static std::string buildCategoryStr(StringSet<> &Cetegorys) {
@@ -182,14 +178,14 @@ static std::string buildCategoryStr(StringSet<> &Cetegorys) {
}
// Emit enum declaration for DXIL.
-static void emitDXILEnums(std::vector<DXILOperationData> &DXILOps,
+static void emitDXILEnums(std::vector<DXILOperationDesc> &Ops,
raw_ostream &OS) {
// Sort by Category + OpName.
- llvm::sort(DXILOps, [](DXILOperationData &A, DXILOperationData &B) {
+ llvm::sort(Ops, [](DXILOperationDesc &A, DXILOperationDesc &B) {
// Group by Category first.
if (A.Category == B.Category)
// Inside same Category, order by OpName.
- return A.DXILOp < B.DXILOp;
+ return A.OpName < B.OpName;
else
return A.Category < B.Category;
});
@@ -199,18 +195,18 @@ static void emitDXILEnums(std::vector<DXILOperationData> &DXILOps,
StringMap<StringSet<>> ClassMap;
StringRef PrevCategory = "";
- for (auto &DXILOp : DXILOps) {
- StringRef Category = DXILOp.Category;
+ for (auto &Op : Ops) {
+ StringRef Category = Op.Category;
if (Category != PrevCategory) {
OS << "\n// " << Category << "\n";
PrevCategory = Category;
}
- emitDXILOpEnum(DXILOp, OS);
- auto It = ClassMap.find(DXILOp.DXILClass);
+ emitDXILOpEnum(Op, OS);
+ auto It = ClassMap.find(Op.OpClass);
if (It != ClassMap.end()) {
- It->second.insert(DXILOp.Category);
+ It->second.insert(Op.Category);
} else {
- ClassMap[DXILOp.DXILClass].insert(DXILOp.Category);
+ ClassMap[Op.OpClass].insert(Op.Category);
}
}
@@ -253,18 +249,18 @@ static void emitDXILEnums(std::vector<DXILOperationData> &DXILOps,
}
// Emit map from llvm intrinsic to DXIL operation.
-static void emitDXILIntrinsicMap(std::vector<DXILOperationData> &DXILOps,
+static void emitDXILIntrinsicMap(std::vector<DXILOperationDesc> &Ops,
raw_ostream &OS) {
OS << "\n";
// FIXME: use array instead of SmallDenseMap.
OS << "static const SmallDenseMap<Intrinsic::ID, dxil::OpCode> LowerMap = "
"{\n";
- for (auto &DXILOp : DXILOps) {
- if (DXILOp.Intrinsic.empty())
+ for (auto &Op : Ops) {
+ if (Op.Intrinsic.empty())
continue;
// {Intrinsic::sin, dxil::OpCode::Sin},
- OS << " { Intrinsic::" << DXILOp.Intrinsic
- << ", dxil::OpCode::" << DXILOp.DXILOp << "},\n";
+ OS << " { Intrinsic::" << Op.Intrinsic << ", dxil::OpCode::" << Op.OpName
+ << "},\n";
}
OS << "};\n";
OS << "\n";
@@ -315,20 +311,20 @@ static std::string lowerFirstLetter(StringRef Name) {
return LowerName;
}
-static std::string getDXILOpClassName(StringRef DXILOpClass) {
+static std::string getDXILOpClassName(StringRef OpClass) {
// Lower first letter expect for special case.
- return StringSwitch<std::string>(DXILOpClass)
+ return StringSwitch<std::string>(OpClass)
.Case("CBufferLoad", "cbufferLoad")
.Case("CBufferLoadLegacy", "cbufferLoadLegacy")
.Case("GSInstanceID", "gsInstanceID")
- .Default(lowerFirstLetter(DXILOpClass));
+ .Default(lowerFirstLetter(OpClass));
}
-static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
+static void emitDXILOperationTable(std::vector<DXILOperationDesc> &Ops,
raw_ostream &OS) {
- // Sort by DXILOpID.
- llvm::sort(DXILOps, [](DXILOperationData &A, DXILOperationData &B) {
- return A.DXILOpID < B.DXILOpID;
+ // Sort by OpCode.
+ llvm::sort(Ops, [](DXILOperationDesc &A, DXILOperationDesc &B) {
+ return A.OpCode < B.OpCode;
});
// Collect Names.
@@ -338,18 +334,18 @@ static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
StringMap<SmallVector<ParameterKind>> ParameterMap;
StringSet<> ClassSet;
- for (auto &DXILOp : DXILOps) {
- OpStrings.add(DXILOp.DXILOp.str());
+ for (auto &Op : Ops) {
+ OpStrings.add(Op.OpName.str());
- if (ClassSet.contains(DXILOp.DXILClass))
+ if (ClassSet.contains(Op.OpClass))
continue;
- ClassSet.insert(DXILOp.DXILClass);
- OpClassStrings.add(getDXILOpClassName(DXILOp.DXILClass));
+ ClassSet.insert(Op.OpClass);
+ OpClassStrings.add(getDXILOpClassName(Op.OpClass));
SmallVector<ParameterKind> ParamKindVec;
- for (auto &Param : DXILOp.Params) {
+ for (auto &Param : Op.Params) {
ParamKindVec.emplace_back(Param.Kind);
}
- ParameterMap[DXILOp.DXILClass] = ParamKindVec;
+ ParameterMap[Op.OpClass] = ParamKindVec;
Parameters.add(ParamKindVec);
}
@@ -363,26 +359,25 @@ static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
// OpCodeClassNameIndex,
// OverloadKind::FLOAT | OverloadKind::HALF, Attribute::AttrKind::ReadNone, 0,
// 3, ParameterTableOffset},
- OS << "static const OpCodeProperty *getOpCodeProperty(dxil::OpCode DXILOp) "
+ OS << "static const OpCodeProperty *getOpCodeProperty(dxil::OpCode Op) "
"{\n";
OS << " static const OpCodeProperty OpCodeProps[] = {\n";
- for (auto &DXILOp : DXILOps) {
- OS << " { dxil::OpCode::" << DXILOp.DXILOp << ", "
- << OpStrings.get(DXILOp.DXILOp.str())
- << ", OpCodeClass::" << DXILOp.DXILClass << ", "
- << OpClassStrings.get(getDXILOpClassName(DXILOp.DXILClass)) << ", "
- << getDXILOperationOverload(DXILOp.OverloadTypes) << ", "
- << emitDXILOperationFnAttr(DXILOp.FnAttr) << ", "
- << DXILOp.OverloadParamIndex << ", " << DXILOp.Params.size() << ", "
- << Parameters.get(ParameterMap[DXILOp.DXILClass]) << " },\n";
+ for (auto &Op : Ops) {
+ OS << " { dxil::OpCode::" << Op.OpName << ", "
+ << OpStrings.get(Op.OpName.str()) << ", OpCodeClass::" << Op.OpClass
+ << ", " << OpClassStrings.get(getDXILOpClassName(Op.OpClass)) << ", "
+ << getDXILOperationOverload(Op.OverloadTypes) << ", "
+ << emitDXILOperationFnAttr(Op.FnAttr) << ", " << Op.OverloadParamIndex
+ << ", " << Op.Params.size() << ", "
+ << Parameters.get(ParameterMap[Op.OpClass]) << " },\n";
}
OS << " };\n";
OS << " // FIXME: change search to indexing with\n";
- OS << " // DXILOp once all DXIL op is added.\n";
+ OS << " // Op once all DXIL operations are added.\n";
OS << " OpCodeProperty TmpProp;\n";
- OS << " TmpProp.OpCode = DXILOp;\n";
+ OS << " TmpProp.OpCode = Op;\n";
OS << " const OpCodeProperty *Prop =\n";
OS << " llvm::lower_bound(OpCodeProps, TmpProp,\n";
OS << " [](const OpCodeProperty &A, const "
@@ -394,12 +389,12 @@ static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
OS << "}\n\n";
// Emit the string tables.
- OS << "static const char *getOpCodeName(dxil::OpCode DXILOp) {\n\n";
+ OS << "static const char *getOpCodeName(dxil::OpCode Op) {\n\n";
OpStrings.emitStringLiteralDef(OS,
" static const char DXILOpCodeNameTable[]");
- OS << " auto *Prop = getOpCodeProperty(DXILOp);\n";
+ OS << " auto *Prop = getOpCodeProperty(Op);\n";
OS << " unsigned Index = Prop->OpCodeNameOffset;\n";
OS << " return DXILOpCodeNameTable + Index;\n";
OS << "}\n\n";
@@ -431,14 +426,14 @@ static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
}
static void EmitDXILOperation(RecordKeeper &Records, raw_ostream &OS) {
- std::vector<Record *> Ops = Records.getAllDerivedDefinitions("DxilOperation");
+ std::vector<Record *> Ops = Records.getAllDerivedDefinitions("DXILOperation");
OS << "// Generated code, do not edit.\n";
OS << "\n";
- std::vector<DXILOperationData> DXILOps;
+ std::vector<DXILOperationDesc> DXILOps;
DXILOps.reserve(Ops.size());
for (auto *Record : Ops) {
- DXILOps.emplace_back(DXILOperationData(Record));
+ DXILOps.emplace_back(DXILOperationDesc(Record));
}
OS << "#ifdef DXIL_OP_ENUM\n";
More information about the llvm-commits
mailing list