[llvm] f407be3 - [X86] X86FixupVectorConstants - rename FixupEntry::BitWidth to FixupEntry::MemBitWidth NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 8 08:35:29 PST 2024
Author: Simon Pilgrim
Date: 2024-02-08T16:35:14Z
New Revision: f407be32fe8084fe02c4f16842548d21afdb447f
URL: https://github.com/llvm/llvm-project/commit/f407be32fe8084fe02c4f16842548d21afdb447f
DIFF: https://github.com/llvm/llvm-project/commit/f407be32fe8084fe02c4f16842548d21afdb447f.diff
LOG: [X86] X86FixupVectorConstants - rename FixupEntry::BitWidth to FixupEntry::MemBitWidth NFC.
Make it clearer that this refers to the width of the constant element stored in memory - which won't match the register element width after a sext/zextload
Added:
Modified:
llvm/lib/Target/X86/X86FixupVectorConstants.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86FixupVectorConstants.cpp b/llvm/lib/Target/X86/X86FixupVectorConstants.cpp
index 9b90b5e4bc1ea..32ca9c164c579 100644
--- a/llvm/lib/Target/X86/X86FixupVectorConstants.cpp
+++ b/llvm/lib/Target/X86/X86FixupVectorConstants.cpp
@@ -324,7 +324,7 @@ bool X86FixupVectorConstantsPass::processInstruction(MachineFunction &MF,
struct FixupEntry {
int Op;
int NumCstElts;
- int BitWidth;
+ int MemBitWidth;
std::function<Constant *(const Constant *, unsigned, unsigned, unsigned)>
RebuildConstant;
};
@@ -332,23 +332,23 @@ bool X86FixupVectorConstantsPass::processInstruction(MachineFunction &MF,
#ifdef EXPENSIVE_CHECKS
assert(llvm::is_sorted(Fixups,
[](const FixupEntry &A, const FixupEntry &B) {
- return (A.NumCstElts * A.BitWidth) <
- (B.NumCstElts * B.BitWidth);
+ return (A.NumCstElts * A.MemBitWidth) <
+ (B.NumCstElts * B.MemBitWidth);
}) &&
"Constant fixup table not sorted in ascending constant size");
#endif
assert(MI.getNumOperands() >= (OperandNo + X86::AddrNumOperands) &&
"Unexpected number of operands!");
if (auto *C = X86::getConstantFromPool(MI, OperandNo)) {
- unsigned NumBits = C->getType()->getPrimitiveSizeInBits();
+ unsigned RegBitWidth = C->getType()->getPrimitiveSizeInBits();
for (const FixupEntry &Fixup : Fixups) {
if (Fixup.Op) {
// Construct a suitable constant and adjust the MI to use the new
// constant pool entry.
if (Constant *NewCst = Fixup.RebuildConstant(
- C, NumBits, Fixup.NumCstElts, Fixup.BitWidth)) {
+ C, RegBitWidth, Fixup.NumCstElts, Fixup.MemBitWidth)) {
unsigned NewCPI =
- CP->getConstantPoolIndex(NewCst, Align(Fixup.BitWidth / 8));
+ CP->getConstantPoolIndex(NewCst, Align(Fixup.MemBitWidth / 8));
MI.setDesc(TII->get(Fixup.Op));
MI.getOperand(OperandNo + X86::AddrDisp).setIndex(NewCPI);
return true;
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