[llvm] [BasicAA] Treat different VScale intrinsics as the same value. (PR #81152)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 8 07:50:49 PST 2024
https://github.com/davemgreen created https://github.com/llvm/llvm-project/pull/81152
The last patch of this pr builds upon #81144,
The IR may contain multiple llvm.vscale intrinsics that have not been CSEd.
This patch ensures that multiple vscales can be treated the same, either in the
decomposition of geps and when we subtract one decomposition from another.
>From 4b2f7f830fb3c9478340c95c03a4e2f18c069b09 Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Thu, 8 Feb 2024 12:39:25 +0000
Subject: [PATCH 1/3] [BasicAA] Add extra onevscale test for multiple dependent
geps that lose the NSW flag. NFC
---
llvm/test/Analysis/BasicAA/vscale.ll | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/llvm/test/Analysis/BasicAA/vscale.ll b/llvm/test/Analysis/BasicAA/vscale.ll
index ce0c6f145d1c8..7a28858f4a7ac 100644
--- a/llvm/test/Analysis/BasicAA/vscale.ll
+++ b/llvm/test/Analysis/BasicAA/vscale.ll
@@ -458,11 +458,29 @@ define void @vscale_v1v2types(ptr %p) {
ret void
}
+; CHECK-LABEL: onevscale
+; CHECK-DAG: MustAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp162
+; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp161b
+; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161b, <vscale x 4 x i32>* %vp162
+define void @onevscale(ptr %p) vscale_range(1,16) {
+ %v1 = call i64 @llvm.vscale.i64()
+ %vp1 = mul nsw i64 %v1, 16
+ %vp2 = mul nsw i64 %v1, 16
+ %vp3 = mul nsw i64 %v1, 17
+ %vp161 = getelementptr i8, ptr %p, i64 %vp1
+ %vp162 = getelementptr i8, ptr %p, i64 %vp2
+ %vp161b = getelementptr i8, ptr %vp161, i64 %vp3
+ load <vscale x 4 x i32>, ptr %vp161
+ load <vscale x 4 x i32>, ptr %vp162
+ load <vscale x 4 x i32>, ptr %vp161b
+ ret void
+}
+
; CHECK-LABEL: twovscales
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp162
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp161b
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161b, <vscale x 4 x i32>* %vp162
-define void @twovscales(ptr %p) {
+define void @twovscales(ptr %p) vscale_range(1,16) {
%v1 = call i64 @llvm.vscale.i64()
%v2 = call i64 @llvm.vscale.i64()
%vp1 = mul nsw i64 %v1, 16
>From 6f72723f9b3c6c32077a63e5ad8f6a5449191387 Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Thu, 8 Feb 2024 15:36:02 +0000
Subject: [PATCH 2/3] [BasicAA] Test for Overflow using vscale_range
This extends #80818 when IsNSW is lost (possibly due to looking through
multiple GEPs), to check the vscale_range for an access that will not overflow
even with the maximum range.
---
llvm/lib/Analysis/BasicAliasAnalysis.cpp | 24 +++++++++++++++++-------
llvm/test/Analysis/BasicAA/vscale.ll | 6 +++---
2 files changed, 20 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index ae31814bb0673..0c762317eefbe 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -1173,7 +1173,7 @@ AliasResult BasicAAResult::aliasGEP(
// VScale Alias Analysis - Given one scalable offset between accesses and a
// scalable typesize, we can divide each side by vscale, treating both values
// as a constant. We prove that Offset/vscale >= TypeSize/vscale.
- if (DecompGEP1.VarIndices.size() == 1 && DecompGEP1.VarIndices[0].IsNSW &&
+ if (DecompGEP1.VarIndices.size() == 1 &&
DecompGEP1.VarIndices[0].Val.TruncBits == 0 &&
DecompGEP1.Offset.isZero() &&
PatternMatch::match(DecompGEP1.VarIndices[0].Val.V,
@@ -1183,12 +1183,22 @@ AliasResult BasicAAResult::aliasGEP(
ScalableVar.IsNegated ? -ScalableVar.Scale : ScalableVar.Scale;
LocationSize VLeftSize = Scale.isNegative() ? V1Size : V2Size;
- // Note that we do not check that the typesize is scalable, as vscale >= 1
- // so noalias still holds so long as the dependency distance is at least as
- // big as the typesize.
- if (VLeftSize.hasValue() &&
- Scale.uge(VLeftSize.getValue().getKnownMinValue()))
- return AliasResult::NoAlias;
+ // Check if the offset is known to not overflow, if it does then attempt to
+ // prove it with the known values of vscale_range.
+ bool Overflows = !DecompGEP1.VarIndices[0].IsNSW;
+ if (Overflows) {
+ ConstantRange CR = getVScaleRange(&F, Scale.getBitWidth());
+ (void)CR.getSignedMax().smul_ov(Scale, Overflows);
+ }
+
+ if (!Overflows) {
+ // Note that we do not check that the typesize is scalable, as vscale >= 1
+ // so noalias still holds so long as the dependency distance is at least
+ // as big as the typesize.
+ if (VLeftSize.hasValue() &&
+ Scale.uge(VLeftSize.getValue().getKnownMinValue()))
+ return AliasResult::NoAlias;
+ }
}
// Bail on analysing scalable LocationSize
diff --git a/llvm/test/Analysis/BasicAA/vscale.ll b/llvm/test/Analysis/BasicAA/vscale.ll
index 7a28858f4a7ac..15a2d01c88d3b 100644
--- a/llvm/test/Analysis/BasicAA/vscale.ll
+++ b/llvm/test/Analysis/BasicAA/vscale.ll
@@ -460,8 +460,8 @@ define void @vscale_v1v2types(ptr %p) {
; CHECK-LABEL: onevscale
; CHECK-DAG: MustAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp162
-; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp161b
-; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161b, <vscale x 4 x i32>* %vp162
+; CHECK-DAG: NoAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp161b
+; CHECK-DAG: NoAlias: <vscale x 4 x i32>* %vp161b, <vscale x 4 x i32>* %vp162
define void @onevscale(ptr %p) vscale_range(1,16) {
%v1 = call i64 @llvm.vscale.i64()
%vp1 = mul nsw i64 %v1, 16
@@ -478,7 +478,7 @@ define void @onevscale(ptr %p) vscale_range(1,16) {
; CHECK-LABEL: twovscales
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp162
-; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp161b
+; CHECK-DAG: NoAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp161b
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161b, <vscale x 4 x i32>* %vp162
define void @twovscales(ptr %p) vscale_range(1,16) {
%v1 = call i64 @llvm.vscale.i64()
>From f4a5741425fdf8589e8d57be13d7e9a0f1604981 Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Thu, 8 Feb 2024 15:44:57 +0000
Subject: [PATCH 3/3] [BasicAA] Treat different VScale intrinsics as the same
value.
The IR may contain multiple llvm.vscale intrinsics that have not been CSEd.
This patch ensures that multiple vscales can be treated the same, either in the
decomposition of geps and when we subtrack one decomposition from another.
---
llvm/lib/Analysis/BasicAliasAnalysis.cpp | 12 ++++++++++--
llvm/test/Analysis/BasicAA/vscale.ll | 4 ++--
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 0c762317eefbe..790af79c5b660 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -188,6 +188,12 @@ static bool isObjectSize(const Value *V, TypeSize Size, const DataLayout &DL,
return ObjectSize && *ObjectSize == Size;
}
+/// Return true if both V1 and V2 are VScale
+static bool areBothVScale(const Value *V1, const Value *V2) {
+ return PatternMatch::match(V1, PatternMatch::m_VScale()) &&
+ PatternMatch::match(V2, PatternMatch::m_VScale());
+}
+
//===----------------------------------------------------------------------===//
// CaptureInfo implementations
//===----------------------------------------------------------------------===//
@@ -679,7 +685,8 @@ BasicAAResult::DecomposeGEPExpression(const Value *V, const DataLayout &DL,
// A[x][x] -> x*16 + x*4 -> x*20
// This also ensures that 'x' only appears in the index list once.
for (unsigned i = 0, e = Decomposed.VarIndices.size(); i != e; ++i) {
- if (Decomposed.VarIndices[i].Val.V == LE.Val.V &&
+ if ((Decomposed.VarIndices[i].Val.V == LE.Val.V ||
+ areBothVScale(Decomposed.VarIndices[i].Val.V, LE.Val.V)) &&
Decomposed.VarIndices[i].Val.hasSameCastsAs(LE.Val)) {
Scale += Decomposed.VarIndices[i].Scale;
LE.IsNSW = false; // We cannot guarantee nsw for the merge.
@@ -1792,7 +1799,8 @@ void BasicAAResult::subtractDecomposedGEPs(DecomposedGEP &DestGEP,
bool Found = false;
for (auto I : enumerate(DestGEP.VarIndices)) {
VariableGEPIndex &Dest = I.value();
- if (!isValueEqualInPotentialCycles(Dest.Val.V, Src.Val.V, AAQI) ||
+ if ((!isValueEqualInPotentialCycles(Dest.Val.V, Src.Val.V, AAQI) &&
+ !areBothVScale(Dest.Val.V, Src.Val.V)) ||
!Dest.Val.hasSameCastsAs(Src.Val))
continue;
diff --git a/llvm/test/Analysis/BasicAA/vscale.ll b/llvm/test/Analysis/BasicAA/vscale.ll
index 15a2d01c88d3b..a8de4ae84323d 100644
--- a/llvm/test/Analysis/BasicAA/vscale.ll
+++ b/llvm/test/Analysis/BasicAA/vscale.ll
@@ -477,9 +477,9 @@ define void @onevscale(ptr %p) vscale_range(1,16) {
}
; CHECK-LABEL: twovscales
-; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp162
+; CHECK-DAG: MustAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp162
; CHECK-DAG: NoAlias: <vscale x 4 x i32>* %vp161, <vscale x 4 x i32>* %vp161b
-; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vp161b, <vscale x 4 x i32>* %vp162
+; CHECK-DAG: NoAlias: <vscale x 4 x i32>* %vp161b, <vscale x 4 x i32>* %vp162
define void @twovscales(ptr %p) vscale_range(1,16) {
%v1 = call i64 @llvm.vscale.i64()
%v2 = call i64 @llvm.vscale.i64()
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