[llvm] dc5da48 - [InstCombine] Add tests for #77108 (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 8 07:41:47 PST 2024
Author: Nikita Popov
Date: 2024-02-08T16:41:38+01:00
New Revision: dc5da4851de5d29dd040d85a8387e2e5b4b12b7b
URL: https://github.com/llvm/llvm-project/commit/dc5da4851de5d29dd040d85a8387e2e5b4b12b7b
DIFF: https://github.com/llvm/llvm-project/commit/dc5da4851de5d29dd040d85a8387e2e5b4b12b7b.diff
LOG: [InstCombine] Add tests for #77108 (NFC)
Added:
llvm/test/Transforms/InstCombine/dependent-ivs.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/dependent-ivs.ll b/llvm/test/Transforms/InstCombine/dependent-ivs.ll
new file mode 100644
index 00000000000000..bd6679121dcac6
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/dependent-ivs.ll
@@ -0,0 +1,374 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
+; RUN: opt -S -passes=instcombine < %s | FileCheck %s
+
+define void @int_iv_nuw(i64 %base, i64 %end) {
+; CHECK-LABEL: define void @int_iv_nuw(
+; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
+; CHECK-NEXT: [[IV2_NEXT]] = add nuw i64 [[IV_NEXT]], [[BASE]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
+ %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
+ call void @use.i64(i64 %iv2)
+ %iv.next = add nuw nsw i64 %iv, 4
+ %iv2.next = add nuw i64 %iv.next, %base
+ %cmp = icmp eq i64 %iv.next, %end
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @int_iv_nsw(i64 %base, i64 %end) {
+; CHECK-LABEL: define void @int_iv_nsw(
+; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
+; CHECK-NEXT: [[IV2_NEXT]] = add nsw i64 [[IV_NEXT]], [[BASE]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
+ %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
+ call void @use.i64(i64 %iv2)
+ %iv.next = add nuw nsw i64 %iv, 4
+ %iv2.next = add nsw i64 %iv.next, %base
+ %cmp = icmp eq i64 %iv.next, %end
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @int_iv_commuted(i64 %base, i64 %end) {
+; CHECK-LABEL: define void @int_iv_commuted(
+; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[BASE2:%.*]] = mul i64 [[BASE]], 42
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE2]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
+; CHECK-NEXT: [[IV2_NEXT]] = add i64 [[BASE2]], [[IV_NEXT]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ %base2 = mul i64 %base, 42 ; thwart complexity-based canonicalization
+ br label %loop
+
+loop:
+ %iv2 = phi i64 [ %iv2.next, %loop ], [ %base2, %entry ]
+ %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
+ call void @use.i64(i64 %iv2)
+ %iv.next = add nuw nsw i64 %iv, 4
+ %iv2.next = add i64 %base2, %iv.next
+ %cmp = icmp eq i64 %iv.next, %end
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @int_iv_vector(<2 x i64> %base) {
+; CHECK-LABEL: define void @int_iv_vector(
+; CHECK-SAME: <2 x i64> [[BASE:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV2:%.*]] = phi <2 x i64> [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi <2 x i64> [ [[IV_NEXT:%.*]], [[LOOP]] ], [ zeroinitializer, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.v2i64(<2 x i64> [[IV2]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw <2 x i64> [[IV]], <i64 4, i64 4>
+; CHECK-NEXT: [[IV2_NEXT]] = add <2 x i64> [[IV_NEXT]], [[BASE]]
+; CHECK-NEXT: [[CMP:%.*]] = call i1 @get.i1()
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv2 = phi <2 x i64> [ %iv2.next, %loop ], [ %base, %entry ]
+ %iv = phi <2 x i64> [ %iv.next, %loop ], [ zeroinitializer, %entry ]
+ call void @use.v2i64(<2 x i64> %iv2)
+ %iv.next = add nuw nsw <2 x i64> %iv, <i64 4, i64 4>
+ %iv2.next = add <2 x i64> %iv.next, %base
+ %cmp = call i1 @get.i1()
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @int_iv_loop_variant_step(i64 %base, i64 %end) {
+; CHECK-LABEL: define void @int_iv_loop_variant_step(
+; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
+; CHECK-NEXT: [[STEP:%.*]] = call i64 @get.i64()
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], [[STEP]]
+; CHECK-NEXT: [[IV2_NEXT]] = add nuw i64 [[IV_NEXT]], [[BASE]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
+ %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
+ call void @use.i64(i64 %iv2)
+ %step = call i64 @get.i64()
+ %iv.next = add nuw nsw i64 %iv, %step
+ %iv2.next = add nuw i64 %iv.next, %base
+ %cmp = icmp eq i64 %iv.next, %end
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @ptr_iv_inbounds(ptr %base, i64 %end) {
+; CHECK-LABEL: define void @ptr_iv_inbounds(
+; CHECK-SAME: ptr [[BASE:%.*]], i64 [[END:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV_PTR:%.*]] = phi ptr [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.p0(ptr [[IV_PTR]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
+; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr inbounds i8, ptr [[BASE]], i64 [[IV_NEXT]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv.ptr = phi ptr [ %iv.ptr.next, %loop ], [ %base, %entry ]
+ %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
+ call void @use.p0(ptr %iv.ptr)
+ %iv.next = add nuw nsw i64 %iv, 4
+ %iv.ptr.next = getelementptr inbounds i8, ptr %base, i64 %iv.next
+ %cmp = icmp eq i64 %iv.next, %end
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @ptr_iv_no_inbounds(ptr %base, i64 %end) {
+; CHECK-LABEL: define void @ptr_iv_no_inbounds(
+; CHECK-SAME: ptr [[BASE:%.*]], i64 [[END:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV_PTR:%.*]] = phi ptr [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.p0(ptr [[IV_PTR]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
+; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr i8, ptr [[BASE]], i64 [[IV_NEXT]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv.ptr = phi ptr [ %iv.ptr.next, %loop ], [ %base, %entry ]
+ %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
+ call void @use.p0(ptr %iv.ptr)
+ %iv.next = add nuw nsw i64 %iv, 4
+ %iv.ptr.next = getelementptr i8, ptr %base, i64 %iv.next
+ %cmp = icmp eq i64 %iv.next, %end
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @ptr_iv_vector(<2 x ptr> %base, i64 %end) {
+; CHECK-LABEL: define void @ptr_iv_vector(
+; CHECK-SAME: <2 x ptr> [[BASE:%.*]], i64 [[END:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV_PTR:%.*]] = phi <2 x ptr> [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.v2p0(<2 x ptr> [[IV_PTR]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
+; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr inbounds i8, <2 x ptr> [[BASE]], i64 [[IV_NEXT]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv.ptr = phi <2 x ptr> [ %iv.ptr.next, %loop ], [ %base, %entry ]
+ %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
+ call void @use.v2p0(<2 x ptr> %iv.ptr)
+ %iv.next = add nuw nsw i64 %iv, 4
+ %iv.ptr.next = getelementptr inbounds i8, <2 x ptr> %base, i64 %iv.next
+ %cmp = icmp eq i64 %iv.next, %end
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @ptr_iv_vector2(<2 x ptr> %base) {
+; CHECK-LABEL: define void @ptr_iv_vector2(
+; CHECK-SAME: <2 x ptr> [[BASE:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV_PTR:%.*]] = phi <2 x ptr> [ [[IV_PTR_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi <2 x i64> [ [[IV_NEXT:%.*]], [[LOOP]] ], [ zeroinitializer, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.v2p0(<2 x ptr> [[IV_PTR]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw <2 x i64> [[IV]], <i64 4, i64 4>
+; CHECK-NEXT: [[IV_PTR_NEXT]] = getelementptr i8, <2 x ptr> [[BASE]], <2 x i64> [[IV_NEXT]]
+; CHECK-NEXT: [[CMP:%.*]] = call i1 @get.i1()
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv.ptr = phi <2 x ptr> [ %iv.ptr.next, %loop ], [ %base, %entry ]
+ %iv = phi <2 x i64> [ %iv.next, %loop ], [ zeroinitializer, %entry ]
+ call void @use.v2p0(<2 x ptr> %iv.ptr)
+ %iv.next = add nuw nsw <2 x i64> %iv, <i64 4, i64 4>
+ %iv.ptr.next = getelementptr i8, <2 x ptr> %base, <2 x i64> %iv.next
+ %cmp = call i1 @get.i1()
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @wrong_start_value(i64 %base, i64 %end) {
+; CHECK-LABEL: define void @wrong_start_value(
+; CHECK-SAME: i64 [[BASE:%.*]], i64 [[END:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP]] ], [ [[BASE]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 1, [[ENTRY]] ]
+; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
+; CHECK-NEXT: [[IV2_NEXT]] = add i64 [[IV_NEXT]], [[BASE]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV_NEXT]], [[END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop
+
+loop:
+ %iv2 = phi i64 [ %iv2.next, %loop ], [ %base, %entry ]
+ %iv = phi i64 [ %iv.next, %loop ], [ 1, %entry ]
+ call void @use.i64(i64 %iv2)
+ %iv.next = add nuw nsw i64 %iv, 4
+ %iv2.next = add i64 %base, %iv.next
+ %cmp = icmp eq i64 %iv.next, %end
+ br i1 %cmp, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @
diff erent_loops(i64 %base) {
+; CHECK-LABEL: define void @
diff erent_loops(
+; CHECK-SAME: i64 [[BASE:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP1:%.*]]
+; CHECK: loop1:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP1]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: call void @use.i64(i64 [[IV]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 4
+; CHECK-NEXT: [[CMP:%.*]] = call i1 @get.i1()
+; CHECK-NEXT: br i1 [[CMP]], label [[LOOP2:%.*]], label [[LOOP1]]
+; CHECK: loop2:
+; CHECK-NEXT: [[IV2:%.*]] = phi i64 [ [[IV2_NEXT:%.*]], [[LOOP2]] ], [ [[BASE]], [[LOOP1]] ]
+; CHECK-NEXT: call void @use.i64(i64 [[IV2]])
+; CHECK-NEXT: [[IV2_NEXT]] = add nuw i64 [[IV_NEXT]], [[BASE]]
+; CHECK-NEXT: [[CMP2:%.*]] = call i1 @get.i1()
+; CHECK-NEXT: br i1 [[CMP2]], label [[EXIT:%.*]], label [[LOOP2]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %loop1
+
+loop1:
+ %iv = phi i64 [ %iv.next, %loop1 ], [ 0, %entry ]
+ call void @use.i64(i64 %iv)
+ %iv.next = add nuw nsw i64 %iv, 4
+ %cmp = call i1 @get.i1()
+ br i1 %cmp, label %loop2, label %loop1
+
+loop2:
+ %iv2 = phi i64 [ %iv2.next, %loop2 ], [ %base, %loop1 ]
+ call void @use.i64(i64 %iv2)
+ %iv2.next = add nuw i64 %base, %iv.next
+ %cmp2 = call i1 @get.i1()
+ br i1 %cmp2, label %exit, label %loop2
+
+exit:
+ ret void
+}
+
+declare void @use.p0(ptr)
+declare void @use.v2p0(<2 x ptr>)
+declare void @use.i64(i64)
+declare void @use.v2i64(<2 x i64>)
+declare i1 @get.i1()
+declare i64 @get.i64()
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