[llvm] Reland [RISCV] Implement RISCVInsrInfo::getConstValDefinedInReg (PR #81124)

[Philip Reames via llvm-commits]

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@@ -2562,6 +2562,33 @@ std::optional<RegImmPair> RISCVInstrInfo::isAddImmediate(const MachineInstr &MI,
   return std::nullopt;
 }
 
+bool RISCVInstrInfo::getConstValDefinedInReg(const MachineInstr &MI,
+                                             const Register Reg,
+                                             int64_t &ImmVal) const {
+  // Handle moves of X0.
+  if (auto DestSrc = isCopyInstr(MI)) {
+    if (DestSrc->Source->getReg() != RISCV::X0)
+      return false;
+    const Register DstReg = DestSrc->Destination->getReg();
+    if (DstReg != Reg)
+      return false;
+    ImmVal = 0;
+    return true;
+  }
+
+  if (!(MI.getOpcode() == RISCV::ADDI || MI.getOpcode() == RISCV::ADDIW ||
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preames wrote:

Can we reuse TII's ::isAddImmediate here?  It only covers the ADDI case, but we could land that, and then extend it to cover the other cases.  

https://github.com/llvm/llvm-project/pull/81124