[llvm] [RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (PR #80697)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 8 01:39:26 PST 2024


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@@ -90,6 +90,7 @@ RISCVTTIImpl::getRISCVInstructionCost(ArrayRef<unsigned> OpCodes, MVT VT,
     case RISCV::VFMV_S_F:
     case RISCV::VMNAND_MM:
     case RISCV::VCPOP_M:
+    case RISCV::VMV1R_V:
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lukel97 wrote:

I think vmv1r.v is a register rename on some microarchitectures and so is almost free. Should this be costed as 0? Or do we have other places in TTI where we're already costing for it?

https://github.com/llvm/llvm-project/pull/80697


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