[llvm] [DirectX][NFC] Change usage pattern DXIL* to Dxil* in DXIL Emitter (PR #80778)
S. Bharadwaj Yadavalli via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 6 13:41:25 PST 2024
https://github.com/bharadwajy updated https://github.com/llvm/llvm-project/pull/80778
>From 42ef78c40830280b822413e1ebc131c5f7f4e86e Mon Sep 17 00:00:00 2001
From: Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
Date: Mon, 5 Feb 2024 20:08:49 -0500
Subject: [PATCH 1/3] [DirectX][NFC] Change usage pattern DXIL* to Dxil* in
DXIL Emitter Match DXIL TableGen class names with structure names in DXIL
Emitter. Delete unnecessary Name field.
---
llvm/lib/Target/DirectX/DXIL.td | 7 +-
llvm/utils/TableGen/DXILEmitter.cpp | 155 ++++++++++++++--------------
2 files changed, 78 insertions(+), 84 deletions(-)
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index aec64607e2460..3f00e6a7c4db7 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -49,10 +49,7 @@ class DxilOpParameter<int pos, string type, string name, string doc,
}
// A representation for a DXIL operation
-class DxilOperationDesc<string name> {
- // TODO : Appears redundant. OpName should serve the same purpose
- string Name = name; // short, unique name
-
+class DxilOperationDesc {
string OpName = ""; // Name of DXIL operation
int OpCode = 0; // Unique non-negative integer associated with the operation
DxilOpClass OpClass; // Class of the operation
@@ -75,7 +72,7 @@ class DxilOperationDesc<string name> {
class DxilOperation<string name, int opCode, DxilOpClass opClass, DxilOpCategory opCategory, string doc,
string oloadTypes, string attrs, list<DxilOpParameter> params,
- list<string> statsGroup = []> : DxilOperationDesc<name> {
+ list<string> statsGroup = []> : DxilOperationDesc {
let OpName = name;
let OpCode = opCode;
let Doc = doc;
diff --git a/llvm/utils/TableGen/DXILEmitter.cpp b/llvm/utils/TableGen/DXILEmitter.cpp
index 475a57a0cadf8..708ad37e44b1e 100644
--- a/llvm/utils/TableGen/DXILEmitter.cpp
+++ b/llvm/utils/TableGen/DXILEmitter.cpp
@@ -25,12 +25,12 @@ using namespace llvm::dxil;
namespace {
-struct DXILShaderModel {
+struct DxilShaderModel {
int Major = 0;
int Minor = 0;
};
-struct DXILParam {
+struct DxilParameter {
int Pos; // position in parameter list
ParameterKind Kind;
StringRef Name; // short, unique name
@@ -38,23 +38,21 @@ struct DXILParam {
bool IsConst; // whether this argument requires a constant value in the IR
StringRef EnumName; // the name of the enum type if applicable
int MaxValue; // the maximum value for this parameter if applicable
- DXILParam(const Record *R);
+ DxilParameter(const Record *R);
};
-struct DXILOperationData {
- StringRef Name; // short, unique name
-
- StringRef DXILOp; // name of DXIL operation
- int DXILOpID; // ID of DXIL operation
- StringRef DXILClass; // name of the opcode class
+struct DxilOperationDesc {
+ StringRef OpName; // name of DXIL operation
+ int OpCode; // ID of DXIL operation
+ StringRef OpClass; // name of the opcode class
StringRef Category; // classification for this instruction
StringRef Doc; // the documentation description of this instruction
- SmallVector<DXILParam> Params; // the operands that this instruction takes
+ SmallVector<DxilParameter> Params; // the operands that this instruction takes
StringRef OverloadTypes; // overload types if applicable
StringRef FnAttr; // attribute shorthands: rn=does not access
// memory,ro=only reads from memory
- StringRef Intrinsic; // The llvm intrinsic map to DXILOp. Default is "" which
+ StringRef Intrinsic; // The llvm intrinsic map to OpName. Default is "" which
// means no map exist
bool IsDeriv = false; // whether this is some kind of derivative
bool IsGradient = false; // whether this requires a gradient calculation
@@ -65,17 +63,16 @@ struct DXILOperationData {
// the wave
SmallVector<StringRef, 4>
ShaderStages; // shader stages to which this applies, empty for all.
- DXILShaderModel ShaderModel; // minimum shader model required
- DXILShaderModel ShaderModelTranslated; // minimum shader model required with
+ DxilShaderModel ShaderModel; // minimum shader model required
+ DxilShaderModel ShaderModelTranslated; // minimum shader model required with
// translation by linker
int OverloadParamIndex; // parameter index which control the overload.
// When < 0, should be only 1 overload type.
SmallVector<StringRef, 4> counters; // counters for this inst.
- DXILOperationData(const Record *R) {
- Name = R->getValueAsString("Name");
- DXILOp = R->getValueAsString("OpName");
- DXILOpID = R->getValueAsInt("OpCode");
- DXILClass = R->getValueAsDef("OpClass")->getValueAsString("Name");
+ DxilOperationDesc(const Record *R) {
+ OpName = R->getValueAsString("OpName");
+ OpCode = R->getValueAsInt("OpCode");
+ OpClass = R->getValueAsDef("OpClass")->getValueAsString("Name");
Category = R->getValueAsDef("OpCategory")->getValueAsString("Name");
if (R->getValue("llvm_intrinsic")) {
@@ -92,7 +89,7 @@ struct DXILOperationData {
OverloadParamIndex = -1;
for (unsigned I = 0; I < ParamList->size(); ++I) {
Record *Param = ParamList->getElementAsRecord(I);
- Params.emplace_back(DXILParam(Param));
+ Params.emplace_back(DxilParameter(Param));
auto &CurParam = Params.back();
if (CurParam.Kind >= ParameterKind::OVERLOAD)
OverloadParamIndex = I;
@@ -121,7 +118,7 @@ static ParameterKind parameterTypeNameToKind(StringRef Name) {
.Default(ParameterKind::INVALID);
}
-DXILParam::DXILParam(const Record *R) {
+DxilParameter::DxilParameter(const Record *R) {
Name = R->getValueAsString("Name");
Pos = R->getValueAsInt("Pos");
Kind = parameterTypeNameToKind(R->getValueAsString("LLVMType"));
@@ -166,9 +163,9 @@ static std::string parameterKindToString(ParameterKind Kind) {
llvm_unreachable("Unknown llvm::dxil::ParameterKind enum");
}
-static void emitDXILOpEnum(DXILOperationData &DXILOp, raw_ostream &OS) {
+static void emitDxilOpEnum(DxilOperationDesc &Op, raw_ostream &OS) {
// Name = ID, // Doc
- OS << DXILOp.Name << " = " << DXILOp.DXILOpID << ", // " << DXILOp.Doc
+ OS << Op.OpName << " = " << Op.OpCode << ", // " << Op.Doc
<< "\n";
}
@@ -182,14 +179,14 @@ static std::string buildCategoryStr(StringSet<> &Cetegorys) {
}
// Emit enum declaration for DXIL.
-static void emitDXILEnums(std::vector<DXILOperationData> &DXILOps,
+static void emitDxilEnums(std::vector<DxilOperationDesc> &Ops,
raw_ostream &OS) {
// Sort by Category + OpName.
- llvm::sort(DXILOps, [](DXILOperationData &A, DXILOperationData &B) {
+ llvm::sort(Ops, [](DxilOperationDesc &A, DxilOperationDesc &B) {
// Group by Category first.
if (A.Category == B.Category)
// Inside same Category, order by OpName.
- return A.DXILOp < B.DXILOp;
+ return A.OpName < B.OpName;
else
return A.Category < B.Category;
});
@@ -199,18 +196,18 @@ static void emitDXILEnums(std::vector<DXILOperationData> &DXILOps,
StringMap<StringSet<>> ClassMap;
StringRef PrevCategory = "";
- for (auto &DXILOp : DXILOps) {
- StringRef Category = DXILOp.Category;
+ for (auto &Op : Ops) {
+ StringRef Category = Op.Category;
if (Category != PrevCategory) {
OS << "\n// " << Category << "\n";
PrevCategory = Category;
}
- emitDXILOpEnum(DXILOp, OS);
- auto It = ClassMap.find(DXILOp.DXILClass);
+ emitDxilOpEnum(Op, OS);
+ auto It = ClassMap.find(Op.OpClass);
if (It != ClassMap.end()) {
- It->second.insert(DXILOp.Category);
+ It->second.insert(Op.Category);
} else {
- ClassMap[DXILOp.DXILClass].insert(DXILOp.Category);
+ ClassMap[Op.OpClass].insert(Op.Category);
}
}
@@ -253,24 +250,24 @@ static void emitDXILEnums(std::vector<DXILOperationData> &DXILOps,
}
// Emit map from llvm intrinsic to DXIL operation.
-static void emitDXILIntrinsicMap(std::vector<DXILOperationData> &DXILOps,
+static void emitDxilIntrinsicMap(std::vector<DxilOperationDesc> &Ops,
raw_ostream &OS) {
OS << "\n";
// FIXME: use array instead of SmallDenseMap.
OS << "static const SmallDenseMap<Intrinsic::ID, dxil::OpCode> LowerMap = "
"{\n";
- for (auto &DXILOp : DXILOps) {
- if (DXILOp.Intrinsic.empty())
+ for (auto &Op : Ops) {
+ if (Op.Intrinsic.empty())
continue;
// {Intrinsic::sin, dxil::OpCode::Sin},
- OS << " { Intrinsic::" << DXILOp.Intrinsic
- << ", dxil::OpCode::" << DXILOp.DXILOp << "},\n";
+ OS << " { Intrinsic::" << Op.Intrinsic
+ << ", dxil::OpCode::" << Op.OpName << "},\n";
}
OS << "};\n";
OS << "\n";
}
-static std::string emitDXILOperationFnAttr(StringRef FnAttr) {
+static std::string emitDxilOperationFnAttr(StringRef FnAttr) {
return StringSwitch<std::string>(FnAttr)
.Case("rn", "Attribute::ReadNone")
.Case("ro", "Attribute::ReadOnly")
@@ -291,7 +288,7 @@ static std::string getOverloadKind(StringRef Overload) {
.Default("OverloadKind::VOID");
}
-static std::string getDXILOperationOverload(StringRef Overloads) {
+static std::string getDxilOperationOverload(StringRef Overloads) {
SmallVector<StringRef> OverloadStrs;
Overloads.split(OverloadStrs, ';', /*MaxSplit*/ -1, /*KeepEmpty*/ false);
// Format is: OverloadKind::FLOAT | OverloadKind::HALF
@@ -315,20 +312,20 @@ static std::string lowerFirstLetter(StringRef Name) {
return LowerName;
}
-static std::string getDXILOpClassName(StringRef DXILOpClass) {
+static std::string getDxilOpClassName(StringRef OpClass) {
// Lower first letter expect for special case.
- return StringSwitch<std::string>(DXILOpClass)
+ return StringSwitch<std::string>(OpClass)
.Case("CBufferLoad", "cbufferLoad")
.Case("CBufferLoadLegacy", "cbufferLoadLegacy")
.Case("GSInstanceID", "gsInstanceID")
- .Default(lowerFirstLetter(DXILOpClass));
+ .Default(lowerFirstLetter(OpClass));
}
-static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
+static void emitDxilOperationTable(std::vector<DxilOperationDesc> &Ops,
raw_ostream &OS) {
- // Sort by DXILOpID.
- llvm::sort(DXILOps, [](DXILOperationData &A, DXILOperationData &B) {
- return A.DXILOpID < B.DXILOpID;
+ // Sort by OpCode.
+ llvm::sort(Ops, [](DxilOperationDesc &A, DxilOperationDesc &B) {
+ return A.OpCode < B.OpCode;
});
// Collect Names.
@@ -338,18 +335,18 @@ static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
StringMap<SmallVector<ParameterKind>> ParameterMap;
StringSet<> ClassSet;
- for (auto &DXILOp : DXILOps) {
- OpStrings.add(DXILOp.DXILOp.str());
+ for (auto &Op : Ops) {
+ OpStrings.add(Op.OpName.str());
- if (ClassSet.contains(DXILOp.DXILClass))
+ if (ClassSet.contains(Op.OpClass))
continue;
- ClassSet.insert(DXILOp.DXILClass);
- OpClassStrings.add(getDXILOpClassName(DXILOp.DXILClass));
+ ClassSet.insert(Op.OpClass);
+ OpClassStrings.add(getDxilOpClassName(Op.OpClass));
SmallVector<ParameterKind> ParamKindVec;
- for (auto &Param : DXILOp.Params) {
+ for (auto &Param : Op.Params) {
ParamKindVec.emplace_back(Param.Kind);
}
- ParameterMap[DXILOp.DXILClass] = ParamKindVec;
+ ParameterMap[Op.OpClass] = ParamKindVec;
Parameters.add(ParamKindVec);
}
@@ -363,26 +360,26 @@ static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
// OpCodeClassNameIndex,
// OverloadKind::FLOAT | OverloadKind::HALF, Attribute::AttrKind::ReadNone, 0,
// 3, ParameterTableOffset},
- OS << "static const OpCodeProperty *getOpCodeProperty(dxil::OpCode DXILOp) "
+ OS << "static const OpCodeProperty *getOpCodeProperty(dxil::OpCode Op) "
"{\n";
OS << " static const OpCodeProperty OpCodeProps[] = {\n";
- for (auto &DXILOp : DXILOps) {
- OS << " { dxil::OpCode::" << DXILOp.DXILOp << ", "
- << OpStrings.get(DXILOp.DXILOp.str())
- << ", OpCodeClass::" << DXILOp.DXILClass << ", "
- << OpClassStrings.get(getDXILOpClassName(DXILOp.DXILClass)) << ", "
- << getDXILOperationOverload(DXILOp.OverloadTypes) << ", "
- << emitDXILOperationFnAttr(DXILOp.FnAttr) << ", "
- << DXILOp.OverloadParamIndex << ", " << DXILOp.Params.size() << ", "
- << Parameters.get(ParameterMap[DXILOp.DXILClass]) << " },\n";
+ for (auto &Op : Ops) {
+ OS << " { dxil::OpCode::" << Op.OpName << ", "
+ << OpStrings.get(Op.OpName.str())
+ << ", OpCodeClass::" << Op.OpClass << ", "
+ << OpClassStrings.get(getDxilOpClassName(Op.OpClass)) << ", "
+ << getDxilOperationOverload(Op.OverloadTypes) << ", "
+ << emitDxilOperationFnAttr(Op.FnAttr) << ", "
+ << Op.OverloadParamIndex << ", " << Op.Params.size() << ", "
+ << Parameters.get(ParameterMap[Op.OpClass]) << " },\n";
}
OS << " };\n";
OS << " // FIXME: change search to indexing with\n";
- OS << " // DXILOp once all DXIL op is added.\n";
+ OS << " // Op once all DXIL operations are added.\n";
OS << " OpCodeProperty TmpProp;\n";
- OS << " TmpProp.OpCode = DXILOp;\n";
+ OS << " TmpProp.OpCode = Op;\n";
OS << " const OpCodeProperty *Prop =\n";
OS << " llvm::lower_bound(OpCodeProps, TmpProp,\n";
OS << " [](const OpCodeProperty &A, const "
@@ -394,30 +391,30 @@ static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
OS << "}\n\n";
// Emit the string tables.
- OS << "static const char *getOpCodeName(dxil::OpCode DXILOp) {\n\n";
+ OS << "static const char *getOpCodeName(dxil::OpCode Op) {\n\n";
OpStrings.emitStringLiteralDef(OS,
- " static const char DXILOpCodeNameTable[]");
+ " static const char DxilOpCodeNameTable[]");
- OS << " auto *Prop = getOpCodeProperty(DXILOp);\n";
+ OS << " auto *Prop = getOpCodeProperty(Op);\n";
OS << " unsigned Index = Prop->OpCodeNameOffset;\n";
- OS << " return DXILOpCodeNameTable + Index;\n";
+ OS << " return DxilOpCodeNameTable + Index;\n";
OS << "}\n\n";
OS << "static const char *getOpCodeClassName(const OpCodeProperty &Prop) "
"{\n\n";
OpClassStrings.emitStringLiteralDef(
- OS, " static const char DXILOpCodeClassNameTable[]");
+ OS, " static const char DxilOpCodeClassNameTable[]");
OS << " unsigned Index = Prop.OpCodeClassNameOffset;\n";
- OS << " return DXILOpCodeClassNameTable + Index;\n";
+ OS << " return DxilOpCodeClassNameTable + Index;\n";
OS << "}\n ";
OS << "static const ParameterKind *getOpCodeParameterKind(const "
"OpCodeProperty &Prop) "
"{\n\n";
- OS << " static const ParameterKind DXILOpParameterKindTable[] = {\n";
+ OS << " static const ParameterKind DxilOpParameterKindTable[] = {\n";
Parameters.emit(
OS,
[](raw_ostream &ParamOS, ParameterKind Kind) {
@@ -426,35 +423,35 @@ static void emitDXILOperationTable(std::vector<DXILOperationData> &DXILOps,
"ParameterKind::INVALID");
OS << " };\n\n";
OS << " unsigned Index = Prop.ParameterTableOffset;\n";
- OS << " return DXILOpParameterKindTable + Index;\n";
+ OS << " return DxilOpParameterKindTable + Index;\n";
OS << "}\n ";
}
-static void EmitDXILOperation(RecordKeeper &Records, raw_ostream &OS) {
+static void EmitDxilOperation(RecordKeeper &Records, raw_ostream &OS) {
std::vector<Record *> Ops = Records.getAllDerivedDefinitions("DxilOperation");
OS << "// Generated code, do not edit.\n";
OS << "\n";
- std::vector<DXILOperationData> DXILOps;
+ std::vector<DxilOperationDesc> DXILOps;
DXILOps.reserve(Ops.size());
for (auto *Record : Ops) {
- DXILOps.emplace_back(DXILOperationData(Record));
+ DXILOps.emplace_back(DxilOperationDesc(Record));
}
OS << "#ifdef DXIL_OP_ENUM\n";
- emitDXILEnums(DXILOps, OS);
+ emitDxilEnums(DXILOps, OS);
OS << "#endif\n\n";
OS << "#ifdef DXIL_OP_INTRINSIC_MAP\n";
- emitDXILIntrinsicMap(DXILOps, OS);
+ emitDxilIntrinsicMap(DXILOps, OS);
OS << "#endif\n\n";
OS << "#ifdef DXIL_OP_OPERATION_TABLE\n";
- emitDXILOperationTable(DXILOps, OS);
+ emitDxilOperationTable(DXILOps, OS);
OS << "#endif\n\n";
OS << "\n";
}
-static TableGen::Emitter::Opt X("gen-dxil-operation", EmitDXILOperation,
+static TableGen::Emitter::Opt X("gen-dxil-operation", EmitDxilOperation,
"Generate DXIL operation information");
>From 25d842cf2498d8be7d730fd2093a399568918693 Mon Sep 17 00:00:00 2001
From: Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
Date: Mon, 5 Feb 2024 20:26:47 -0500
Subject: [PATCH 2/3] clang-format conforming change
---
llvm/utils/TableGen/DXILEmitter.cpp | 20 +++++++++-----------
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/llvm/utils/TableGen/DXILEmitter.cpp b/llvm/utils/TableGen/DXILEmitter.cpp
index 708ad37e44b1e..af0bb7ec1cb31 100644
--- a/llvm/utils/TableGen/DXILEmitter.cpp
+++ b/llvm/utils/TableGen/DXILEmitter.cpp
@@ -43,8 +43,8 @@ struct DxilParameter {
struct DxilOperationDesc {
StringRef OpName; // name of DXIL operation
- int OpCode; // ID of DXIL operation
- StringRef OpClass; // name of the opcode class
+ int OpCode; // ID of DXIL operation
+ StringRef OpClass; // name of the opcode class
StringRef Category; // classification for this instruction
StringRef Doc; // the documentation description of this instruction
@@ -165,8 +165,7 @@ static std::string parameterKindToString(ParameterKind Kind) {
static void emitDxilOpEnum(DxilOperationDesc &Op, raw_ostream &OS) {
// Name = ID, // Doc
- OS << Op.OpName << " = " << Op.OpCode << ", // " << Op.Doc
- << "\n";
+ OS << Op.OpName << " = " << Op.OpCode << ", // " << Op.Doc << "\n";
}
static std::string buildCategoryStr(StringSet<> &Cetegorys) {
@@ -260,8 +259,8 @@ static void emitDxilIntrinsicMap(std::vector<DxilOperationDesc> &Ops,
if (Op.Intrinsic.empty())
continue;
// {Intrinsic::sin, dxil::OpCode::Sin},
- OS << " { Intrinsic::" << Op.Intrinsic
- << ", dxil::OpCode::" << Op.OpName << "},\n";
+ OS << " { Intrinsic::" << Op.Intrinsic << ", dxil::OpCode::" << Op.OpName
+ << "},\n";
}
OS << "};\n";
OS << "\n";
@@ -366,12 +365,11 @@ static void emitDxilOperationTable(std::vector<DxilOperationDesc> &Ops,
OS << " static const OpCodeProperty OpCodeProps[] = {\n";
for (auto &Op : Ops) {
OS << " { dxil::OpCode::" << Op.OpName << ", "
- << OpStrings.get(Op.OpName.str())
- << ", OpCodeClass::" << Op.OpClass << ", "
- << OpClassStrings.get(getDxilOpClassName(Op.OpClass)) << ", "
+ << OpStrings.get(Op.OpName.str()) << ", OpCodeClass::" << Op.OpClass
+ << ", " << OpClassStrings.get(getDxilOpClassName(Op.OpClass)) << ", "
<< getDxilOperationOverload(Op.OverloadTypes) << ", "
- << emitDxilOperationFnAttr(Op.FnAttr) << ", "
- << Op.OverloadParamIndex << ", " << Op.Params.size() << ", "
+ << emitDxilOperationFnAttr(Op.FnAttr) << ", " << Op.OverloadParamIndex
+ << ", " << Op.Params.size() << ", "
<< Parameters.get(ParameterMap[Op.OpClass]) << " },\n";
}
OS << " };\n";
>From d354fd628ac61e562510ad5009144618a350a894 Mon Sep 17 00:00:00 2001
From: Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
Date: Tue, 6 Feb 2024 16:40:26 -0500
Subject: [PATCH 3/3] [DirextX][NFC] Change *Dxil* occurances to *DXIL*
---
llvm/lib/Target/DirectX/DXIL.td | 86 ++++++++++++------------
llvm/lib/Target/DirectX/DXILMetadata.cpp | 8 +--
llvm/utils/TableGen/DXILEmitter.cpp | 76 ++++++++++-----------
3 files changed, 85 insertions(+), 85 deletions(-)
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index 3f00e6a7c4db7..3f3ace5a1a3a3 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -14,28 +14,28 @@
include "llvm/IR/Intrinsics.td"
// Abstract representation of the class a DXIL Operation belongs to.
-class DxilOpClass<string name> {
+class DXILOpClass<string name> {
string Name = name;
}
// Abstract representation of the category a DXIL Operation belongs to
-class DxilOpCategory<string name> {
+class DXILOpCategory<string name> {
string Name = name;
}
-def UnaryClass : DxilOpClass<"Unary">;
-def BinaryClass : DxilOpClass<"Binary">;
-def FlattenedThreadIdInGroupClass : DxilOpClass<"FlattenedThreadIdInGroup">;
-def ThreadIdInGroupClass : DxilOpClass<"ThreadIdInGroup">;
-def ThreadIdClass : DxilOpClass<"ThreadId">;
-def GroupIdClass : DxilOpClass<"GroupId">;
+def UnaryClass : DXILOpClass<"Unary">;
+def BinaryClass : DXILOpClass<"Binary">;
+def FlattenedThreadIdInGroupClass : DXILOpClass<"FlattenedThreadIdInGroup">;
+def ThreadIdInGroupClass : DXILOpClass<"ThreadIdInGroup">;
+def ThreadIdClass : DXILOpClass<"ThreadId">;
+def GroupIdClass : DXILOpClass<"GroupId">;
-def BinaryUintCategory : DxilOpCategory<"Binary uint">;
-def UnaryFloatCategory : DxilOpCategory<"Unary float">;
-def ComputeIDCategory : DxilOpCategory<"Compute/Mesh/Amplification shader">;
+def BinaryUintCategory : DXILOpCategory<"Binary uint">;
+def UnaryFloatCategory : DXILOpCategory<"Unary float">;
+def ComputeIDCategory : DXILOpCategory<"Compute/Mesh/Amplification shader">;
// The parameter description for a DXIL operation
-class DxilOpParameter<int pos, string type, string name, string doc,
+class DXILOpParameter<int pos, string type, string name, string doc,
bit isConstant = 0, string enumName = "",
int maxValue = 0> {
int Pos = pos; // Position in parameter list
@@ -49,13 +49,13 @@ class DxilOpParameter<int pos, string type, string name, string doc,
}
// A representation for a DXIL operation
-class DxilOperationDesc {
+class DXILOperationDesc {
string OpName = ""; // Name of DXIL operation
int OpCode = 0; // Unique non-negative integer associated with the operation
- DxilOpClass OpClass; // Class of the operation
- DxilOpCategory OpCategory; // Category of the operation
+ DXILOpClass OpClass; // Class of the operation
+ DXILOpCategory OpCategory; // Category of the operation
string Doc = ""; // Description of the operation
- list<DxilOpParameter> Params = []; // Parameter list of the operation
+ list<DXILOpParameter> Params = []; // Parameter list of the operation
string OverloadTypes = ""; // Overload types, if applicable
string Attributes = ""; // Attribute shorthands: rn=does not access
// memory,ro=only reads from memory,
@@ -70,9 +70,9 @@ class DxilOperationDesc {
list<string> StatsGroup = [];
}
-class DxilOperation<string name, int opCode, DxilOpClass opClass, DxilOpCategory opCategory, string doc,
- string oloadTypes, string attrs, list<DxilOpParameter> params,
- list<string> statsGroup = []> : DxilOperationDesc {
+class DXILOperation<string name, int opCode, DXILOpClass opClass, DXILOpCategory opCategory, string doc,
+ string oloadTypes, string attrs, list<DXILOpParameter> params,
+ list<string> statsGroup = []> : DXILOperationDesc {
let OpName = name;
let OpCode = opCode;
let Doc = doc;
@@ -87,56 +87,56 @@ class DxilOperation<string name, int opCode, DxilOpClass opClass, DxilOpCategory
// LLVM intrinsic that DXIL operation maps to.
class LLVMIntrinsic<Intrinsic llvm_intrinsic_> { Intrinsic llvm_intrinsic = llvm_intrinsic_; }
-def Sin : DxilOperation<"Sin", 13, UnaryClass, UnaryFloatCategory, "returns sine(theta) for theta in radians.",
+def Sin : DXILOperation<"Sin", 13, UnaryClass, UnaryFloatCategory, "returns sine(theta) for theta in radians.",
"half;float;", "rn",
[
- DxilOpParameter<0, "$o", "", "operation result">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "$o", "value", "input value">
+ DXILOpParameter<0, "$o", "", "operation result">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "$o", "value", "input value">
],
["floats"]>,
LLVMIntrinsic<int_sin>;
-def UMax : DxilOperation< "UMax", 39, BinaryClass, BinaryUintCategory, "unsigned integer maximum. UMax(a,b) = a > b ? a : b",
+def UMax : DXILOperation< "UMax", 39, BinaryClass, BinaryUintCategory, "unsigned integer maximum. UMax(a,b) = a > b ? a : b",
"i16;i32;i64;", "rn",
[
- DxilOpParameter<0, "$o", "", "operation result">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "$o", "a", "input value">,
- DxilOpParameter<3, "$o", "b", "input value">
+ DXILOpParameter<0, "$o", "", "operation result">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "$o", "a", "input value">,
+ DXILOpParameter<3, "$o", "b", "input value">
],
["uints"]>,
LLVMIntrinsic<int_umax>;
-def ThreadId : DxilOperation< "ThreadId", 93, ThreadIdClass, ComputeIDCategory, "reads the thread ID", "i32;", "rn",
+def ThreadId : DXILOperation< "ThreadId", 93, ThreadIdClass, ComputeIDCategory, "reads the thread ID", "i32;", "rn",
[
- DxilOpParameter<0, "i32", "", "thread ID component">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "i32", "component", "component to read (x,y,z)">
+ DXILOpParameter<0, "i32", "", "thread ID component">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "i32", "component", "component to read (x,y,z)">
]>,
LLVMIntrinsic<int_dx_thread_id>;
-def GroupId : DxilOperation< "GroupId", 94, GroupIdClass, ComputeIDCategory, "reads the group ID (SV_GroupID)", "i32;", "rn",
+def GroupId : DXILOperation< "GroupId", 94, GroupIdClass, ComputeIDCategory, "reads the group ID (SV_GroupID)", "i32;", "rn",
[
- DxilOpParameter<0, "i32", "", "group ID component">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "i32", "component", "component to read">
+ DXILOpParameter<0, "i32", "", "group ID component">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "i32", "component", "component to read">
]>,
LLVMIntrinsic<int_dx_group_id>;
-def ThreadIdInGroup : DxilOperation< "ThreadIdInGroup", 95, ThreadIdInGroupClass, ComputeIDCategory,
+def ThreadIdInGroup : DXILOperation< "ThreadIdInGroup", 95, ThreadIdInGroupClass, ComputeIDCategory,
"reads the thread ID within the group (SV_GroupThreadID)", "i32;", "rn",
[
- DxilOpParameter<0, "i32", "", "thread ID in group component">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">,
- DxilOpParameter<2, "i32", "component", "component to read (x,y,z)">
+ DXILOpParameter<0, "i32", "", "thread ID in group component">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">,
+ DXILOpParameter<2, "i32", "component", "component to read (x,y,z)">
]>,
LLVMIntrinsic<int_dx_thread_id_in_group>;
-def FlattenedThreadIdInGroup : DxilOperation< "FlattenedThreadIdInGroup", 96, FlattenedThreadIdInGroupClass, ComputeIDCategory,
+def FlattenedThreadIdInGroup : DXILOperation< "FlattenedThreadIdInGroup", 96, FlattenedThreadIdInGroupClass, ComputeIDCategory,
"provides a flattened index for a given thread within a given group (SV_GroupIndex)", "i32;", "rn",
[
- DxilOpParameter<0, "i32", "", "result">,
- DxilOpParameter<1, "i32", "opcode", "DXIL opcode">
+ DXILOpParameter<0, "i32", "", "result">,
+ DXILOpParameter<1, "i32", "opcode", "DXIL opcode">
]>,
LLVMIntrinsic<int_dx_flattened_thread_id_in_group>;
diff --git a/llvm/lib/Target/DirectX/DXILMetadata.cpp b/llvm/lib/Target/DirectX/DXILMetadata.cpp
index db55f25c50774..2d94490a7f24c 100644
--- a/llvm/lib/Target/DirectX/DXILMetadata.cpp
+++ b/llvm/lib/Target/DirectX/DXILMetadata.cpp
@@ -213,7 +213,7 @@ class EntryMD {
// FIXME: add signature for profile other than CS.
// See https://github.com/llvm/llvm-project/issues/57928.
MDTuple *Signatures = nullptr;
- return emitDxilEntryPointTuple(
+ return emitDXILEntryPointTuple(
&F, F.getName().str(), Signatures, Resources,
Props.emitDXILEntryProps(RawShaderFlag, Ctx, /*IsLib*/ false), Ctx);
}
@@ -222,7 +222,7 @@ class EntryMD {
// FIXME: add signature for profile other than CS.
// See https://github.com/llvm/llvm-project/issues/57928.
MDTuple *Signatures = nullptr;
- return emitDxilEntryPointTuple(
+ return emitDXILEntryPointTuple(
&F, F.getName().str(), Signatures,
/*entry in lib doesn't need resources metadata*/ nullptr,
Props.emitDXILEntryProps(RawShaderFlag, Ctx, /*IsLib*/ true), Ctx);
@@ -233,13 +233,13 @@ class EntryMD {
static MDTuple *emitEmptyEntryForLib(MDTuple *Resources,
uint64_t RawShaderFlag,
LLVMContext &Ctx) {
- return emitDxilEntryPointTuple(
+ return emitDXILEntryPointTuple(
nullptr, "", nullptr, Resources,
EntryProps::emitEntryPropsForEmptyEntry(RawShaderFlag, Ctx), Ctx);
}
private:
- static MDTuple *emitDxilEntryPointTuple(Function *Fn, const std::string &Name,
+ static MDTuple *emitDXILEntryPointTuple(Function *Fn, const std::string &Name,
MDTuple *Signatures,
MDTuple *Resources,
MDTuple *Properties,
diff --git a/llvm/utils/TableGen/DXILEmitter.cpp b/llvm/utils/TableGen/DXILEmitter.cpp
index af0bb7ec1cb31..cb9f9c6b03c63 100644
--- a/llvm/utils/TableGen/DXILEmitter.cpp
+++ b/llvm/utils/TableGen/DXILEmitter.cpp
@@ -25,12 +25,12 @@ using namespace llvm::dxil;
namespace {
-struct DxilShaderModel {
+struct DXILShaderModel {
int Major = 0;
int Minor = 0;
};
-struct DxilParameter {
+struct DXILParameter {
int Pos; // position in parameter list
ParameterKind Kind;
StringRef Name; // short, unique name
@@ -38,17 +38,17 @@ struct DxilParameter {
bool IsConst; // whether this argument requires a constant value in the IR
StringRef EnumName; // the name of the enum type if applicable
int MaxValue; // the maximum value for this parameter if applicable
- DxilParameter(const Record *R);
+ DXILParameter(const Record *R);
};
-struct DxilOperationDesc {
+struct DXILOperationDesc {
StringRef OpName; // name of DXIL operation
int OpCode; // ID of DXIL operation
StringRef OpClass; // name of the opcode class
StringRef Category; // classification for this instruction
StringRef Doc; // the documentation description of this instruction
- SmallVector<DxilParameter> Params; // the operands that this instruction takes
+ SmallVector<DXILParameter> Params; // the operands that this instruction takes
StringRef OverloadTypes; // overload types if applicable
StringRef FnAttr; // attribute shorthands: rn=does not access
// memory,ro=only reads from memory
@@ -63,13 +63,13 @@ struct DxilOperationDesc {
// the wave
SmallVector<StringRef, 4>
ShaderStages; // shader stages to which this applies, empty for all.
- DxilShaderModel ShaderModel; // minimum shader model required
- DxilShaderModel ShaderModelTranslated; // minimum shader model required with
+ DXILShaderModel ShaderModel; // minimum shader model required
+ DXILShaderModel ShaderModelTranslated; // minimum shader model required with
// translation by linker
int OverloadParamIndex; // parameter index which control the overload.
// When < 0, should be only 1 overload type.
SmallVector<StringRef, 4> counters; // counters for this inst.
- DxilOperationDesc(const Record *R) {
+ DXILOperationDesc(const Record *R) {
OpName = R->getValueAsString("OpName");
OpCode = R->getValueAsInt("OpCode");
OpClass = R->getValueAsDef("OpClass")->getValueAsString("Name");
@@ -89,7 +89,7 @@ struct DxilOperationDesc {
OverloadParamIndex = -1;
for (unsigned I = 0; I < ParamList->size(); ++I) {
Record *Param = ParamList->getElementAsRecord(I);
- Params.emplace_back(DxilParameter(Param));
+ Params.emplace_back(DXILParameter(Param));
auto &CurParam = Params.back();
if (CurParam.Kind >= ParameterKind::OVERLOAD)
OverloadParamIndex = I;
@@ -118,7 +118,7 @@ static ParameterKind parameterTypeNameToKind(StringRef Name) {
.Default(ParameterKind::INVALID);
}
-DxilParameter::DxilParameter(const Record *R) {
+DXILParameter::DXILParameter(const Record *R) {
Name = R->getValueAsString("Name");
Pos = R->getValueAsInt("Pos");
Kind = parameterTypeNameToKind(R->getValueAsString("LLVMType"));
@@ -163,7 +163,7 @@ static std::string parameterKindToString(ParameterKind Kind) {
llvm_unreachable("Unknown llvm::dxil::ParameterKind enum");
}
-static void emitDxilOpEnum(DxilOperationDesc &Op, raw_ostream &OS) {
+static void emitDXILOpEnum(DXILOperationDesc &Op, raw_ostream &OS) {
// Name = ID, // Doc
OS << Op.OpName << " = " << Op.OpCode << ", // " << Op.Doc << "\n";
}
@@ -178,10 +178,10 @@ static std::string buildCategoryStr(StringSet<> &Cetegorys) {
}
// Emit enum declaration for DXIL.
-static void emitDxilEnums(std::vector<DxilOperationDesc> &Ops,
+static void emitDXILEnums(std::vector<DXILOperationDesc> &Ops,
raw_ostream &OS) {
// Sort by Category + OpName.
- llvm::sort(Ops, [](DxilOperationDesc &A, DxilOperationDesc &B) {
+ llvm::sort(Ops, [](DXILOperationDesc &A, DXILOperationDesc &B) {
// Group by Category first.
if (A.Category == B.Category)
// Inside same Category, order by OpName.
@@ -201,7 +201,7 @@ static void emitDxilEnums(std::vector<DxilOperationDesc> &Ops,
OS << "\n// " << Category << "\n";
PrevCategory = Category;
}
- emitDxilOpEnum(Op, OS);
+ emitDXILOpEnum(Op, OS);
auto It = ClassMap.find(Op.OpClass);
if (It != ClassMap.end()) {
It->second.insert(Op.Category);
@@ -249,7 +249,7 @@ static void emitDxilEnums(std::vector<DxilOperationDesc> &Ops,
}
// Emit map from llvm intrinsic to DXIL operation.
-static void emitDxilIntrinsicMap(std::vector<DxilOperationDesc> &Ops,
+static void emitDXILIntrinsicMap(std::vector<DXILOperationDesc> &Ops,
raw_ostream &OS) {
OS << "\n";
// FIXME: use array instead of SmallDenseMap.
@@ -266,7 +266,7 @@ static void emitDxilIntrinsicMap(std::vector<DxilOperationDesc> &Ops,
OS << "\n";
}
-static std::string emitDxilOperationFnAttr(StringRef FnAttr) {
+static std::string emitDXILOperationFnAttr(StringRef FnAttr) {
return StringSwitch<std::string>(FnAttr)
.Case("rn", "Attribute::ReadNone")
.Case("ro", "Attribute::ReadOnly")
@@ -287,7 +287,7 @@ static std::string getOverloadKind(StringRef Overload) {
.Default("OverloadKind::VOID");
}
-static std::string getDxilOperationOverload(StringRef Overloads) {
+static std::string getDXILOperationOverload(StringRef Overloads) {
SmallVector<StringRef> OverloadStrs;
Overloads.split(OverloadStrs, ';', /*MaxSplit*/ -1, /*KeepEmpty*/ false);
// Format is: OverloadKind::FLOAT | OverloadKind::HALF
@@ -311,7 +311,7 @@ static std::string lowerFirstLetter(StringRef Name) {
return LowerName;
}
-static std::string getDxilOpClassName(StringRef OpClass) {
+static std::string getDXILOpClassName(StringRef OpClass) {
// Lower first letter expect for special case.
return StringSwitch<std::string>(OpClass)
.Case("CBufferLoad", "cbufferLoad")
@@ -320,10 +320,10 @@ static std::string getDxilOpClassName(StringRef OpClass) {
.Default(lowerFirstLetter(OpClass));
}
-static void emitDxilOperationTable(std::vector<DxilOperationDesc> &Ops,
+static void emitDXILOperationTable(std::vector<DXILOperationDesc> &Ops,
raw_ostream &OS) {
// Sort by OpCode.
- llvm::sort(Ops, [](DxilOperationDesc &A, DxilOperationDesc &B) {
+ llvm::sort(Ops, [](DXILOperationDesc &A, DXILOperationDesc &B) {
return A.OpCode < B.OpCode;
});
@@ -340,7 +340,7 @@ static void emitDxilOperationTable(std::vector<DxilOperationDesc> &Ops,
if (ClassSet.contains(Op.OpClass))
continue;
ClassSet.insert(Op.OpClass);
- OpClassStrings.add(getDxilOpClassName(Op.OpClass));
+ OpClassStrings.add(getDXILOpClassName(Op.OpClass));
SmallVector<ParameterKind> ParamKindVec;
for (auto &Param : Op.Params) {
ParamKindVec.emplace_back(Param.Kind);
@@ -366,9 +366,9 @@ static void emitDxilOperationTable(std::vector<DxilOperationDesc> &Ops,
for (auto &Op : Ops) {
OS << " { dxil::OpCode::" << Op.OpName << ", "
<< OpStrings.get(Op.OpName.str()) << ", OpCodeClass::" << Op.OpClass
- << ", " << OpClassStrings.get(getDxilOpClassName(Op.OpClass)) << ", "
- << getDxilOperationOverload(Op.OverloadTypes) << ", "
- << emitDxilOperationFnAttr(Op.FnAttr) << ", " << Op.OverloadParamIndex
+ << ", " << OpClassStrings.get(getDXILOpClassName(Op.OpClass)) << ", "
+ << getDXILOperationOverload(Op.OverloadTypes) << ", "
+ << emitDXILOperationFnAttr(Op.FnAttr) << ", " << Op.OverloadParamIndex
<< ", " << Op.Params.size() << ", "
<< Parameters.get(ParameterMap[Op.OpClass]) << " },\n";
}
@@ -392,27 +392,27 @@ static void emitDxilOperationTable(std::vector<DxilOperationDesc> &Ops,
OS << "static const char *getOpCodeName(dxil::OpCode Op) {\n\n";
OpStrings.emitStringLiteralDef(OS,
- " static const char DxilOpCodeNameTable[]");
+ " static const char DXILOpCodeNameTable[]");
OS << " auto *Prop = getOpCodeProperty(Op);\n";
OS << " unsigned Index = Prop->OpCodeNameOffset;\n";
- OS << " return DxilOpCodeNameTable + Index;\n";
+ OS << " return DXILOpCodeNameTable + Index;\n";
OS << "}\n\n";
OS << "static const char *getOpCodeClassName(const OpCodeProperty &Prop) "
"{\n\n";
OpClassStrings.emitStringLiteralDef(
- OS, " static const char DxilOpCodeClassNameTable[]");
+ OS, " static const char DXILOpCodeClassNameTable[]");
OS << " unsigned Index = Prop.OpCodeClassNameOffset;\n";
- OS << " return DxilOpCodeClassNameTable + Index;\n";
+ OS << " return DXILOpCodeClassNameTable + Index;\n";
OS << "}\n ";
OS << "static const ParameterKind *getOpCodeParameterKind(const "
"OpCodeProperty &Prop) "
"{\n\n";
- OS << " static const ParameterKind DxilOpParameterKindTable[] = {\n";
+ OS << " static const ParameterKind DXILOpParameterKindTable[] = {\n";
Parameters.emit(
OS,
[](raw_ostream &ParamOS, ParameterKind Kind) {
@@ -421,35 +421,35 @@ static void emitDxilOperationTable(std::vector<DxilOperationDesc> &Ops,
"ParameterKind::INVALID");
OS << " };\n\n";
OS << " unsigned Index = Prop.ParameterTableOffset;\n";
- OS << " return DxilOpParameterKindTable + Index;\n";
+ OS << " return DXILOpParameterKindTable + Index;\n";
OS << "}\n ";
}
-static void EmitDxilOperation(RecordKeeper &Records, raw_ostream &OS) {
- std::vector<Record *> Ops = Records.getAllDerivedDefinitions("DxilOperation");
+static void EmitDXILOperation(RecordKeeper &Records, raw_ostream &OS) {
+ std::vector<Record *> Ops = Records.getAllDerivedDefinitions("DXILOperation");
OS << "// Generated code, do not edit.\n";
OS << "\n";
- std::vector<DxilOperationDesc> DXILOps;
+ std::vector<DXILOperationDesc> DXILOps;
DXILOps.reserve(Ops.size());
for (auto *Record : Ops) {
- DXILOps.emplace_back(DxilOperationDesc(Record));
+ DXILOps.emplace_back(DXILOperationDesc(Record));
}
OS << "#ifdef DXIL_OP_ENUM\n";
- emitDxilEnums(DXILOps, OS);
+ emitDXILEnums(DXILOps, OS);
OS << "#endif\n\n";
OS << "#ifdef DXIL_OP_INTRINSIC_MAP\n";
- emitDxilIntrinsicMap(DXILOps, OS);
+ emitDXILIntrinsicMap(DXILOps, OS);
OS << "#endif\n\n";
OS << "#ifdef DXIL_OP_OPERATION_TABLE\n";
- emitDxilOperationTable(DXILOps, OS);
+ emitDXILOperationTable(DXILOps, OS);
OS << "#endif\n\n";
OS << "\n";
}
-static TableGen::Emitter::Opt X("gen-dxil-operation", EmitDxilOperation,
+static TableGen::Emitter::Opt X("gen-dxil-operation", EmitDXILOperation,
"Generate DXIL operation information");
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