[llvm] 92b3382 - [DebugInfo/MIR] Convert tests to opaque pointers (NFC)
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 6 12:59:54 PST 2024
Author: Fangrui Song
Date: 2024-02-06T12:59:49-08:00
New Revision: 92b33822e989884d29465d34769b07d78aeb1a84
URL: https://github.com/llvm/llvm-project/commit/92b33822e989884d29465d34769b07d78aeb1a84
DIFF: https://github.com/llvm/llvm-project/commit/92b33822e989884d29465d34769b07d78aeb1a84.diff
LOG: [DebugInfo/MIR] Convert tests to opaque pointers (NFC)
Link: https://discourse.llvm.org/t/enabling-opaque-pointers-by-default/61322
Added:
Modified:
llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir
llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir
llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir
llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir
llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
llvm/test/DebugInfo/MIR/ARM/param-reg-const-mix.mir
llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
llvm/test/DebugInfo/MIR/ARM/split-superreg.mir
llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir
llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir
llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir
llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir
llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
llvm/test/DebugInfo/MIR/Mips/dbg-call-site-copy-sub-reg.mir
llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation-64bit.mir
llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation.mir
llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu-64bit.mir
llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu.mir
llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
llvm/test/DebugInfo/MIR/X86/avoid-single-entry-value-location.mir
llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
llvm/test/DebugInfo/MIR/X86/empty-inline.mir
llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks.mir
llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks2.mir
llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
llvm/test/DebugInfo/MIR/X86/machine-cse.mir
llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir
llvm/test/DebugInfo/MIR/X86/machinesink.mir
llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir
llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir
llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir
llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
Removed:
################################################################################
diff --git a/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir b/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
index 618e979aa5641..c245684f1fca8 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
@@ -32,16 +32,16 @@
entry:
%x.addr = alloca i32, align 4
tail call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !19, metadata !22), !dbg !23
- store i32 %x, i32* %x.addr, align 4, !tbaa !24
+ store i32 %x, ptr %x.addr, align 4, !tbaa !24
tail call void @llvm.dbg.value(metadata i32 %y, i64 0, metadata !20, metadata !22), !dbg !28
- tail call void @llvm.dbg.declare(metadata %struct.Rect* undef, metadata !21, metadata !22), !dbg !29
+ tail call void @llvm.dbg.declare(metadata ptr undef, metadata !21, metadata !22), !dbg !29
tail call void @g([4 x double] %s.coerce) #4, !dbg !30
%tobool = icmp eq i32 %y, 0, !dbg !31
br i1 %tobool, label %if.end, label %if.then, !dbg !33
if.then: ; preds = %entry
- tail call void @llvm.dbg.value(metadata i32* %x.addr, i64 0, metadata !19, metadata !22), !dbg !23
- call void @h(i32* nonnull %x.addr) #4, !dbg !34
+ tail call void @llvm.dbg.value(metadata ptr %x.addr, i64 0, metadata !19, metadata !22), !dbg !23
+ call void @h(ptr nonnull %x.addr) #4, !dbg !34
br label %if.end, !dbg !34
if.end: ; preds = %if.then, %entry
@@ -50,9 +50,9 @@
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare void @g([4 x double]) local_unnamed_addr #2
- declare void @h(i32*) local_unnamed_addr #2
+ declare void @h(ptr) local_unnamed_addr #2
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
- declare void @llvm.stackprotector(i8*, i8**) #3
+ declare void @llvm.stackprotector(ptr, ptr) #3
attributes #0 = { nounwind optsize ssp }
attributes #1 = { nounwind readnone speculatable }
diff --git a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
index 3e2244f76c905..cb3e780664404 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
@@ -20,7 +20,7 @@
define dso_local i64 @foo() local_unnamed_addr !dbg !12 {
entry:
- %0 = load i64, i64* @global, align 8, !dbg !17
+ %0 = load i64, ptr @global, align 8, !dbg !17
call void @llvm.dbg.value(metadata i64 %0, metadata !16, metadata !DIExpression()), !dbg !17
%add = add nsw i64 %0, 123, !dbg !17
%sub = add nsw i64 %0, -456, !dbg !17
diff --git a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir
index 59d886cf32114..8363b145e42ef 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir
@@ -16,14 +16,14 @@
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-ios10.0.0"
- %struct.fat_ptr = type { i32*, i32*, i32* }
+ %struct.fat_ptr = type { ptr, ptr, ptr }
- define i32 @bar(%struct.fat_ptr* nocapture readonly %f) local_unnamed_addr !dbg !13 {
+ define i32 @bar(ptr nocapture readonly %f) local_unnamed_addr !dbg !13 {
entry:
- call void @llvm.dbg.declare(metadata %struct.fat_ptr* %f, metadata !23, metadata !DIExpression()), !dbg !24
- %ptr2 = bitcast %struct.fat_ptr* %f to i32**, !dbg !25
- %0 = load i32*, i32** %ptr2, align 8, !dbg !25
- %1 = load i32, i32* %0, align 4, !dbg !31
+ call void @llvm.dbg.declare(metadata ptr %f, metadata !23, metadata !DIExpression()), !dbg !24
+ %ptr2 = bitcast ptr %f to ptr, !dbg !25
+ %0 = load ptr, ptr %ptr2, align 8, !dbg !25
+ %1 = load i32, ptr %0, align 4, !dbg !31
%call = tail call i32 @baz(i32 %1), !dbg !34
%call1 = tail call i32 @baz(i32 %call), !dbg !35
ret i32 %call1, !dbg !36
diff --git a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir
index c5157f0a0d3bd..44aa53c04a9d0 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir
@@ -35,14 +35,14 @@
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "arm64-apple-ios10.0.0"
- %struct.fat_ptr = type { i32*, i32*, i32* }
+ %struct.fat_ptr = type { ptr, ptr, ptr }
- define i32 @bar(%struct.fat_ptr* nocapture readonly %f) local_unnamed_addr !dbg !13 {
+ define i32 @bar(ptr nocapture readonly %f) local_unnamed_addr !dbg !13 {
entry:
- call void @llvm.dbg.declare(metadata %struct.fat_ptr* %f, metadata !23, metadata !DIExpression()), !dbg !24
- %ptr2 = bitcast %struct.fat_ptr* %f to i32**, !dbg !25
- %0 = load i32*, i32** %ptr2, align 8, !dbg !25
- %1 = load i32, i32* %0, align 4, !dbg !31
+ call void @llvm.dbg.declare(metadata ptr %f, metadata !23, metadata !DIExpression()), !dbg !24
+ %ptr2 = bitcast ptr %f to ptr, !dbg !25
+ %0 = load ptr, ptr %ptr2, align 8, !dbg !25
+ %1 = load i32, ptr %0, align 4, !dbg !31
%call = tail call i32 @baz(i32 %1), !dbg !34
%call1 = tail call i32 @baz(i32 %call), !dbg !35
ret i32 %call1, !dbg !36
diff --git a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir
index 41665ff71d108..9df0044d39711 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir
@@ -47,42 +47,42 @@
call void @llvm.dbg.value(metadata i32 %arg1, metadata !17, metadata !DIExpression()), !dbg !21
call void @llvm.dbg.value(metadata i32 %arg2, metadata !18, metadata !DIExpression()), !dbg !21
call void @llvm.dbg.value(metadata i32 %arg3, metadata !19, metadata !DIExpression()), !dbg !21
- store i32 %arg3, i32* %arg3.addr, align 4
- %0 = bitcast i32* %a to i8*, !dbg !21
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0), !dbg !21
+ store i32 %arg3, ptr %arg3.addr, align 4
+ %0 = bitcast ptr %a to ptr, !dbg !21
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %0), !dbg !21
%add = add nsw i32 %arg1, 2, !dbg !21
%sub = add nsw i32 %arg2, -4, !dbg !21
- call void @llvm.dbg.value(metadata i32* %arg3.addr, metadata !19, metadata !DIExpression(DW_OP_deref)), !dbg !21
- %call = call i32 @func2(i32 %add, i32 %sub, i32* nonnull %arg3.addr), !dbg !21
+ call void @llvm.dbg.value(metadata ptr %arg3.addr, metadata !19, metadata !DIExpression(DW_OP_deref)), !dbg !21
+ %call = call i32 @func2(i32 %add, i32 %sub, ptr nonnull %arg3.addr), !dbg !21
call void @llvm.dbg.value(metadata i32 %call, metadata !20, metadata !DIExpression()), !dbg !21
- store i32 %call, i32* %a, align 4, !dbg !21
- %1 = load i32, i32* %arg3.addr, align 4, !dbg !21
+ store i32 %call, ptr %a, align 4, !dbg !21
+ %1 = load i32, ptr %arg3.addr, align 4, !dbg !21
call void @llvm.dbg.value(metadata i32 %1, metadata !19, metadata !DIExpression()), !dbg !21
%sub1 = add nsw i32 %1, -16, !dbg !21
%add2 = add nsw i32 %arg1, 8, !dbg !21
- call void @llvm.dbg.value(metadata i32* %a, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !21
- %call3 = call i32 @func2(i32 %sub1, i32 %add2, i32* nonnull %a), !dbg !21
- %2 = load i32, i32* %a, align 4, !dbg !21
+ call void @llvm.dbg.value(metadata ptr %a, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !21
+ %call3 = call i32 @func2(i32 %sub1, i32 %add2, ptr nonnull %a), !dbg !21
+ %2 = load i32, ptr %a, align 4, !dbg !21
call void @llvm.dbg.value(metadata i32 %2, metadata !20, metadata !DIExpression()), !dbg !21
%add4 = add nsw i32 %2, %call3, !dbg !21
call void @llvm.dbg.value(metadata i32 %add4, metadata !20, metadata !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value)), !dbg !21
- call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0), !dbg !21
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %0), !dbg !21
ret i32 %add4, !dbg !21
}
; Function Attrs: argmemonly nounwind willreturn
- declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+ declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
- declare !dbg !4 dso_local i32 @func2(i32, i32, i32*) local_unnamed_addr
+ declare !dbg !4 dso_local i32 @func2(i32, i32, ptr) local_unnamed_addr
; Function Attrs: argmemonly nounwind willreturn
- declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+ declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
; Function Attrs: nounwind readnone speculatable willreturn
declare void @llvm.dbg.value(metadata, metadata, metadata)
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
attributes #0 = { "frame-pointer"="all" }
diff --git a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
index adf2d2ec791f1..389121914ba8b 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
@@ -55,7 +55,7 @@
call void @llvm.dbg.value(metadata i32 %p, metadata !40, metadata !DIExpression()), !dbg !42
call void @llvm.dbg.value(metadata i64 %q, metadata !41, metadata !DIExpression()), !dbg !42
%conv = trunc i64 %q to i32, !dbg !43
- %0 = load i32, i32* @global, align 4, !dbg !43
+ %0 = load i32, ptr @global, align 4, !dbg !43
tail call void @call_int_int(i32 %conv, i32 %0), !dbg !43
ret i32 %p, !dbg !44
}
diff --git a/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir b/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
index 98ec9dc8fa417..1479b3728ad0e 100644
--- a/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
+++ b/llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
@@ -21,12 +21,12 @@
@bt = global i32 0, align 4
- define void @_ZN1v2bvEv(%class.v* nocapture readonly %this) local_unnamed_addr align 2 !dbg !14 {
+ define void @_ZN1v2bvEv(ptr nocapture readonly %this) local_unnamed_addr align 2 !dbg !14 {
entry:
%bz = alloca %class.j, align 8
%att = alloca %class.j, align 8
- %ap = getelementptr inbounds %class.v, %class.v* %this, i64 0, i32 1
- %0 = load i8, i8* %ap, align 4
+ %ap = getelementptr inbounds %class.v, ptr %this, i64 0, i32 1
+ %0 = load i8, ptr %ap, align 4
%conv = sext i8 %0 to i32
switch i32 %conv, label %sw.epilog [
i32 1, label %_ZN1jILi6EN1a1fEE1mEj.exit
@@ -34,24 +34,24 @@
]
_ZN1jILi6EN1a1fEE1mEj.exit: ; preds = %entry
- %1 = bitcast %class.j* %att to i64*
- %2 = bitcast %class.j* %bz to i64*
- store i64 1, i64* %2, align 8
+ %1 = bitcast ptr %att to ptr
+ %2 = bitcast ptr %bz to ptr
+ store i64 1, ptr %2, align 8
call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !18, metadata !23), !dbg !24
- store i64 1, i64* %1, align 8, !dbg !27
+ store i64 1, ptr %1, align 8, !dbg !27
br label %sw.epilog
sw.bb2: ; preds = %entry
- %3 = bitcast %class.j* %att to i64*
- %4 = bitcast %class.j* %bz to i64*
- %.pre = load i64, i64* %3, align 8
- %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i13.phi.trans.insert = getelementptr inbounds %class.j, %class.j* %bz, i64 0, i32 1
- %.phi.trans.insert = bitcast i32* %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i13.phi.trans.insert to i64*
- %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14.pre = load i64, i64* %.phi.trans.insert, align 8
- %.pre25 = load i64, i64* %4, align 8
- %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i.phi.trans.insert = getelementptr inbounds %class.j, %class.j* %att, i64 0, i32 1
- %.phi.trans.insert26 = bitcast i32* %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i.phi.trans.insert to i64*
- %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i.pre = load i64, i64* %.phi.trans.insert26, align 8
+ %3 = bitcast ptr %att to ptr
+ %4 = bitcast ptr %bz to ptr
+ %.pre = load i64, ptr %3, align 8
+ %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i13.phi.trans.insert = getelementptr inbounds %class.j, ptr %bz, i64 0, i32 1
+ %.phi.trans.insert = bitcast ptr %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i13.phi.trans.insert to ptr
+ %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14.pre = load i64, ptr %.phi.trans.insert, align 8
+ %.pre25 = load i64, ptr %4, align 8
+ %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i.phi.trans.insert = getelementptr inbounds %class.j, ptr %att, i64 0, i32 1
+ %.phi.trans.insert26 = bitcast ptr %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i.phi.trans.insert to ptr
+ %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i.pre = load i64, ptr %.phi.trans.insert26, align 8
br label %sw.epilog
sw.epilog: ; preds = %sw.bb2, %_ZN1jILi6EN1a1fEE1mEj.exit, %entry
@@ -59,26 +59,26 @@
%5 = phi i64 [ %.pre25, %sw.bb2 ], [ 0, %entry ], [ 1, %_ZN1jILi6EN1a1fEE1mEj.exit ]
%agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14 = phi i64 [ %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14.pre, %sw.bb2 ], [ undef, %entry ], [ undef, %_ZN1jILi6EN1a1fEE1mEj.exit ]
%6 = phi i64 [ %.pre, %sw.bb2 ], [ 0, %entry ], [ 1, %_ZN1jILi6EN1a1fEE1mEj.exit ]
- %bw1 = bitcast %class.v* %this to i32*
- %7 = load i32, i32* %bw1, align 4
- %bx = getelementptr inbounds %class.v, %class.v* %this, i64 0, i32 2
- %8 = load i8, i8* %bx, align 1
+ %bw1 = bitcast ptr %this to ptr
+ %7 = load i32, ptr %bw1, align 4
+ %bx = getelementptr inbounds %class.v, ptr %this, i64 0, i32 2
+ %8 = load i8, ptr %bx, align 1
%tobool = icmp ne i8 %8, 0
%.fca.0.insert9 = insertvalue [2 x i64] undef, i64 %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14, 0
%.fca.1.insert12 = insertvalue [2 x i64] %.fca.0.insert9, i64 %5, 1
%.fca.0.insert = insertvalue [2 x i64] undef, i64 %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i, 0
%.fca.1.insert = insertvalue [2 x i64] %.fca.0.insert, i64 %6, 1
- call void @_Z2byi1LS_bbPi(i32 %7, [2 x i64] %.fca.1.insert12, [2 x i64] %.fca.1.insert, i1 %tobool, i1 false, i32* nonnull @bt)
+ call void @_Z2byi1LS_bbPi(i32 %7, [2 x i64] %.fca.1.insert12, [2 x i64] %.fca.1.insert, i1 %tobool, i1 false, ptr nonnull @bt)
ret void
}
- declare void @_Z2byi1LS_bbPi(i32, [2 x i64], [2 x i64], i1, i1, i32*) local_unnamed_addr
+ declare void @_Z2byi1LS_bbPi(i32, [2 x i64], [2 x i64], i1, i1, ptr) local_unnamed_addr
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #1
+ declare void @llvm.stackprotector(ptr, ptr) #1
attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind }
diff --git a/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir b/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
index e6a1e267ecba5..ee4baf7e567c2 100644
--- a/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
@@ -27,7 +27,7 @@
define arm_aapcs_vfpcc i32 @b(double %c) local_unnamed_addr #0 !dbg !16 {
entry:
call void @llvm.dbg.value(metadata double %c, metadata !21, metadata !DIExpression()), !dbg !22
- %call = tail call arm_aapcs_vfpcc i32 bitcast (i32 (...)* @d to i32 ()*)(), !dbg !23
+ %call = tail call arm_aapcs_vfpcc i32 @d(), !dbg !23
%conv = fptrunc double %c to float, !dbg !24
%call1 = tail call arm_aapcs_vfpcc i32 @a(float %conv), !dbg !25
ret i32 undef, !dbg !26
@@ -35,7 +35,7 @@
declare arm_aapcs_vfpcc i32 @d(...) local_unnamed_addr #0
declare !dbg !4 arm_aapcs_vfpcc i32 @a(float) local_unnamed_addr #0
declare void @llvm.dbg.value(metadata, metadata, metadata)
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
attributes #0 = { "disable-tail-calls"="false" "frame-pointer"="all" "target-features"="+thumb-mode,+vfp2" }
diff --git a/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir b/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
index 8bfb0cdc1a00c..730d0f47cb55b 100644
--- a/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
@@ -22,14 +22,14 @@
define arm_aapcs_vfpcc i32 @b(double %c) local_unnamed_addr #0 !dbg !16 {
entry:
call void @llvm.dbg.value(metadata double %c, metadata !18, metadata !DIExpression()), !dbg !19
- %call = tail call arm_aapcs_vfpcc i32 bitcast (i32 (...)* @d to i32 ()*)(), !dbg !20
+ %call = tail call arm_aapcs_vfpcc i32 @d(), !dbg !20
%call1 = tail call arm_aapcs_vfpcc i32 @a(double %c), !dbg !21
ret i32 undef, !dbg !22
}
declare arm_aapcs_vfpcc i32 @d(...) local_unnamed_addr #0
declare !dbg !4 arm_aapcs_vfpcc i32 @a(double) local_unnamed_addr #0
declare void @llvm.dbg.value(metadata, metadata, metadata)
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
attributes #0 = { "disable-tail-calls"="false" "frame-pointer"="all" "target-features"="+thumb-mode,+vfp2" }
diff --git a/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir b/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
index 0ba0b78203ef2..ce9fc094fa297 100644
--- a/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
@@ -43,42 +43,42 @@
call void @llvm.dbg.value(metadata i32 %arg1, metadata !18, metadata !DIExpression()), !dbg !22
call void @llvm.dbg.value(metadata i32 %arg2, metadata !19, metadata !DIExpression()), !dbg !22
call void @llvm.dbg.value(metadata i32 %arg3, metadata !20, metadata !DIExpression()), !dbg !22
- store i32 %arg3, i32* %arg3.addr, align 4
- %0 = bitcast i32* %a to i8*, !dbg !22
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0), !dbg !22
+ store i32 %arg3, ptr %arg3.addr, align 4
+ %0 = bitcast ptr %a to ptr, !dbg !22
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %0), !dbg !22
%add = add nsw i32 %arg1, 2, !dbg !22
%sub = add nsw i32 %arg2, -4, !dbg !22
- call void @llvm.dbg.value(metadata i32* %arg3.addr, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !22
- %call = call arm_aapcscc i32 @func2(i32 %add, i32 %sub, i32* nonnull %arg3.addr), !dbg !22
+ call void @llvm.dbg.value(metadata ptr %arg3.addr, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !22
+ %call = call arm_aapcscc i32 @func2(i32 %add, i32 %sub, ptr nonnull %arg3.addr), !dbg !22
call void @llvm.dbg.value(metadata i32 %call, metadata !21, metadata !DIExpression()), !dbg !22
- store i32 %call, i32* %a, align 4, !dbg !22
- %1 = load i32, i32* %arg3.addr, align 4, !dbg !22
+ store i32 %call, ptr %a, align 4, !dbg !22
+ %1 = load i32, ptr %arg3.addr, align 4, !dbg !22
call void @llvm.dbg.value(metadata i32 %1, metadata !20, metadata !DIExpression()), !dbg !22
%sub1 = add nsw i32 %1, -16, !dbg !22
%add2 = add nsw i32 %arg1, 8, !dbg !22
- call void @llvm.dbg.value(metadata i32* %a, metadata !21, metadata !DIExpression(DW_OP_deref)), !dbg !22
- %call3 = call arm_aapcscc i32 @func2(i32 %sub1, i32 %add2, i32* nonnull %a), !dbg !22
- %2 = load i32, i32* %a, align 4, !dbg !22
+ call void @llvm.dbg.value(metadata ptr %a, metadata !21, metadata !DIExpression(DW_OP_deref)), !dbg !22
+ %call3 = call arm_aapcscc i32 @func2(i32 %sub1, i32 %add2, ptr nonnull %a), !dbg !22
+ %2 = load i32, ptr %a, align 4, !dbg !22
call void @llvm.dbg.value(metadata i32 %2, metadata !21, metadata !DIExpression()), !dbg !22
%add4 = add nsw i32 %2, %call3, !dbg !22
call void @llvm.dbg.value(metadata i32 %add4, metadata !21, metadata !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value)), !dbg !22
- call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0), !dbg !22
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %0), !dbg !22
ret i32 %add4, !dbg !22
}
; Function Attrs: argmemonly nounwind willreturn
- declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+ declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
- declare !dbg !4 dso_local arm_aapcscc i32 @func2(i32, i32, i32*) local_unnamed_addr
+ declare !dbg !4 dso_local arm_aapcscc i32 @func2(i32, i32, ptr) local_unnamed_addr
; Function Attrs: argmemonly nounwind willreturn
- declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+ declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
; Function Attrs: nounwind readnone speculatable willreturn
declare void @llvm.dbg.value(metadata, metadata, metadata)
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
attributes #0 = { "frame-pointer"="all" "target-features"="+armv7-a" }
diff --git a/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir b/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
index b25b1c90d6348..a2242acafebb9 100644
--- a/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
@@ -33,14 +33,14 @@
}
; Function Attrs: noinline nounwind optsize
- define internal arm_aapcs_vfpcc void @callee(i32* %p1) unnamed_addr #0 !dbg !29 {
+ define internal arm_aapcs_vfpcc void @callee(ptr %p1) unnamed_addr #0 !dbg !29 {
entry:
unreachable
}
- declare !dbg !4 arm_aapcs_vfpcc i32* @value()
- declare !dbg !9 arm_aapcs_vfpcc i32 @interesting(i32*)
- declare !dbg !12 arm_aapcs_vfpcc void @ext(i32*)
+ declare !dbg !4 arm_aapcs_vfpcc ptr @value()
+ declare !dbg !9 arm_aapcs_vfpcc i32 @interesting(ptr)
+ declare !dbg !12 arm_aapcs_vfpcc void @ext(ptr)
; Function Attrs: nounwind readnone speculatable willreturn
declare void @llvm.dbg.value(metadata, metadata, metadata) #1
diff --git a/llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir b/llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir
index e79f905148a13..e0c89647bbe2c 100644
--- a/llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir
@@ -33,34 +33,34 @@
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "armv6kz-unknown-linux-gnueabihf"
- @mri_common_symbol = external dso_local local_unnamed_addr global i32*, align 4
+ @mri_common_symbol = external dso_local local_unnamed_addr global ptr, align 4
; Function Attrs: nounwind
- define dso_local void @baa(i32* %secptr, i32 %subseg) local_unnamed_addr #0 !dbg !14 {
+ define dso_local void @baa(ptr %secptr, i32 %subseg) local_unnamed_addr #0 !dbg !14 {
entry:
- call void @llvm.dbg.value(metadata i32* %secptr, metadata !16, metadata !DIExpression()), !dbg !18
+ call void @llvm.dbg.value(metadata ptr %secptr, metadata !16, metadata !DIExpression()), !dbg !18
call void @llvm.dbg.value(metadata i32 %subseg, metadata !17, metadata !DIExpression()), !dbg !18
- %cmp = icmp eq i32* %secptr, null, !dbg !19
+ %cmp = icmp eq ptr %secptr, null, !dbg !19
%cmp1 = icmp eq i32 %subseg, 0, !dbg !21
%or.cond = and i1 %cmp, %cmp1, !dbg !22
br i1 %or.cond, label %if.end, label %if.then, !dbg !22
if.then: ; preds = %entry
- tail call void @foo(i32* %secptr, i32 %subseg), !dbg !23
+ tail call void @foo(ptr %secptr, i32 %subseg), !dbg !23
br label %if.end, !dbg !23
if.end: ; preds = %entry, %if.then
- store i32* null, i32** @mri_common_symbol, align 4, !dbg !24, !tbaa !25
+ store ptr null, ptr @mri_common_symbol, align 4, !dbg !24, !tbaa !25
ret void, !dbg !29
}
- declare !dbg !4 dso_local void @foo(i32*, i32) local_unnamed_addr
+ declare !dbg !4 dso_local void @foo(ptr, i32) local_unnamed_addr
; Function Attrs: nounwind readnone speculatable willreturn
declare void @llvm.dbg.value(metadata, metadata, metadata)
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
attributes #0 = { "frame-pointer"="all" }
@@ -123,7 +123,7 @@ callSites:
- { arg: 1, reg: '$r1' } }
constants:
- id: 0
- value: 'i32** null'
+ value: 'ptr null'
alignment: 4
machineFunctionInfo: {}
body: |
diff --git a/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
index bb9cd5ef5c3b1..c7e19abaa6300 100644
--- a/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
@@ -40,7 +40,7 @@
declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #1
+ declare void @llvm.stackprotector(ptr, ptr) #1
attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind }
diff --git a/llvm/test/DebugInfo/MIR/ARM/param-reg-const-mix.mir b/llvm/test/DebugInfo/MIR/ARM/param-reg-const-mix.mir
index 83b5a6f394dc8..71505e3504aec 100644
--- a/llvm/test/DebugInfo/MIR/ARM/param-reg-const-mix.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/param-reg-const-mix.mir
@@ -26,7 +26,7 @@
%p1.coerce.fca.1.extract = extractvalue [3 x i32] %p1.coerce, 1
call void @llvm.dbg.value(metadata i32 %p1.coerce.fca.1.extract, metadata !17, metadata !DIExpression(DW_OP_LLVM_fragment, 32, 32)), !dbg !18
call void @llvm.dbg.value(metadata i32 undef, metadata !17, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 32)), !dbg !18
- %call = tail call arm_aapcscc i32 bitcast (i32 (...)* @fn2 to i32 (i32)*)(i32 %p1.coerce.fca.1.extract), !dbg !19
+ %call = tail call arm_aapcscc i32 @fn2(i32 %p1.coerce.fca.1.extract), !dbg !19
%cmp = icmp sge i32 %p1.coerce.fca.0.extract, %call, !dbg !19
%conv = zext i1 %cmp to i32, !dbg !19
ret i32 %conv, !dbg !19
diff --git a/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir b/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
index 9bb255a652578..c119334b0cf56 100644
--- a/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
@@ -24,7 +24,7 @@
define float @f() local_unnamed_addr #0 !dbg !9 {
entry:
- %call = tail call <4 x float> bitcast (<4 x float> (...)* @v to <4 x float> ()*)() #0, !dbg !19
+ %call = tail call <4 x float> @v() #0, !dbg !19
tail call void @llvm.dbg.value(metadata <4 x float> %call, i64 0, metadata !14, metadata !20), !dbg !21
%vecext = extractelement <4 x float> %call, i32 0, !dbg !22
%vecext1 = extractelement <4 x float> %call, i32 1, !dbg !23
diff --git a/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir b/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
index c741c4022382b..70cecd2e57b3e 100644
--- a/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
@@ -20,7 +20,7 @@
define float @f() local_unnamed_addr #0 !dbg !9 {
entry:
- %call = tail call <4 x float> bitcast (<4 x float> (...)* @v to <4 x float> ()*)() #0, !dbg !19
+ %call = tail call <4 x float> @v() #0, !dbg !19
tail call void @llvm.dbg.value(metadata <4 x float> %call, i64 0, metadata !14, metadata !20), !dbg !21
%vecext = extractelement <4 x float> %call, i32 0, !dbg !22
%vecext1 = extractelement <4 x float> %call, i32 1, !dbg !23
diff --git a/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir b/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir
index b7d51a13b7ec6..93dca334a6a43 100644
--- a/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/split-superreg.mir
@@ -20,7 +20,7 @@
define float @f() local_unnamed_addr #0 !dbg !9 {
entry:
- %call = tail call <4 x float> bitcast (<4 x float> (...)* @v to <4 x float> ()*)() #0, !dbg !19
+ %call = tail call <4 x float> @v() #0, !dbg !19
tail call void @llvm.dbg.value(metadata <4 x float> %call, i64 0, metadata !14, metadata !20), !dbg !21
%vecext = extractelement <4 x float> %call, i32 0, !dbg !22
%vecext1 = extractelement <4 x float> %call, i32 1, !dbg !23
diff --git a/llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir b/llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir
index e96f13c535550..22101d514613e 100644
--- a/llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir
+++ b/llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir
@@ -33,9 +33,9 @@
; Function Attrs: nounwind
define void @caller() #0 !dbg !12 {
entry:
- %0 = load i32, i32* @ga, align 4, !dbg !15
- %1 = load i32, i32* @gb, align 4, !dbg !16
- %2 = load i32, i32* @gc, align 4, !dbg !17
+ %0 = load i32, ptr @ga, align 4, !dbg !15
+ %1 = load i32, ptr @gb, align 4, !dbg !16
+ %2 = load i32, ptr @gc, align 4, !dbg !17
call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28}"(), !dbg !18, !srcloc !19
call void @callee(i32 %0, i32 %1, i32 %2), !dbg !20
ret void, !dbg !21
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir
index 512a10d512a43..e3b8df2778543 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir
@@ -42,12 +42,12 @@
%struct.NonTrivial = type { i32 }
; Function Attrs: nounwind uwtable
- define i32 @_Z3foo10NonTrivial(%struct.NonTrivial* nocapture readonly %nt) local_unnamed_addr #0 !dbg !7 {
+ define i32 @_Z3foo10NonTrivial(ptr nocapture readonly %nt) local_unnamed_addr #0 !dbg !7 {
entry:
- tail call void @llvm.dbg.declare(metadata %struct.NonTrivial* %nt, metadata !20, metadata !DIExpression()), !dbg !21
+ tail call void @llvm.dbg.declare(metadata ptr %nt, metadata !20, metadata !DIExpression()), !dbg !21
tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #2, !dbg !22, !srcloc !23
- %i1 = bitcast %struct.NonTrivial* %nt to i32*, !dbg !24
- %0 = load i32, i32* %i1, align 4, !dbg !24, !tbaa !25
+ %i1 = bitcast ptr %nt to ptr, !dbg !24
+ %0 = load i32, ptr %i1, align 4, !dbg !24, !tbaa !25
ret i32 %0, !dbg !30
}
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
index 59d8e735c678f..a3332785e50f1 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
@@ -32,70 +32,70 @@
%"class.std::deque" = type { %"class.std::_Deque_base" }
%"class.std::_Deque_base" = type { %"struct.std::_Deque_base<llvm::Loop *, std::allocator<llvm::Loop *>>::_Deque_impl" }
- %"struct.std::_Deque_base<llvm::Loop *, std::allocator<llvm::Loop *>>::_Deque_impl" = type { %"class.llvm::Loop"***, i64, %"struct.std::_Deque_iterator", %"struct.std::_Deque_iterator" }
+ %"struct.std::_Deque_base<llvm::Loop *, std::allocator<llvm::Loop *>>::_Deque_impl" = type { ptr, i64, %"struct.std::_Deque_iterator", %"struct.std::_Deque_iterator" }
%"class.llvm::Loop" = type opaque
- %"struct.std::_Deque_iterator" = type { %"class.llvm::Loop"**, %"class.llvm::Loop"**, %"class.llvm::Loop"**, %"class.llvm::Loop"*** }
+ %"struct.std::_Deque_iterator" = type { ptr, ptr, ptr, ptr }
- define linkonce_odr void @_ZNSt5dequeIPN4llvm4LoopESaIS2_EE13_M_insert_auxESt15_Deque_iteratorIS2_RS2_PS2_EmRKS2_(%"class.std::deque"* %this, %"struct.std::_Deque_iterator"* %__pos, i64 %__n) local_unnamed_addr align 2 !dbg !3 {
+ define linkonce_odr void @_ZNSt5dequeIPN4llvm4LoopESaIS2_EE13_M_insert_auxESt15_Deque_iteratorIS2_RS2_PS2_EmRKS2_(ptr %this, ptr %__pos, i64 %__n) local_unnamed_addr align 2 !dbg !3 {
entry:
- %0 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7
- %_M_cur6.i = getelementptr inbounds %"class.std::deque", %"class.std::deque"* %this, i64 0, i32 0, i32 0, i32 2, i32 0, !dbg !7
- %1 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** %_M_cur6.i, align 8, !dbg !7
- %2 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7
+ %0 = load ptr, ptr undef, align 8, !dbg !7
+ %_M_cur6.i = getelementptr inbounds %"class.std::deque", ptr %this, i64 0, i32 0, i32 0, i32 2, i32 0, !dbg !7
+ %1 = load ptr, ptr %_M_cur6.i, align 8, !dbg !7
+ %2 = load ptr, ptr undef, align 8, !dbg !7
br i1 undef, label %if.then.i851, label %if.end.i856, !dbg !7
if.then.i851: ; preds = %entry
- %.pre1038 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7
- %3 = bitcast %"class.std::deque"* %this to i8*, !dbg !7
- %sunkaddr = getelementptr inbounds i8, i8* %3, i64 40, !dbg !7
- %4 = bitcast i8* %sunkaddr to %"class.llvm::Loop"****, !dbg !7
- %.pre1039 = load %"class.llvm::Loop"***, %"class.llvm::Loop"**** %4, align 8, !dbg !7
+ %.pre1038 = load ptr, ptr undef, align 8, !dbg !7
+ %3 = bitcast ptr %this to ptr, !dbg !7
+ %sunkaddr = getelementptr inbounds i8, ptr %3, i64 40, !dbg !7
+ %4 = bitcast ptr %sunkaddr to ptr, !dbg !7
+ %.pre1039 = load ptr, ptr %4, align 8, !dbg !7
br label %if.end.i856, !dbg !7
if.end.i856: ; preds = %if.then.i851, %entry
- %5 = phi %"class.llvm::Loop"*** [ %.pre1039, %if.then.i851 ], [ undef, %entry ], !dbg !7
- %6 = phi %"class.llvm::Loop"** [ %.pre1038, %if.then.i851 ], [ %0, %entry ], !dbg !7
+ %5 = phi ptr [ %.pre1039, %if.then.i851 ], [ undef, %entry ], !dbg !7
+ %6 = phi ptr [ %.pre1038, %if.then.i851 ], [ %0, %entry ], !dbg !7
%sub.i.i.i853 = sub nsw i64 0, %__n, !dbg !7
- %add.ptr.i.i.i.i859 = getelementptr inbounds %"class.llvm::Loop"*, %"class.llvm::Loop"** %1, i64 %sub.i.i.i853, !dbg !7
- store %"class.llvm::Loop"** %6, %"class.llvm::Loop"*** undef, align 8, !dbg !7
- %7 = bitcast %"struct.std::_Deque_iterator"* %__pos to i8*, !dbg !7
- %sunkaddr1 = getelementptr inbounds i8, i8* %7, i64 24, !dbg !7
- %8 = bitcast i8* %sunkaddr1 to %"class.llvm::Loop"****, !dbg !7
- store %"class.llvm::Loop"*** %5, %"class.llvm::Loop"**** %8, align 8, !dbg !7
- %9 = bitcast %"class.std::deque"* %this to i8*, !dbg !7
- %sunkaddr2 = getelementptr inbounds i8, i8* %9, i64 16, !dbg !7
- %10 = bitcast i8* %sunkaddr2 to %"class.llvm::Loop"***, !dbg !7
- %11 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** %10, align 8, !dbg !7
- %12 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7
- %13 = bitcast %"class.std::deque"* %this to i8*, !dbg !7
- %sunkaddr3 = getelementptr inbounds i8, i8* %13, i64 40, !dbg !7
- %14 = bitcast i8* %sunkaddr3 to %"class.llvm::Loop"****, !dbg !7
- %15 = load %"class.llvm::Loop"***, %"class.llvm::Loop"**** %14, align 8, !dbg !7
+ %add.ptr.i.i.i.i859 = getelementptr inbounds ptr, ptr %1, i64 %sub.i.i.i853, !dbg !7
+ store ptr %6, ptr undef, align 8, !dbg !7
+ %7 = bitcast ptr %__pos to ptr, !dbg !7
+ %sunkaddr1 = getelementptr inbounds i8, ptr %7, i64 24, !dbg !7
+ %8 = bitcast ptr %sunkaddr1 to ptr, !dbg !7
+ store ptr %5, ptr %8, align 8, !dbg !7
+ %9 = bitcast ptr %this to ptr, !dbg !7
+ %sunkaddr2 = getelementptr inbounds i8, ptr %9, i64 16, !dbg !7
+ %10 = bitcast ptr %sunkaddr2 to ptr, !dbg !7
+ %11 = load ptr, ptr %10, align 8, !dbg !7
+ %12 = load ptr, ptr undef, align 8, !dbg !7
+ %13 = bitcast ptr %this to ptr, !dbg !7
+ %sunkaddr3 = getelementptr inbounds i8, ptr %13, i64 40, !dbg !7
+ %14 = bitcast ptr %sunkaddr3 to ptr, !dbg !7
+ %15 = load ptr, ptr %14, align 8, !dbg !7
br i1 undef, label %if.then.i.i775, label %cond.true.i.i777, !dbg !7
if.then.i.i775: ; preds = %if.end.i856
- %add.ptr.i.i774 = getelementptr inbounds %"class.llvm::Loop"*, %"class.llvm::Loop"** %11, i64 %__n, !dbg !7
+ %add.ptr.i.i774 = getelementptr inbounds ptr, ptr %11, i64 %__n, !dbg !7
br label %_ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796, !dbg !7
cond.true.i.i777: ; preds = %if.end.i856
- %16 = load %"class.llvm::Loop"**, %"class.llvm::Loop"*** undef, align 8, !dbg !7
- %.pre1043 = ptrtoint %"class.llvm::Loop"** %16 to i64, !dbg !7
+ %16 = load ptr, ptr undef, align 8, !dbg !7
+ %.pre1043 = ptrtoint ptr %16 to i64, !dbg !7
br label %_ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796
_ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796: ; preds = %cond.true.i.i777, %if.then.i.i775
%sub.ptr.rhs.cast3.i.i.i.i.i.i.i.i.i690.pre-phi = phi i64 [ undef, %if.then.i.i775 ], [ %.pre1043, %cond.true.i.i777 ], !dbg !7
- %__tmp.sroa.13.0.i788 = phi %"class.llvm::Loop"*** [ %15, %if.then.i.i775 ], [ undef, %cond.true.i.i777 ], !dbg !7
- %__tmp.sroa.10.0.i789 = phi %"class.llvm::Loop"** [ %12, %if.then.i.i775 ], [ undef, %cond.true.i.i777 ], !dbg !7
- %storemerge.i.i791 = phi %"class.llvm::Loop"** [ %add.ptr.i.i774, %if.then.i.i775 ], [ undef, %cond.true.i.i777 ], !dbg !7
- %17 = ptrtoint %"class.llvm::Loop"** %11 to i64, !dbg !7
- %sub.ptr.lhs.cast.i.i.i.i.i.i.i.i.i685 = ptrtoint %"class.llvm::Loop"*** %__tmp.sroa.13.0.i788 to i64, !dbg !7
- %sub.ptr.rhs.cast.i.i.i.i.i.i.i.i.i686 = ptrtoint %"class.llvm::Loop"*** %15 to i64, !dbg !7
+ %__tmp.sroa.13.0.i788 = phi ptr [ %15, %if.then.i.i775 ], [ undef, %cond.true.i.i777 ], !dbg !7
+ %__tmp.sroa.10.0.i789 = phi ptr [ %12, %if.then.i.i775 ], [ undef, %cond.true.i.i777 ], !dbg !7
+ %storemerge.i.i791 = phi ptr [ %add.ptr.i.i774, %if.then.i.i775 ], [ undef, %cond.true.i.i777 ], !dbg !7
+ %17 = ptrtoint ptr %11 to i64, !dbg !7
+ %sub.ptr.lhs.cast.i.i.i.i.i.i.i.i.i685 = ptrtoint ptr %__tmp.sroa.13.0.i788 to i64, !dbg !7
+ %sub.ptr.rhs.cast.i.i.i.i.i.i.i.i.i686 = ptrtoint ptr %15 to i64, !dbg !7
%sub.ptr.sub.i.i.i.i.i.i.i.i.i687 = sub i64 %sub.ptr.lhs.cast.i.i.i.i.i.i.i.i.i685, %sub.ptr.rhs.cast.i.i.i.i.i.i.i.i.i686, !dbg !7
%sub.i.i.i.i.i.i.i.i.i688 = shl i64 %sub.ptr.sub.i.i.i.i.i.i.i.i.i687, 3, !dbg !7
- %sub.ptr.lhs.cast2.i.i.i.i.i.i.i.i.i689 = ptrtoint %"class.llvm::Loop"** %storemerge.i.i791 to i64, !dbg !7
+ %sub.ptr.lhs.cast2.i.i.i.i.i.i.i.i.i689 = ptrtoint ptr %storemerge.i.i791 to i64, !dbg !7
%sub.ptr.sub4.i.i.i.i.i.i.i.i.i691 = sub i64 %sub.ptr.lhs.cast2.i.i.i.i.i.i.i.i.i689, %sub.ptr.rhs.cast3.i.i.i.i.i.i.i.i.i690.pre-phi, !dbg !7
%sub.ptr.div5.i.i.i.i.i.i.i.i.i692 = ashr exact i64 %sub.ptr.sub4.i.i.i.i.i.i.i.i.i691, 3, !dbg !7
- %sub.ptr.lhs.cast7.i.i.i.i.i.i.i.i.i693 = ptrtoint %"class.llvm::Loop"** %12 to i64, !dbg !7
+ %sub.ptr.lhs.cast7.i.i.i.i.i.i.i.i.i693 = ptrtoint ptr %12 to i64, !dbg !7
%sub.ptr.sub9.i.i.i.i.i.i.i.i.i695 = sub i64 %sub.ptr.lhs.cast7.i.i.i.i.i.i.i.i.i693, %17, !dbg !7
%sub.ptr.div10.i.i.i.i.i.i.i.i.i696 = ashr exact i64 %sub.ptr.sub9.i.i.i.i.i.i.i.i.i695, 3, !dbg !7
%mul.i.i.i.i.i.i.i.i.i697 = add nsw i64 %sub.ptr.div10.i.i.i.i.i.i.i.i.i696, -64, !dbg !7
@@ -105,33 +105,33 @@
br i1 %cmp27.i.i.i.i.i.i.i.i700, label %for.body.i.i.i.i.i.i.i.i711.preheader, label %_ZSt22__uninitialized_move_aISt15_Deque_iteratorIPN4llvm4LoopERS3_PS3_ES6_SaIS3_EET0_T_S9_S8_RT1_.exit737, !dbg !7
for.body.i.i.i.i.i.i.i.i711.preheader: ; preds = %_ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796
- %18 = load %"class.llvm::Loop"*, %"class.llvm::Loop"** %11, align 8, !dbg !7
- store %"class.llvm::Loop"* %18, %"class.llvm::Loop"** %add.ptr.i.i.i.i859, align 8, !dbg !7
+ %18 = load ptr, ptr %11, align 8, !dbg !7
+ store ptr %18, ptr %add.ptr.i.i.i.i859, align 8, !dbg !7
ret void
_ZSt22__uninitialized_move_aISt15_Deque_iteratorIPN4llvm4LoopERS3_PS3_ES6_SaIS3_EET0_T_S9_S8_RT1_.exit737: ; preds = %_ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796
- %19 = ptrtoint %"class.llvm::Loop"** %storemerge.i.i791 to i64, !dbg !7
- %20 = ptrtoint %"class.llvm::Loop"*** %__tmp.sroa.13.0.i788 to i64, !dbg !7
- %21 = bitcast %"class.std::deque"* %this to i8*, !dbg !7
- %sunkaddr4 = getelementptr inbounds i8, i8* %21, i64 16, !dbg !7
- %22 = bitcast i8* %sunkaddr4 to %"class.llvm::Loop"***, !dbg !7
- store %"class.llvm::Loop"** %add.ptr.i.i.i.i859, %"class.llvm::Loop"*** %22, align 8, !dbg !7
- store %"class.llvm::Loop"** %2, %"class.llvm::Loop"*** undef, align 8, !dbg !7
- store %"class.llvm::Loop"** %6, %"class.llvm::Loop"*** undef, align 8, !dbg !7
- %23 = bitcast %"class.std::deque"* %this to i8*, !dbg !7
- %sunkaddr5 = getelementptr inbounds i8, i8* %23, i64 40, !dbg !7
- %24 = bitcast i8* %sunkaddr5 to %"class.llvm::Loop"****, !dbg !7
- store %"class.llvm::Loop"*** %5, %"class.llvm::Loop"**** %24, align 8, !dbg !7
- %25 = bitcast %"struct.std::_Deque_iterator"* %__pos to i8*, !dbg !7
- %sunkaddr6 = getelementptr inbounds i8, i8* %25, i64 24, !dbg !7
- %26 = bitcast i8* %sunkaddr6 to %"class.llvm::Loop"****, !dbg !7
- %27 = load %"class.llvm::Loop"***, %"class.llvm::Loop"**** %26, align 8, !dbg !7
- call void @llvm.dbg.value(metadata %"class.llvm::Loop"** %2, metadata !8, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !7
- %sub.ptr.lhs.cast.i.i.i597 = ptrtoint %"class.llvm::Loop"*** %27 to i64, !dbg !7
+ %19 = ptrtoint ptr %storemerge.i.i791 to i64, !dbg !7
+ %20 = ptrtoint ptr %__tmp.sroa.13.0.i788 to i64, !dbg !7
+ %21 = bitcast ptr %this to ptr, !dbg !7
+ %sunkaddr4 = getelementptr inbounds i8, ptr %21, i64 16, !dbg !7
+ %22 = bitcast ptr %sunkaddr4 to ptr, !dbg !7
+ store ptr %add.ptr.i.i.i.i859, ptr %22, align 8, !dbg !7
+ store ptr %2, ptr undef, align 8, !dbg !7
+ store ptr %6, ptr undef, align 8, !dbg !7
+ %23 = bitcast ptr %this to ptr, !dbg !7
+ %sunkaddr5 = getelementptr inbounds i8, ptr %23, i64 40, !dbg !7
+ %24 = bitcast ptr %sunkaddr5 to ptr, !dbg !7
+ store ptr %5, ptr %24, align 8, !dbg !7
+ %25 = bitcast ptr %__pos to ptr, !dbg !7
+ %sunkaddr6 = getelementptr inbounds i8, ptr %25, i64 24, !dbg !7
+ %26 = bitcast ptr %sunkaddr6 to ptr, !dbg !7
+ %27 = load ptr, ptr %26, align 8, !dbg !7
+ call void @llvm.dbg.value(metadata ptr %2, metadata !8, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !7
+ %sub.ptr.lhs.cast.i.i.i597 = ptrtoint ptr %27 to i64, !dbg !7
%sub.ptr.sub.i.i.i599 = sub i64 %sub.ptr.lhs.cast.i.i.i597, %20, !dbg !7
%sub.i.i.i600 = shl i64 %sub.ptr.sub.i.i.i599, 3, !dbg !7
%sub.ptr.div5.i.i.i604 = ashr exact i64 undef, 3, !dbg !7
- %sub.ptr.lhs.cast7.i.i.i605 = ptrtoint %"class.llvm::Loop"** %__tmp.sroa.10.0.i789 to i64, !dbg !7
+ %sub.ptr.lhs.cast7.i.i.i605 = ptrtoint ptr %__tmp.sroa.10.0.i789 to i64, !dbg !7
%sub.ptr.sub9.i.i.i607 = sub i64 %sub.ptr.lhs.cast7.i.i.i605, %19, !dbg !7
%sub.ptr.div10.i.i.i608 = ashr exact i64 %sub.ptr.sub9.i.i.i607, 3, !dbg !7
%mul.i.i.i609 = add nsw i64 %sub.ptr.div10.i.i.i608, -64, !dbg !7
@@ -222,7 +222,7 @@ body: |
CFI_INSTRUCTION offset $r14, -32
CFI_INSTRUCTION offset $r15, -24
CFI_INSTRUCTION offset $rbp, -16
- renamable $r10 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-instr-number 1, debug-location !7 :: (load 8 from `%"class.llvm::Loop"*** undef`)
+ renamable $r10 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-instr-number 1, debug-location !7 :: (load 8 from `ptr undef`)
renamable $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
TEST8rr renamable $al, renamable $al, implicit-def $eflags, implicit killed $eax, debug-location !7
MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $r10 :: (store 8 into %stack.0)
@@ -231,7 +231,7 @@ body: |
bb.2.if.then.i851:
liveins: $rdi, $rdx, $rsi
- renamable $r10 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from `%"class.llvm::Loop"*** undef`)
+ renamable $r10 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from `ptr undef`)
renamable $r9 = MOV64rm renamable $rdi, 1, $noreg, 40, $noreg, debug-location !7 :: (load 8 from %ir.4)
JMP_1 %bb.3
@@ -246,11 +246,11 @@ body: |
renamable $rax = MOV64rm renamable $rdi, 1, $noreg, 16, $noreg, debug-location !7 :: (load 8 from %ir._M_cur6.i)
renamable $r15 = LEA64r $noreg, 8, renamable $rdx, 0, $noreg, debug-location !7
- MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, renamable $r10, debug-location !7 :: (store 8 into `%"class.llvm::Loop"*** undef`)
+ MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, renamable $r10, debug-location !7 :: (store 8 into `ptr undef`)
MOV64mr renamable $rsi, 1, $noreg, 24, $noreg, renamable $r9, debug-location !7 :: (store 8 into %ir.8)
renamable $r13 = MOV64rm renamable $rdi, 1, $noreg, 16, $noreg, debug-location !7 :: (load 8 from %ir.10)
renamable $r11 = MOV64rm renamable $rdi, 1, $noreg, 40, $noreg, debug-location !7 :: (load 8 from %ir.14)
- renamable $r8 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from `%"class.llvm::Loop"*** undef`)
+ renamable $r8 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from `ptr undef`)
renamable $ebp = XOR32rr undef $ebp, undef $ebp, implicit-def dead $eflags
TEST8rr renamable $bpl, renamable $bpl, implicit-def $eflags, implicit killed $ebp, debug-location !7
JCC_1 %bb.5, 5, implicit killed $eflags, debug-location !7
@@ -265,7 +265,7 @@ body: |
bb.5.cond.true.i.i777:
liveins: $rax, $rdi, $rdx, $rsi, $r8, $r9, $r10, $r11, $r13, $r15
- renamable $r12 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from `%"class.llvm::Loop"*** undef`)
+ renamable $r12 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-location !7 :: (load 8 from `ptr undef`)
renamable $r14 = IMPLICIT_DEF debug-location !7
bb.6._ZNKSt15_Deque_iteratorIPN4llvm4LoopERS2_PS2_EplEl.exit796:
@@ -299,8 +299,8 @@ body: |
MOV64mr renamable $rdi, 1, $noreg, 16, $noreg, killed renamable $rax, debug-location !7 :: (store 8 into %ir.22)
renamable $rax = MOV64rm $rsp, 1, $noreg, -8, $noreg :: (load 8 from %stack.0)
- MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, killed renamable $rax, debug-location !7 :: (store 8 into `%"class.llvm::Loop"*** undef`)
- MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, killed renamable $r10, debug-location !7 :: (store 8 into `%"class.llvm::Loop"*** undef`)
+ MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, killed renamable $rax, debug-location !7 :: (store 8 into `ptr undef`)
+ MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, killed renamable $r10, debug-location !7 :: (store 8 into `ptr undef`)
MOV64mr killed renamable $rdi, 1, $noreg, 40, $noreg, killed renamable $r9, debug-location !7 :: (store 8 into %ir.24)
renamable $rax = MOV64rm killed renamable $rsi, 1, $noreg, 24, $noreg, debug-location !7 :: (load 8 from %ir.26)
DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(1, 0), debug-location !7
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
index 7d074b3faefc1..cece656d08978 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
@@ -133,8 +133,8 @@ body: |
%5:gr32 = PHI %15, %bb.0, %7, %bb.5, debug-location !13
%6:gr32 = PHI %15, %bb.0, %13, %bb.5, debug-location !13
%16:gr64 = ADD64rr %4, %4, implicit-def dead $eflags, debug-location !13
- MOV32mr %17, 1, $noreg, 0, $noreg, %5, debug-location !13 :: (store (s32) into `i32* undef`, align 8)
- MOV64mr %18, 1, $noreg, 0, $noreg, killed %16, debug-location !13 :: (store (s64) into `i64* undef`)
+ MOV32mr %17, 1, $noreg, 0, $noreg, %5, debug-location !13 :: (store (s32) into `ptr undef`, align 8)
+ MOV64mr %18, 1, $noreg, 0, $noreg, killed %16, debug-location !13 :: (store (s64) into `ptr undef`)
%20:gr8 = COPY %19.sub_8bit
TEST8rr %20, %20, implicit-def $eflags, debug-location !13
JCC_1 %bb.3, 5, implicit $eflags, debug-location !13
@@ -146,10 +146,10 @@ body: |
successors: %bb.4, %bb.5
%7:gr32 = PHI %5, %bb.1, %21, %bb.2, debug-location !13
- MOV32mr %22, 1, $noreg, 0, $noreg, %7, debug-location !13 :: (store (s32) into `i32* undef`, align 8)
- %8:gr64 = MOV64rm %23, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s64) from `i64* undef`)
- MOV32mr %24, 1, $noreg, 0, $noreg, %3, debug-location !13 :: (store (s32) into `i32* undef`, align 8)
- MOV64mi32 %25, 1, $noreg, 0, $noreg, 0, debug-location !13 :: (store (s64) into `i64* undef`)
+ MOV32mr %22, 1, $noreg, 0, $noreg, %7, debug-location !13 :: (store (s32) into `ptr undef`, align 8)
+ %8:gr64 = MOV64rm %23, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s64) from `ptr undef`)
+ MOV32mr %24, 1, $noreg, 0, $noreg, %3, debug-location !13 :: (store (s32) into `ptr undef`, align 8)
+ MOV64mi32 %25, 1, $noreg, 0, $noreg, 0, debug-location !13 :: (store (s64) into `ptr undef`)
%28:gr8 = COPY %19.sub_8bit
TEST8rr %28, %28, implicit-def $eflags, debug-location !13
JCC_1 %bb.5, 5, implicit $eflags, debug-location !13
@@ -157,15 +157,15 @@ body: |
bb.4:
%29:gr64 = ADD64rr %2, %2, implicit-def dead $eflags, debug-location !13
- MOV64mr %30, 1, $noreg, 0, $noreg, killed %29, debug-location !13 :: (store (s64) into `i64* undef`)
+ MOV64mr %30, 1, $noreg, 0, $noreg, killed %29, debug-location !13 :: (store (s64) into `ptr undef`)
bb.5:
- %9:gr32 = MOV32rm %26, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s32) from `i32* undef`, align 8)
- %10:gr64 = MOV64rm %31, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s64) from `i64* undef`)
+ %9:gr32 = MOV32rm %26, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s32) from `ptr undef`, align 8)
+ %10:gr64 = MOV64rm %31, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s64) from `ptr undef`)
%12:gr64 = ADD64rr %0, %0, implicit-def dead $eflags, debug-location !13
- MOV32mr %32, 1, $noreg, 0, $noreg, %1, debug-location !13 :: (store (s32) into `i32* undef`, align 8)
- MOV64mr %33, 1, $noreg, 0, $noreg, %12, debug-location !13 :: (store (s64) into `i64* undef`)
- %11:gr32 = MOV32rm %34, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s32) from `i32* undef`, align 8)
+ MOV32mr %32, 1, $noreg, 0, $noreg, %1, debug-location !13 :: (store (s32) into `ptr undef`, align 8)
+ MOV64mr %33, 1, $noreg, 0, $noreg, %12, debug-location !13 :: (store (s64) into `ptr undef`)
+ %11:gr32 = MOV32rm %34, 1, $noreg, 0, $noreg, debug-location !13 :: (load (s32) from `ptr undef`, align 8)
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !13
$rdi = COPY %35, debug-location !13
$rsi = COPY %36, debug-location !13
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir b/llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
index 9d11eb77eec26..e6bb87b9e2a46 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
@@ -34,27 +34,27 @@
%class._Tree = type { i8 }
%class._Tree_const_iterator = type { %class._Tree_unchecked_const_iterator }
- %class._Tree_unchecked_const_iterator = type { %struct._Iterator_base0, i32* }
+ %class._Tree_unchecked_const_iterator = type { %struct._Iterator_base0, ptr }
%struct._Iterator_base0 = type { i32 }
- define i32 @main({ i32, i32* } %call.i) !dbg !6 {
+ define i32 @main({ i32, ptr } %call.i) !dbg !6 {
entry:
call void @llvm.dbg.value(metadata i32 2, metadata !10, metadata !DIExpression()), !dbg !12
- %call.i1 = call { i32, i32* } undef(%class._Tree* null)
- %0 = extractvalue { i32, i32* } %call.i, 1
- call void @llvm.dbg.value(metadata i32* %0, metadata !13, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !15
- %call.i.i.i.i.i = call i8 undef(i32* null), !dbg !15
+ %call.i1 = call { i32, ptr } undef(ptr null)
+ %0 = extractvalue { i32, ptr } %call.i, 1
+ call void @llvm.dbg.value(metadata ptr %0, metadata !13, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !15
+ %call.i.i.i.i.i = call i8 undef(ptr null), !dbg !15
br i1 undef, label %_Z17do_insert_cv_testI5_TreeEvv.exit, label %if.then.i.i.i.i.i
if.then.i.i.i.i.i:
- %call3.i.i.i.i.i = call i32* undef(i32* null)
- call void @llvm.dbg.value(metadata i32* %call3.i.i.i.i.i, metadata !13, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !15
+ %call3.i.i.i.i.i = call ptr undef(ptr null)
+ call void @llvm.dbg.value(metadata ptr %call3.i.i.i.i.i, metadata !13, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !15
br label %_Z17do_insert_cv_testI5_TreeEvv.exit
_Z17do_insert_cv_testI5_TreeEvv.exit:
- %_First.sroa.2.0.i.i = phi i32* [ %0, %entry ], [ %call3.i.i.i.i.i, %if.then.i.i.i.i.i ]
- call void @llvm.dbg.value(metadata i32* %_First.sroa.2.0.i.i, metadata !13, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !15
- call void undef(%class._Tree_const_iterator* null, i32 0, i32* %_First.sroa.2.0.i.i), !dbg !16
+ %_First.sroa.2.0.i.i = phi ptr [ %0, %entry ], [ %call3.i.i.i.i.i, %if.then.i.i.i.i.i ]
+ call void @llvm.dbg.value(metadata ptr %_First.sroa.2.0.i.i, metadata !13, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !15
+ call void undef(ptr null, i32 0, ptr %_First.sroa.2.0.i.i), !dbg !16
ret i32 0
}
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir b/llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir
index aadfd3c7448bf..1a2012d36f1ab 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir
@@ -71,7 +71,7 @@ body: |
bb.0.entry:
liveins: $rdi, $rdx, $rsi, $rbp, $r15, $r14, $r13, $r12, $rbx
- renamable $r10 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-instr-number 1, debug-location !7 :: (load 8 from `%"class.llvm::Loop"*** undef`)
+ renamable $r10 = MOV64rm undef renamable $rax, 1, $noreg, 0, $noreg, debug-instr-number 1, debug-location !7 :: (load 8 from `ptr undef`)
renamable $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
DBG_VALUE $r10, 0, !8, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !7
TEST8rr renamable $al, renamable $al, implicit-def $eflags, implicit killed $eax, debug-location !7
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir b/llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
index 56958efcefb81..47a7b460e43ef 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
@@ -17,7 +17,7 @@
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
- define hidden fastcc i64 @amd64_push_arguments(i32 *%regcache, i32 *%args) unnamed_addr !dbg !4 {
+ define hidden fastcc i64 @amd64_push_arguments(ptr %regcache, ptr %args) unnamed_addr !dbg !4 {
ret i64 0
}
@@ -259,7 +259,7 @@ body: |
%10:gr32 = PHI %4, %bb.20, %4, %bb.17, %6, %bb.16, debug-location !9
%11:gr64 = PHI %8, %bb.20, undef %45:gr64, %bb.17, undef %47:gr64, %bb.16
%12:gr32 = PHI %42, %bb.20, %46, %bb.17, %48, %bb.16, debug-location !9
- %49:gr32 = MOV32rm killed %11, 1, $noreg, 0, $noreg, debug-location !9 :: (load (s32) from `i32 *undef`)
+ %49:gr32 = MOV32rm killed %11, 1, $noreg, 0, $noreg, debug-location !9 :: (load (s32) from `ptr undef`)
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !9
$rdi = COPY %50, debug-location !9
CALL64pcrel32 target-flags(x86-plt) &memcpy, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit undef $rsi, implicit undef $rdx, implicit-def $rsp, implicit-def $ssp, implicit-def dead $rax, debug-location !9
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir b/llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
index 238556f7fe00c..ed1ba590d746a 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
@@ -18,25 +18,25 @@
%struct.incomplete_struct = type { i32 }
@"\01?multi_dim_arr@@3PAY146DA" = global [2 x [5 x [7 x i8]]] zeroinitializer, align 1, !dbg !0
- @"\01?p_incomplete_struct_arr@@3PAY02Uincomplete_struct@@A" = global [3 x i8]* null, align 4, !dbg !6
+ @"\01?p_incomplete_struct_arr@@3PAY02Uincomplete_struct@@A" = global ptr null, align 4, !dbg !6
@"\01?incomplete_struct_arr@@3PAUincomplete_struct@@A" = global [3 x %struct.incomplete_struct] zeroinitializer, align 4, !dbg !16
@"\01?typedef_arr@@3SDHD" = constant [4 x i32] zeroinitializer, align 4, !dbg !18
define void @"\01?foo@@YAXH at Z"(i32 %x) !dbg !35 {
entry:
%x.addr = alloca i32, align 4
- %saved_stack = alloca i8*, align 4
- store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.declare(metadata i32* %x.addr, metadata !38, metadata !DIExpression()), !dbg !39
- %0 = load i32, i32* %x.addr, align 4, !dbg !40
- %1 = call i8* @llvm.stacksave(), !dbg !41
- store i8* %1, i8** %saved_stack, align 4, !dbg !41
+ %saved_stack = alloca ptr, align 4
+ store i32 %x, ptr %x.addr, align 4
+ call void @llvm.dbg.declare(metadata ptr %x.addr, metadata !38, metadata !DIExpression()), !dbg !39
+ %0 = load i32, ptr %x.addr, align 4, !dbg !40
+ %1 = call ptr @llvm.stacksave(), !dbg !41
+ store ptr %1, ptr %saved_stack, align 4, !dbg !41
%vla = alloca i32, i32 %0, align 4, !dbg !41
- call void @llvm.dbg.declare(metadata i32* %vla, metadata !42, metadata !DIExpression(DW_OP_deref)), !dbg !46
- %arrayidx1 = bitcast i32* %vla to i32*, !dbg !47
- store i32 0, i32* %arrayidx1, align 4, !dbg !48
- %2 = load i8*, i8** %saved_stack, align 4, !dbg !49
- call void @llvm.stackrestore(i8* %2), !dbg !49
+ call void @llvm.dbg.declare(metadata ptr %vla, metadata !42, metadata !DIExpression(DW_OP_deref)), !dbg !46
+ %arrayidx1 = bitcast ptr %vla to ptr, !dbg !47
+ store i32 0, ptr %arrayidx1, align 4, !dbg !48
+ %2 = load ptr, ptr %saved_stack, align 4, !dbg !49
+ call void @llvm.stackrestore(ptr %2), !dbg !49
ret void, !dbg !49
}
@@ -44,10 +44,10 @@
declare void @llvm.dbg.declare(metadata, metadata, metadata)
; Function Attrs: nofree nosync nounwind willreturn
- declare i8* @llvm.stacksave()
+ declare ptr @llvm.stacksave()
; Function Attrs: nofree nosync nounwind willreturn
- declare void @llvm.stackrestore(i8*)
+ declare void @llvm.stackrestore(ptr)
!llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!32, !33}
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
index 415b336fc4801..7a782625188dd 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
@@ -17,19 +17,19 @@
%"class.std::vector.534" = type { %"struct.std::_Vector_base.535" }
%"struct.std::_Vector_base.535" = type { %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" }
- %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { i8*, i8*, i8* }
+ %"struct.std::_Vector_base<unsigned char, std::allocator<unsigned char>>::_Vector_impl" = type { ptr, ptr, ptr }
; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
define hidden fastcc void @soup() unnamed_addr !dbg !3 {
_ZN4llvm11raw_ostreamlsEPKc.exit2752:
- %0 = load %"class.std::vector.534"*, %"class.std::vector.534"** undef, align 8, !dbg !7
- %1 = load i8*, i8** undef, align 8, !dbg !7
- %_M_start.i2756 = getelementptr inbounds %"class.std::vector.534", %"class.std::vector.534"* %0, i64 undef, i32 0, i32 0, i32 0, !dbg !7
- %2 = load i8*, i8** %_M_start.i2756, align 8, !dbg !7
- %sub.ptr.lhs.cast.i2757 = ptrtoint i8* %1 to i64, !dbg !7
- %sub.ptr.rhs.cast.i2758 = ptrtoint i8* %2 to i64, !dbg !7
+ %0 = load ptr, ptr undef, align 8, !dbg !7
+ %1 = load ptr, ptr undef, align 8, !dbg !7
+ %_M_start.i2756 = getelementptr inbounds %"class.std::vector.534", ptr %0, i64 undef, i32 0, i32 0, i32 0, !dbg !7
+ %2 = load ptr, ptr %_M_start.i2756, align 8, !dbg !7
+ %sub.ptr.lhs.cast.i2757 = ptrtoint ptr %1 to i64, !dbg !7
+ %sub.ptr.rhs.cast.i2758 = ptrtoint ptr %2 to i64, !dbg !7
%sub.ptr.sub.i2759 = sub i64 %sub.ptr.lhs.cast.i2757, %sub.ptr.rhs.cast.i2758, !dbg !7
%conv373 = trunc i64 %sub.ptr.sub.i2759 to i32, !dbg !7
call void @llvm.dbg.value(metadata i32 %conv373, metadata !8, metadata !DIExpression()), !dbg !7
@@ -80,7 +80,7 @@ body: |
successors: %bb.1(0x30000000), %bb.2(0x50000000)
%1:gr64 = IMPLICIT_DEF
- %0:gr64 = MOV64rm killed %1, 1, $noreg, 0, $noreg, debug-location !7 :: (load (s64) from `i8** undef`)
+ %0:gr64 = MOV64rm killed %1, 1, $noreg, 0, $noreg, debug-location !7 :: (load (s64) from `ptr undef`)
%2:gr32 = COPY %0.sub_32bit, debug-location !7
%3:gr32 = SUB32rm %2, %0, 1, $noreg, 0, $noreg, implicit-def $eflags, debug-instr-number 1, debug-location !7 :: (load (s32) from %ir._M_start.i2756, align 8)
DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !7
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir
index 404ca0c8a42c9..be12082c45b9a 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir
@@ -41,13 +41,13 @@
%add = fadd x86_fp80 %a, %b, !dbg !21
call void @llvm.dbg.value(metadata x86_fp80 %add, metadata !17, metadata !DIExpression()), !dbg !20
call void @llvm.dbg.value(metadata x86_fp80 undef, metadata !18, metadata !DIExpression()), !dbg !20
- %call = tail call x86_fp80 bitcast (x86_fp80 (...)* @ext to x86_fp80 ()*)() #3, !dbg !22
+ %call = tail call x86_fp80 @ext() #3, !dbg !22
%mul = fmul x86_fp80 %add, %call, !dbg !23
call void @llvm.dbg.value(metadata x86_fp80 %mul, metadata !17, metadata !DIExpression()), !dbg !20
- %call2 = tail call x86_fp80 bitcast (x86_fp80 (...)* @ext to x86_fp80 ()*)() #3, !dbg !24
+ %call2 = tail call x86_fp80 @ext() #3, !dbg !24
call void @llvm.dbg.value(metadata x86_fp80 undef, metadata !18, metadata !DIExpression()), !dbg !20
%cmp = fcmp olt x86_fp80 %mul, 0xK4001A000000000000000, !dbg !25
- %0 = load x86_fp80, x86_fp80* @glob, align 4, !dbg !27
+ %0 = load x86_fp80, ptr @glob, align 4, !dbg !27
%add3 = fadd x86_fp80 %mul, %0, !dbg !27
%a.addr.0 = select i1 %cmp, x86_fp80 %add3, x86_fp80 %mul, !dbg !27
%add1 = fadd x86_fp80 %b, %c, !dbg !28
@@ -177,7 +177,7 @@ body: |
renamable $fp0 = nofpexcept DIV_Fp80 killed renamable $fp1, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw, debug-instr-number 19, debug-location !29
renamable $fp0 = nofpexcept SUB_Fp80 killed renamable $fp3, killed renamable $fp0, implicit-def dead $fpsw, implicit $fpcw, debug-instr-number 20, debug-location !30
;; Edited in:
- renamable $fp0 = ADD_Fp64m killed renamable $fp0, killed $esp, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw, debug-instr-number 21, :: (load (s64) from `i32 *undef`)
+ renamable $fp0 = ADD_Fp64m killed renamable $fp0, killed $esp, 1, $noreg, 0, $noreg, implicit-def dead $fpsw, implicit $fpcw, debug-instr-number 21, :: (load (s64) from `ptr undef`)
RET 0, killed renamable $fp0, debug-location !31
...
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
index b84f86c032cc4..2e28804682ba9 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
@@ -74,7 +74,7 @@ body: |
renamable $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags
renamable $ecx = nsw ADD32rr renamable $ecx, renamable $eax, implicit-def dead $eflags, implicit killed $rax, implicit killed $rcx, implicit-def $rcx, debug-instr-number 1
; ATOM: LEA64_32r {{.*}} debug-instr-number 2
- renamable $eax = MOV32rm killed renamable $rcx, 1, $noreg, 0, $noreg :: (load (s32) from `i32 *undef`)
+ renamable $eax = MOV32rm killed renamable $rcx, 1, $noreg, 0, $noreg :: (load (s32) from `ptr undef`)
RET64 $eax
...
diff --git a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-copy-sub-reg.mir b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-copy-sub-reg.mir
index 82ce923141e50..013c7086eb56d 100644
--- a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-copy-sub-reg.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-copy-sub-reg.mir
@@ -30,15 +30,15 @@
target triple = "mips64-unknown-linux"
; Function Attrs: nounwind
- define signext i32 @f1(i32 signext %a, i8* %str) local_unnamed_addr !dbg !8 {
+ define signext i32 @f1(i32 signext %a, ptr %str) local_unnamed_addr !dbg !8 {
entry:
call void @llvm.dbg.value(metadata i32 %a, metadata !16, metadata !DIExpression()), !dbg !18
- call void @llvm.dbg.value(metadata i8* %str, metadata !17, metadata !DIExpression()), !dbg !18
- %call = tail call fastcc signext i32 @foo(i8* %str, i32 signext %a, i32 signext 0), !dbg !18
+ call void @llvm.dbg.value(metadata ptr %str, metadata !17, metadata !DIExpression()), !dbg !18
+ %call = tail call fastcc signext i32 @foo(ptr %str, i32 signext %a, i32 signext 0), !dbg !18
ret i32 %call, !dbg !18
}
- declare !dbg !21 fastcc signext i32 @foo(i8*, i32 signext, i32 signext) local_unnamed_addr
+ declare !dbg !21 fastcc signext i32 @foo(ptr, i32 signext, i32 signext) local_unnamed_addr
; Function Attrs: nounwind readnone speculatable willreturn
declare void @llvm.dbg.value(metadata, metadata, metadata)
diff --git a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation-64bit.mir b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation-64bit.mir
index a7acf6f69ed39..b35c3dea82466 100644
--- a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation-64bit.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation-64bit.mir
@@ -34,15 +34,15 @@
target datalayout = "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
target triple = "mips64-unknown-linux-gnu"
; Function Attrs: noinline nounwind
- define void @set(i32* nocapture %adr, i32 signext %val) local_unnamed_addr !dbg !13 {
+ define void @set(ptr nocapture %adr, i32 signext %val) local_unnamed_addr !dbg !13 {
entry:
- call void @llvm.dbg.value(metadata i32* %adr, metadata !18, metadata !DIExpression()), !dbg !20
+ call void @llvm.dbg.value(metadata ptr %adr, metadata !18, metadata !DIExpression()), !dbg !20
call void @llvm.dbg.value(metadata i32 %val, metadata !19, metadata !DIExpression()), !dbg !20
%inc = add nsw i32 %val, 1, !dbg !20
call void @llvm.dbg.value(metadata i32 %inc, metadata !19, metadata !DIExpression()), !dbg !20
%call = tail call signext i32 @sum(i32 signext %inc, i32 signext %inc), !dbg !20
%add = add nsw i32 %call, %inc, !dbg !20
- store i32 %add, i32* %adr, align 4, !dbg !20
+ store i32 %add, ptr %adr, align 4, !dbg !20
ret void
}
diff --git a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation.mir b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation.mir
index 0755b86757b5d..b6eddff967b59 100644
--- a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation.mir
@@ -34,15 +34,15 @@
target datalayout = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
target triple = "mips-unknown-linux-gnu"
; Function Attrs: noinline nounwind
- define dso_local void @set(i32* nocapture %adr, i32 signext %val) local_unnamed_addr !dbg !12 {
+ define dso_local void @set(ptr nocapture %adr, i32 signext %val) local_unnamed_addr !dbg !12 {
entry:
- call void @llvm.dbg.value(metadata i32* %adr, metadata !17, metadata !DIExpression()), !dbg !19
+ call void @llvm.dbg.value(metadata ptr %adr, metadata !17, metadata !DIExpression()), !dbg !19
call void @llvm.dbg.value(metadata i32 %val, metadata !18, metadata !DIExpression()), !dbg !19
%inc = add nsw i32 %val, 1, !dbg !19
call void @llvm.dbg.value(metadata i32 %inc, metadata !18, metadata !DIExpression()), !dbg !19
%call = tail call i32 @sum(i32 signext %inc, i32 signext %inc), !dbg !19
%add = add nsw i32 %call, %inc, !dbg !19
- store i32 %add, i32* %adr, align 4, !dbg !19
+ store i32 %add, ptr %adr, align 4, !dbg !19
ret void
}
declare !dbg !4 dso_local i32 @sum(i32 signext, i32 signext) local_unnamed_addr
diff --git a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu-64bit.mir b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu-64bit.mir
index a0da42d25d112..66fa095650fac 100644
--- a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu-64bit.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu-64bit.mir
@@ -41,7 +41,7 @@
define signext i32 @fn2(i64 signext %a) local_unnamed_addr !dbg !14 {
entry:
call void @llvm.dbg.value(metadata i64 %a, metadata !18, metadata !DIExpression()), !dbg !20
- tail call void bitcast (void (...)* @clobber to void ()*)(), !dbg !20
+ tail call void @clobber(), !dbg !20
%add = add nsw i64 %a, 10, !dbg !20
%call = tail call signext i32 @fn1(i64 signext 44, i64 signext %a, i64 signext %add), !dbg !20
call void @llvm.dbg.value(metadata i32 %call, metadata !19, metadata !DIExpression()), !dbg !20
diff --git a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu.mir b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu.mir
index 526f7928b56a3..216ae0b98ed76 100644
--- a/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu.mir
@@ -41,7 +41,7 @@
define dso_local i32 @fn2(i32 signext %a) local_unnamed_addr !dbg !12 {
entry:
call void @llvm.dbg.value(metadata i32 %a, metadata !16, metadata !DIExpression()), !dbg !18
- tail call void bitcast (void (...)* @clobber to void ()*)(), !dbg !18
+ tail call void @clobber(), !dbg !18
%add = add nsw i32 %a, 10, !dbg !18
%call = tail call i32 @fn1(i32 signext 44, i32 signext %a, i32 signext %add), !dbg !18
call void @llvm.dbg.value(metadata i32 %call, metadata !17, metadata !DIExpression()), !dbg !18
diff --git a/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir b/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
index 7825bff2d4105..97ff7c4589b44 100644
--- a/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
@@ -33,40 +33,40 @@
entry:
%condition = alloca i32, align 4
call void @llvm.dbg.value(metadata i32 %argument, metadata !12, metadata !DIExpression()), !dbg !17
- %0 = bitcast i32* %condition to i8*, !dbg !18
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0), !dbg !18
- call void @llvm.dbg.value(metadata i32* %condition, metadata !13, metadata !DIExpression()), !dbg !19
- call void @set_cond(i32 signext %argument, i32* nonnull %condition), !dbg !20
- %1 = load i32, i32* %condition, align 4, !dbg !21, !tbaa !23
+ %0 = bitcast ptr %condition to ptr, !dbg !18
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %0), !dbg !18
+ call void @llvm.dbg.value(metadata ptr %condition, metadata !13, metadata !DIExpression()), !dbg !19
+ call void @set_cond(i32 signext %argument, ptr nonnull %condition), !dbg !20
+ %1 = load i32, ptr %condition, align 4, !dbg !21, !tbaa !23
call void @llvm.dbg.value(metadata i32 %1, metadata !13, metadata !DIExpression()), !dbg !19
%tobool = icmp eq i32 %1, 0, !dbg !21
br i1 %tobool, label %if.end, label %if.then, !dbg !27
if.then: ; preds = %entry
- call void @do_something(i8* undef, i32 signext %argument), !dbg !28
+ call void @do_something(ptr undef, i32 signext %argument), !dbg !28
br label %if.end, !dbg !28
if.end: ; preds = %if.then, %entry
- %2 = bitcast i32* %condition to i8*
- call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %2), !dbg !29
+ %2 = bitcast ptr %condition to ptr
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2), !dbg !29
ret void, !dbg !29
}
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #0
+ declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #0
- declare void @set_cond(i32 signext, i32*) local_unnamed_addr
+ declare void @set_cond(i32 signext, ptr) local_unnamed_addr
- declare void @do_something(i8*, i32 signext) local_unnamed_addr
+ declare void @do_something(ptr, i32 signext) local_unnamed_addr
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #0
+ declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #0
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #1
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #2
+ declare void @llvm.stackprotector(ptr, ptr) #2
attributes #0 = { argmemonly nounwind }
attributes #1 = { nounwind readnone speculatable }
diff --git a/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
index a295e12e645f0..1e848f74512de 100644
--- a/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
@@ -61,7 +61,7 @@
declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #1
+ declare void @llvm.stackprotector(ptr, ptr) #1
attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind }
diff --git a/llvm/test/DebugInfo/MIR/X86/avoid-single-entry-value-location.mir b/llvm/test/DebugInfo/MIR/X86/avoid-single-entry-value-location.mir
index 8dba058da7402..8dafeb3d7e1c7 100644
--- a/llvm/test/DebugInfo/MIR/X86/avoid-single-entry-value-location.mir
+++ b/llvm/test/DebugInfo/MIR/X86/avoid-single-entry-value-location.mir
@@ -10,10 +10,10 @@
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: noinline nounwind uwtable
- define dso_local void @fn1(i8* %x) local_unnamed_addr !dbg !12 {
+ define dso_local void @fn1(ptr %x) local_unnamed_addr !dbg !12 {
entry:
- call void @llvm.dbg.value(metadata i8* %x, metadata !16, metadata !DIExpression()), !dbg !18
- %0 = ptrtoint i8* %x to i64, !dbg !18
+ call void @llvm.dbg.value(metadata ptr %x, metadata !16, metadata !DIExpression()), !dbg !18
+ %0 = ptrtoint ptr %x to i64, !dbg !18
%y = trunc i64 %0 to i32, !dbg !18
call void @llvm.dbg.value(metadata i32 %y, metadata !17, metadata !DIExpression()), !dbg !18
tail call void @fn2(i32 7), !dbg !18
diff --git a/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir b/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
index b7617e5b0a9a3..8d7378c04887b 100644
--- a/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
+++ b/llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
@@ -36,8 +36,8 @@
define dso_local i32 @foo(i32 %param) local_unnamed_addr !dbg !8 {
entry:
call void @llvm.dbg.value(metadata i32 %param, metadata !13, metadata !DIExpression()), !dbg !14
- store i32 %param, i32* @side_effect, align 4, !dbg !15, !tbaa !16
- %0 = load i32, i32* @value, align 4, !dbg !20, !tbaa !16
+ store i32 %param, ptr @side_effect, align 4, !dbg !15, !tbaa !16
+ %0 = load i32, ptr @value, align 4, !dbg !20, !tbaa !16
call void @llvm.dbg.value(metadata i32 %0, metadata !13, metadata !DIExpression()), !dbg !14
call void @bar(i32 %0), !dbg !21
ret i32 0, !dbg !22
diff --git a/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir b/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
index 789968397199c..1790f761585c3 100644
--- a/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
@@ -92,9 +92,9 @@
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
- define dso_local i32 @fn1(i32 (...)* nocapture %fn4) local_unnamed_addr !dbg !18 {
+ define dso_local i32 @fn1(ptr nocapture %fn4) local_unnamed_addr !dbg !18 {
entry:
- call void @llvm.dbg.value(metadata i32 (...)* %fn4, metadata !23, metadata !DIExpression()), !dbg !25
+ call void @llvm.dbg.value(metadata ptr %fn4, metadata !23, metadata !DIExpression()), !dbg !25
tail call void (...) @fn(), !dbg !26
tail call void @fn2(i32 5), !dbg !27
%call = tail call i32 (...) %fn4(), !dbg !28
diff --git a/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir b/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
index c8ea384ce7273..a334e99b9cade 100644
--- a/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
+++ b/llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
@@ -33,7 +33,7 @@
; Function Attrs: nounwind uwtable
define i32 @test1() #0 !dbg !8 {
entry:
- %0 = load i32, i32* @global1, align 4, !dbg !16
+ %0 = load i32, ptr @global1, align 4, !dbg !16
call void @llvm.dbg.value(metadata i32 %0, metadata !12, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32)), !dbg !16
call void @llvm.dbg.value(metadata i32 123, metadata !12, metadata !DIExpression(DW_OP_LLVM_fragment, 32, 32)), !dbg !16
call void @llvm.dbg.value(metadata i32 456, metadata !12, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 32)), !dbg !16
@@ -46,11 +46,11 @@
; Function Attrs: nounwind uwtable
define i32 @test2() #0 !dbg !18 {
entry:
- %0 = load i32, i32* @global1, align 4, !dbg !20
+ %0 = load i32, ptr @global1, align 4, !dbg !20
call void @llvm.dbg.value(metadata i32 %0, metadata !19, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32)), !dbg !20
- %1 = load i32, i32* @global2, align 4, !dbg !20
+ %1 = load i32, ptr @global2, align 4, !dbg !20
call void @llvm.dbg.value(metadata i32 %1, metadata !19, metadata !DIExpression(DW_OP_LLVM_fragment, 32, 32)), !dbg !20
- %2 = load i32, i32* @global3, align 4, !dbg !20
+ %2 = load i32, ptr @global3, align 4, !dbg !20
call void @llvm.dbg.value(metadata i32 %2, metadata !19, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 32)), !dbg !20
tail call void @ext3(i32 %0, i32 %1, i32 %2) #3, !dbg !20
ret i32 %0, !dbg !21
diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
index 4d3c466f3eb36..5c926cb50dfff 100644
--- a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
@@ -36,7 +36,7 @@
entry:
call void @llvm.dbg.value(metadata i32 %x, metadata !14, metadata !DIExpression()), !dbg !15
call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"(), !dbg !16, !srcloc !17
- %0 = load i32, i32* @y, align 4, !dbg !18
+ %0 = load i32, ptr @y, align 4, !dbg !18
%rem = srem i32 %x, %0, !dbg !18
call void @llvm.dbg.value(metadata i32 %rem, metadata !14, metadata !DIExpression()), !dbg !15
call void @callee(i32 %rem), !dbg !18
diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
index 62d091bbce537..8ede60c33359d 100644
--- a/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
@@ -45,7 +45,7 @@
declare void @llvm.dbg.value(metadata, metadata, metadata)
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
attributes #0 = { "disable-tail-calls"="true" "frame-pointer"="all" }
diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir b/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
index 8254b81c22046..876393557cc95 100644
--- a/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
@@ -45,8 +45,8 @@
entry:
%local1 = alloca i32, align 4
call void @llvm.dbg.value(metadata i32 %X, metadata !12, metadata !DIExpression()), !dbg !15
- %0 = bitcast i32* %local1 to i8*, !dbg !15
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0), !dbg !15
+ %0 = bitcast ptr %local1 to ptr, !dbg !15
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %0), !dbg !15
call void @llvm.dbg.value(metadata i32 5, metadata !14, metadata !DIExpression()), !dbg !15
%call = tail call i32 (...) @check(), !dbg !15
%tobool = icmp eq i32 %call, 0, !dbg !15
@@ -54,45 +54,45 @@
if.then: ; preds = %entry
call void @llvm.dbg.value(metadata i32 4, metadata !13, metadata !DIExpression()), !dbg !15
- store i32 4, i32* %local1, align 4, !dbg !15, !tbaa !16
- call void @llvm.dbg.value(metadata i32* %local1, metadata !13, metadata !DIExpression(DW_OP_deref)), !dbg !15
- %call1 = call i32 @init(i32* nonnull %local1), !dbg !15
+ store i32 4, ptr %local1, align 4, !dbg !15, !tbaa !16
+ call void @llvm.dbg.value(metadata ptr %local1, metadata !13, metadata !DIExpression(DW_OP_deref)), !dbg !15
+ %call1 = call i32 @init(ptr nonnull %local1), !dbg !15
call void @llvm.dbg.value(metadata i32 undef, metadata !14, metadata !DIExpression()), !dbg !15
br label %if.end, !dbg !15
if.else: ; preds = %entry
call void @llvm.dbg.value(metadata i32 5, metadata !13, metadata !DIExpression()), !dbg !15
- store i32 5, i32* %local1, align 4, !dbg !15, !tbaa !16
+ store i32 5, ptr %local1, align 4, !dbg !15, !tbaa !16
br label %if.end
if.end: ; preds = %if.else, %if.then
- %1 = bitcast i32* %local1 to i8*, !dbg !15
+ %1 = bitcast ptr %local1 to ptr, !dbg !15
call void @llvm.dbg.value(metadata i32 undef, metadata !14, metadata !DIExpression()), !dbg !15
%call2 = call i32 (...) @init2(), !dbg !15
call void @llvm.dbg.value(metadata i32 undef, metadata !14, metadata !DIExpression()), !dbg !15
- %2 = load i32, i32* %local1, align 4, !dbg !15, !tbaa !16
+ %2 = load i32, ptr %local1, align 4, !dbg !15, !tbaa !16
call void @llvm.dbg.value(metadata i32 %2, metadata !13, metadata !DIExpression()), !dbg !15
- call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %1), !dbg !15
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1), !dbg !15
ret i32 %2, !dbg !15
}
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+ declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
declare dso_local i32 @check(...) local_unnamed_addr
- declare dso_local i32 @init(i32*) local_unnamed_addr
+ declare dso_local i32 @init(ptr) local_unnamed_addr
declare dso_local i32 @init2(...) local_unnamed_addr
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+ declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata)
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
attributes #0 = { nounwind uwtable "frame-pointer"="non-leaf" }
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
index a6f64f6f3b24c..9f18dd04c4674 100644
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
@@ -51,14 +51,14 @@
call void @llvm.dbg.value(metadata i32 %arg1, metadata !14, metadata !DIExpression()), !dbg !21
call void @llvm.dbg.value(metadata i32 %arg2, metadata !15, metadata !DIExpression()), !dbg !21
call void @llvm.dbg.value(metadata i32 %arg3, metadata !16, metadata !DIExpression()), !dbg !21
- store i32 %arg3, i32* %arg3.addr, align 4
+ store i32 %arg3, ptr %arg3.addr, align 4
call void @llvm.dbg.value(metadata i32 %arg4, metadata !17, metadata !DIExpression()), !dbg !21
- %0 = bitcast i32* %local2 to i8*, !dbg !21
- call void @llvm.dbg.value(metadata i32* %arg3.addr, metadata !16, metadata !DIExpression(DW_OP_deref)), !dbg !21
- %call = call i32 @foo(i32 %arg1, i32 %arg2, i32* nonnull %arg3.addr, i32 %arg4), !dbg !21
+ %0 = bitcast ptr %local2 to ptr, !dbg !21
+ call void @llvm.dbg.value(metadata ptr %arg3.addr, metadata !16, metadata !DIExpression(DW_OP_deref)), !dbg !21
+ %call = call i32 @foo(i32 %arg1, i32 %arg2, ptr nonnull %arg3.addr, i32 %arg4), !dbg !21
call void @llvm.dbg.value(metadata i32 %call, metadata !18, metadata !DIExpression()), !dbg !21
%cmp = icmp sgt i32 %arg1, %arg2, !dbg !21
- %1 = load i32, i32* %arg3.addr, align 4, !dbg !21
+ %1 = load i32, ptr %arg3.addr, align 4, !dbg !21
call void @llvm.dbg.value(metadata i32 %1, metadata !16, metadata !DIExpression()), !dbg !21
%add = add nsw i32 %1, %arg1, !dbg !21
%add1 = add nsw i32 %arg4, %arg2, !dbg !21
@@ -70,19 +70,19 @@
%add3 = add nsw i32 %1, %arg4, !dbg !21
%storemerge = select i1 %tobool, i32 %mul, i32 %add3, !dbg !21
call void @llvm.dbg.value(metadata i32 %storemerge, metadata !19, metadata !DIExpression()), !dbg !21
- store i32 %storemerge, i32* %local2, align 4, !dbg !21
+ store i32 %storemerge, ptr %local2, align 4, !dbg !21
%cmp6 = icmp slt i32 %storemerge, %arg4, !dbg !21
%local3.0.v = select i1 %cmp6, i32 %local1.0, i32 %arg1, !dbg !21
%local3.0 = mul nsw i32 %local3.0.v, %storemerge, !dbg !21
call void @llvm.dbg.value(metadata i32 %local3.0, metadata !20, metadata !DIExpression()), !dbg !21
- call void @llvm.dbg.value(metadata i32* %local2, metadata !19, metadata !DIExpression(DW_OP_deref)), !dbg !21
- %call12 = call i32 @foo(i32 %local1.0, i32 4, i32* nonnull %local2, i32 %local3.0), !dbg !21
+ call void @llvm.dbg.value(metadata ptr %local2, metadata !19, metadata !DIExpression(DW_OP_deref)), !dbg !21
+ %call12 = call i32 @foo(i32 %local1.0, i32 4, ptr nonnull %local2, i32 %local3.0), !dbg !21
call void @llvm.dbg.value(metadata i32 %call12, metadata !14, metadata !DIExpression()), !dbg !21
%add13 = add nsw i32 %call12, 4, !dbg !21
ret i32 %add13, !dbg !21
}
- declare !dbg !4 dso_local i32 @foo(i32, i32, i32*, i32) local_unnamed_addr
+ declare !dbg !4 dso_local i32 @foo(i32, i32, ptr, i32) local_unnamed_addr
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata)
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
index f6f746e470052..44b45e67a8f4c 100644
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
@@ -44,25 +44,25 @@
%arg1.addr = alloca i32, align 4
%arg3.addr = alloca i32, align 4
%local1 = alloca i32, align 4
- store i32 %arg1, i32* %arg1.addr, align 4
- store i32 %arg3, i32* %arg3.addr, align 4
- %0 = bitcast i32* %local1 to i8*, !dbg !14
+ store i32 %arg1, ptr %arg1.addr, align 4
+ store i32 %arg3, ptr %arg3.addr, align 4
+ %0 = bitcast ptr %local1 to ptr, !dbg !14
%mul = mul nsw i32 %arg3, %arg1, !dbg !14
- store i32 %mul, i32* %local1, align 4, !dbg !14
+ store i32 %mul, ptr %local1, align 4, !dbg !14
%add = add nsw i32 %arg2, %arg1, !dbg !14
%sub = sub nsw i32 %add, %arg3, !dbg !14
- %call = call i32 @foo(i32 %mul, i32 %sub, i32* nonnull %local1, i32* nonnull %arg1.addr, i32* nonnull %arg3.addr, i32 %add), !dbg !14
- %1 = load i32, i32* %local1, align 4, !dbg !14
+ %call = call i32 @foo(i32 %mul, i32 %sub, ptr nonnull %local1, ptr nonnull %arg1.addr, ptr nonnull %arg3.addr, i32 %add), !dbg !14
+ %1 = load i32, ptr %local1, align 4, !dbg !14
%add2 = add nsw i32 %1, %call, !dbg !14
- store i32 %add2, i32* %local1, align 4, !dbg !14
- %call3 = call i32 @foo2(i32* nonnull %local1), !dbg !14
- %2 = load i32, i32* %local1, align 4, !dbg !14
+ store i32 %add2, ptr %local1, align 4, !dbg !14
+ %call3 = call i32 @foo2(ptr nonnull %local1), !dbg !14
+ %2 = load i32, ptr %local1, align 4, !dbg !14
ret i32 %2, !dbg !14
}
- declare !dbg !4 dso_local i32 @foo(i32, i32, i32*, i32*, i32*, i32) local_unnamed_addr
+ declare !dbg !4 dso_local i32 @foo(i32, i32, ptr, ptr, ptr, i32) local_unnamed_addr
- declare !dbg !5 dso_local i32 @foo2(i32*) local_unnamed_addr
+ declare !dbg !5 dso_local i32 @foo2(ptr) local_unnamed_addr
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!6, !7, !8}
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
index 6b753bf11f160..31f607d9db23c 100644
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
@@ -29,22 +29,22 @@
%struct.A = type { i8 }
%struct.C = type { i8 }
- @_ZN1DC1E1B = dso_local unnamed_addr alias void (%struct.D*, %struct.B*), void (%struct.D*, %struct.B*)* @_ZN1DC2E1B
+ @_ZN1DC1E1B = dso_local unnamed_addr alias void (ptr, ptr), ptr @_ZN1DC2E1B
; Function Attrs: uwtable
- define dso_local void @_ZN1DC2E1B(%struct.D* %this, %struct.B* nocapture readnone %b) unnamed_addr #0 align 2 !dbg !7 {
+ define dso_local void @_ZN1DC2E1B(ptr %this, ptr nocapture readnone %b) unnamed_addr #0 align 2 !dbg !7 {
entry:
%agg.tmp = alloca %struct.B, align 1
- call void @llvm.dbg.value(metadata %struct.D* %this, metadata !32, metadata !DIExpression()), !dbg !35
- call void @llvm.dbg.declare(metadata %struct.B* %b, metadata !34, metadata !DIExpression()), !dbg !36
- %0 = bitcast %struct.D* %this to %struct.C*, !dbg !36
- call void @_ZN1CC2E1B(%struct.C* %0, %struct.B* nonnull %agg.tmp), !dbg !36
+ call void @llvm.dbg.value(metadata ptr %this, metadata !32, metadata !DIExpression()), !dbg !35
+ call void @llvm.dbg.declare(metadata ptr %b, metadata !34, metadata !DIExpression()), !dbg !36
+ %0 = bitcast ptr %this to ptr, !dbg !36
+ call void @_ZN1CC2E1B(ptr %0, ptr nonnull %agg.tmp), !dbg !36
ret void, !dbg !36
}
; Function Attrs: nounwind readnone speculatable willreturn
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
- declare dso_local void @_ZN1CC2E1B(%struct.C*, %struct.B*) unnamed_addr
+ declare dso_local void @_ZN1CC2E1B(ptr, ptr) unnamed_addr
; Function Attrs: nounwind readnone speculatable willreturn
declare void @llvm.dbg.value(metadata, metadata, metadata) #1
diff --git a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
index 01b61913fd65a..b2e4d96cf4404 100644
--- a/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
@@ -26,17 +26,17 @@
; Function Attrs: noinline norecurse nounwind readonly
define i32 @e() #0 !dbg !13 {
entry:
- %0 = load i32, i32* @a, align 4, !dbg !16
+ %0 = load i32, ptr @a, align 4, !dbg !16
ret i32 %0, !dbg !16
}
; Function Attrs: noinline nounwind
define i32 @main() #1 !dbg !17 {
entry:
- %0 = load i32, i32* @c, align 4, !dbg !19
- store i32 %0, i32* @d, align 4, !dbg !19
+ %0 = load i32, ptr @c, align 4, !dbg !19
+ store i32 %0, ptr @d, align 4, !dbg !19
%call = tail call i32 @e(), !dbg !20
- store i32 %call, i32* @b, align 4, !dbg !20
+ store i32 %call, ptr @b, align 4, !dbg !20
%conv = sext i32 %0 to i64, !dbg !21
tail call void @call(i64 %conv, i32 %0), !dbg !21
ret i32 0, !dbg !22
diff --git a/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir b/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
index 0b2110b12a9d9..26e66ae13ce5c 100644
--- a/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
+++ b/llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
@@ -83,20 +83,20 @@
call void @llvm.dbg.value(metadata i32 %arg1, metadata !15, metadata !DIExpression()), !dbg !19
call void @llvm.dbg.value(metadata i32 %arg2, metadata !16, metadata !DIExpression()), !dbg !20
call void @llvm.dbg.value(metadata i32 %arg3, metadata !17, metadata !DIExpression()), !dbg !21
- %0 = bitcast i32* %local1 to i8*, !dbg !22
+ %0 = bitcast ptr %local1 to ptr, !dbg !22
%call = tail call i32 (...) @getVal(), !dbg !23
call void @llvm.dbg.value(metadata i32 %call, metadata !18, metadata !DIExpression()), !dbg !24
- store i32 %call, i32* %local1, align 4, !dbg !24
+ store i32 %call, ptr %local1, align 4, !dbg !24
%add = add nsw i32 %arg3, 3, !dbg !24
%add1 = add nsw i32 %arg2, %arg1, !dbg !24
- call void @llvm.dbg.value(metadata i32* %local1, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !24
- call void @foo(i32* nonnull %local1, i32 %arg2, i32 10, i32 15, i32 %add, i32 %add1), !dbg !24
+ call void @llvm.dbg.value(metadata ptr %local1, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !24
+ call void @foo(ptr nonnull %local1, i32 %arg2, i32 10, i32 15, i32 %add, i32 %add1), !dbg !24
ret void, !dbg !24
}
declare !dbg !4 dso_local i32 @getVal(...) local_unnamed_addr
- declare !dbg !5 dso_local void @foo(i32*, i32, i32, i32, i32, i32) local_unnamed_addr
+ declare !dbg !5 dso_local void @foo(ptr, i32, i32, i32, i32, i32) local_unnamed_addr
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata)
diff --git a/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir b/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
index a051aaa5f7ad1..ae0160e75b4ab 100644
--- a/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
+++ b/llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
@@ -36,7 +36,7 @@
call void @llvm.dbg.value(metadata i32 %q, metadata !16, metadata !DIExpression()), !dbg !18
call void @llvm.dbg.value(metadata i32 %r, metadata !17, metadata !DIExpression()), !dbg !18
%add = add nsw i32 %p, 1, !dbg !18
- store i32 %add, i32* @global, align 4, !dbg !18
+ store i32 %add, ptr @global, align 4, !dbg !18
tail call void asm sideeffect "", "~{edi},~{esi},~{edx},~{dirflag},~{fpsr},~{flags}"(), !dbg !18, !srcloc !19
ret i32 123, !dbg !18
}
diff --git a/llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir b/llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
index edde1b36c423b..56a4d835aaa59 100644
--- a/llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
+++ b/llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
@@ -14,25 +14,25 @@
target triple = "x86_64-apple-macosx10.9.0"
%swift.opaque = type opaque
- %swift.metadata_response = type { %swift.type*, i64 }
+ %swift.metadata_response = type { ptr, i64 }
%swift.type = type { i64 }
define hidden swiftcc void @"$S4main1fyyF"() !dbg !5 {
entry:
- %s1.addr = alloca i8*, align 8
- %0 = bitcast i8** %s1.addr to %swift.opaque**
- store %swift.opaque* null, %swift.opaque** %0, align 8
+ %s1.addr = alloca ptr, align 8
+ %0 = bitcast ptr %s1.addr to ptr
+ store ptr null, ptr %0, align 8
%1 = call swiftcc %swift.metadata_response @"$S16resilient_struct4SizeVMa"(i64 0) #1, !dbg !10
%2 = extractvalue %swift.metadata_response %1, 0, !dbg !10
- %3 = bitcast %swift.type* %2 to i8***, !dbg !10
- %4 = getelementptr inbounds i8**, i8*** %3, i64 -1, !dbg !10
+ %3 = bitcast ptr %2 to ptr, !dbg !10
+ %4 = getelementptr inbounds ptr, ptr %3, i64 -1, !dbg !10
ret void, !dbg !12
}
declare swiftcc %swift.metadata_response @"$S16resilient_struct4SizeVMa"(i64)
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #0
+ declare void @llvm.stackprotector(ptr, ptr) #0
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
index 42f8bc2564285..20536b674390e 100644
--- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
@@ -27,10 +27,10 @@
%struct.a = type { i32 }
; Function Attrs: nounwind ssp
- define i32 @bar(%struct.a* nocapture %b, i32 %shoes) !dbg !4 {
+ define i32 @bar(ptr nocapture %b, i32 %shoes) !dbg !4 {
entry:
tail call void @llvm.dbg.value(metadata i32 %shoes, metadata !9, metadata !DIExpression()), !dbg !16
- %tmp1 = getelementptr inbounds %struct.a, %struct.a* %b, i64 0, i32 0, !dbg !17
+ %tmp1 = getelementptr inbounds %struct.a, ptr %b, i64 0, i32 0, !dbg !17
br label %bb3
bb1: ; preds = %bb2
@@ -44,7 +44,7 @@
br label %bb1
bb3: ; preds = %entry
- %tmp2 = load i32, i32* %tmp1, align 4, !dbg !17
+ %tmp2 = load i32, ptr %tmp1, align 4, !dbg !17
br label %bb2
exit: ; preds = %bb1
diff --git a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
index aeadd5bd2b4f7..363ef4395eaf7 100644
--- a/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
@@ -26,11 +26,11 @@
%struct.a = type { i32 }
; Function Attrs: nounwind ssp
- define i32 @bar(%struct.a* nocapture %b, i32 %shoes) !dbg !4 {
+ define i32 @bar(ptr nocapture %b, i32 %shoes) !dbg !4 {
entry:
%local1 = alloca i64
tail call void @llvm.dbg.value(metadata i32 %shoes, metadata !9, metadata !DIExpression()), !dbg !16
- %tmp1 = getelementptr inbounds %struct.a, %struct.a* %b, i64 0, i32 0, !dbg !17
+ %tmp1 = getelementptr inbounds %struct.a, ptr %b, i64 0, i32 0, !dbg !17
br label %bb3
bb1: ; preds = %bb2
@@ -44,7 +44,7 @@
br label %bb1
bb3: ; preds = %entry
- %tmp2 = load i32, i32* %tmp1, align 4, !dbg !17
+ %tmp2 = load i32, ptr %tmp1, align 4, !dbg !17
br label %bb2
exit: ; preds = %bb1
diff --git a/llvm/test/DebugInfo/MIR/X86/empty-inline.mir b/llvm/test/DebugInfo/MIR/X86/empty-inline.mir
index ae843ac3bd33c..695b7c60365b1 100644
--- a/llvm/test/DebugInfo/MIR/X86/empty-inline.mir
+++ b/llvm/test/DebugInfo/MIR/X86/empty-inline.mir
@@ -25,27 +25,27 @@
%class.D = type { %class.B }
%class.B = type { %class.A, %class.A }
%class.A = type { i8 }
- %class.C = type <{ %class.E*, %class.B, [2 x i8] }>
+ %class.C = type <{ ptr, %class.B, [2 x i8] }>
- @a = local_unnamed_addr global %class.E* null, align 4
+ @a = local_unnamed_addr global ptr null, align 4
- define i32 @_ZN1C5m_fn3Ev(%class.C* nocapture) local_unnamed_addr align 2 !dbg !6 {
+ define i32 @_ZN1C5m_fn3Ev(ptr nocapture) local_unnamed_addr align 2 !dbg !6 {
%2 = alloca %class.B, align 1
- %3 = load %class.E*, %class.E** @a, align 4
- %4 = icmp eq %class.E* %3, null
+ %3 = load ptr, ptr @a, align 4
+ %4 = icmp eq ptr %3, null
br i1 %4, label %10, label %5
; <label>:5: ; preds = %1
- %6 = bitcast %class.C* %0 to %class.D**
- %7 = load %class.D*, %class.D** %6, align 4
- %8 = bitcast %class.D* %7 to i8*
- %9 = load i8, i8* %8, align 1
+ %6 = bitcast ptr %0 to ptr
+ %7 = load ptr, ptr %6, align 4
+ %8 = bitcast ptr %7 to ptr
+ %9 = load i8, ptr %8, align 1
br label %10
; <label>:10: ; preds = %5, %1
%11 = phi i8 [ %9, %5 ], [ undef, %1 ], !dbg !10
- %12 = getelementptr inbounds %class.C, %class.C* %0, i32 0, i32 1, i32 0, i32 0
- store i8 %11, i8* %12, align 1, !dbg !14
+ %12 = getelementptr inbounds %class.C, ptr %0, i32 0, i32 1, i32 0, i32 0
+ store i8 %11, ptr %12, align 1, !dbg !14
ret i32 undef
}
diff --git a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
index 1bfec58b6154e..a28018a0912a0 100644
--- a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
+++ b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
@@ -23,9 +23,9 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
- %struct.firstStruct = type { i32, i8, %struct.secondStruct* }
- %struct.secondStruct = type { i32, i8, i8* }
- %struct.thirdStruct = type { %struct.fourthStruct, i32*, i8* }
+ %struct.firstStruct = type { i32, i8, ptr }
+ %struct.secondStruct = type { i32, i8, ptr }
+ %struct.thirdStruct = type { %struct.fourthStruct, ptr, ptr }
%struct.fourthStruct = type { i32, i32, i32, i32 }
@.str = private unnamed_addr constant [7 x i8] c"Error:\00", align 1
@@ -38,70 +38,70 @@
%0 = bitcast i64 %const1 to i64
call void @llvm.dbg.value(metadata i32 %variable2, metadata !36, metadata !DIExpression()), !dbg !57
call void @llvm.dbg.value(metadata i32 %variable1, metadata !37, metadata !DIExpression()), !dbg !58
- %call = tail call %struct.firstStruct* @func1(i32 %variable1)
- %1 = ptrtoint %struct.firstStruct* %call to i64
+ %call = tail call ptr @func1(i32 %variable1)
+ %1 = ptrtoint ptr %call to i64
%2 = and i64 %1, %0
%tobool = icmp eq i64 %2, 0
br i1 %tobool, label %cleanup, label %if.end
if.end: ; preds = %entry
- %call1 = tail call %struct.thirdStruct* @func2(i32 %variable2, i32 %variable1)
- %3 = ptrtoint %struct.thirdStruct* %call1 to i64
+ %call1 = tail call ptr @func2(i32 %variable2, i32 %variable1)
+ %3 = ptrtoint ptr %call1 to i64
%4 = and i64 %3, -123
%tobool2 = icmp eq i64 %4, 0
br i1 %tobool2, label %if.then3, label %private.exit
if.then3: ; preds = %if.end
- %5 = inttoptr i64 %2 to %struct.firstStruct*
- %variableLocal11 = bitcast %struct.firstStruct* %5 to i32*
- %6 = load i32, i32* %variableLocal11, align 8
- %variableLocal2 = getelementptr inbounds %struct.firstStruct, %struct.firstStruct* %5, i64 0, i32 1
- %7 = load i8, i8* %variableLocal2, align 4
- %or = or i64 ptrtoint ([7 x i8]* @.str to i64), -92238
- %ptr = inttoptr i64 %or to i8*
- tail call void @func3(i32 %6, i8 zeroext %7, i8 zeroext 5, i8* %ptr, i32 %variable2)
+ %5 = inttoptr i64 %2 to ptr
+ %variableLocal11 = bitcast ptr %5 to ptr
+ %6 = load i32, ptr %variableLocal11, align 8
+ %variableLocal2 = getelementptr inbounds %struct.firstStruct, ptr %5, i64 0, i32 1
+ %7 = load i8, ptr %variableLocal2, align 4
+ %or = or i64 ptrtoint (ptr @.str to i64), -92238
+ %ptr = inttoptr i64 %or to ptr
+ tail call void @func3(i32 %6, i8 zeroext %7, i8 zeroext 5, ptr %ptr, i32 %variable2)
br label %cleanup
private.exit: ; preds = %if.end
%8 = bitcast i64 %const1 to i64
- %9 = ptrtoint %struct.thirdStruct* %call1 to i64
+ %9 = ptrtoint ptr %call1 to i64
%10 = or i64 %9, %8
- %11 = inttoptr i64 %10 to i8*
- %call5.i = tail call i8* @memset(i8* %11, i32 0, i64 16)
- %call6 = tail call i32 @func4(%struct.thirdStruct* %call1)
+ %11 = inttoptr i64 %10 to ptr
+ %call5.i = tail call ptr @memset(ptr %11, i32 0, i64 16)
+ %call6 = tail call i32 @func4(ptr %call1)
%tobool7 = icmp eq i32 %call6, 0
br i1 %tobool7, label %cleanup, label %if.then8
if.then8: ; preds = %private.exit
- %12 = inttoptr i64 %2 to %struct.firstStruct*
- tail call void @func5(%struct.thirdStruct* %call1, i32 0)
- %rc_db = getelementptr inbounds %struct.firstStruct, %struct.firstStruct* %12, i64 0, i32 2
- %13 = bitcast %struct.secondStruct** %rc_db to i64*
- %14 = load i64, i64* %13, align 8
+ %12 = inttoptr i64 %2 to ptr
+ tail call void @func5(ptr %call1, i32 0)
+ %rc_db = getelementptr inbounds %struct.firstStruct, ptr %12, i64 0, i32 2
+ %13 = bitcast ptr %rc_db to ptr
+ %14 = load i64, ptr %13, align 8
%tobool9 = icmp eq i64 %14, 0
br i1 %tobool9, label %cleanup, label %land.lhs.true
land.lhs.true: ; preds = %if.then8
- %15 = inttoptr i64 %4 to %struct.thirdStruct*
- %tot_perf2 = bitcast %struct.thirdStruct* %15 to i32*
- %16 = load i32, i32* %tot_perf2, align 8
+ %15 = inttoptr i64 %4 to ptr
+ %tot_perf2 = bitcast ptr %15 to ptr
+ %16 = load i32, ptr %tot_perf2, align 8
%tobool11 = icmp eq i32 %16, 0
br i1 %tobool11, label %lor.lhs.false, label %if.then14
lor.lhs.false: ; preds = %land.lhs.true
- %17 = inttoptr i64 %4 to %struct.thirdStruct*
- %tot_bw = getelementptr inbounds %struct.thirdStruct, %struct.thirdStruct* %17, i64 0, i32 0, i32 1
- %18 = load i32, i32* %tot_bw, align 4
+ %17 = inttoptr i64 %4 to ptr
+ %tot_bw = getelementptr inbounds %struct.thirdStruct, ptr %17, i64 0, i32 0, i32 1
+ %18 = load i32, ptr %tot_bw, align 4
%tobool13 = icmp eq i32 %18, 0
br i1 %tobool13, label %cleanup, label %if.then14
if.then14: ; preds = %lor.lhs.false, %land.lhs.true
- %19 = inttoptr i64 %14 to %struct.secondStruct*
- %mc_origin = getelementptr inbounds %struct.secondStruct, %struct.secondStruct* %19, i64 0, i32 2
- %20 = bitcast i8** %mc_origin to i64*
- %21 = load i64, i64* %20, align 8
- %22 = inttoptr i64 %21 to i8*
- tail call void @func6(%struct.thirdStruct* %call1, i32 %variable1, i8* %22)
+ %19 = inttoptr i64 %14 to ptr
+ %mc_origin = getelementptr inbounds %struct.secondStruct, ptr %19, i64 0, i32 2
+ %20 = bitcast ptr %mc_origin to ptr
+ %21 = load i64, ptr %20, align 8
+ %22 = inttoptr i64 %21 to ptr
+ tail call void @func6(ptr %call1, i32 %variable1, ptr %22)
br label %cleanup
cleanup: ; preds = %if.then14, %lor.lhs.false, %if.then8, %private.exit, %if.then3, %entry
@@ -109,27 +109,27 @@
ret i32 %retval.0
}
- declare %struct.firstStruct* @func1(i32) local_unnamed_addr
+ declare ptr @func1(i32) local_unnamed_addr
- declare %struct.thirdStruct* @func2(i32, i32) local_unnamed_addr
+ declare ptr @func2(i32, i32) local_unnamed_addr
- declare void @func3(i32, i8 zeroext, i8 zeroext, i8*, i32) local_unnamed_addr
+ declare void @func3(i32, i8 zeroext, i8 zeroext, ptr, i32) local_unnamed_addr
- declare i32 @func4(%struct.thirdStruct*) local_unnamed_addr
+ declare i32 @func4(ptr) local_unnamed_addr
- declare void @func5(%struct.thirdStruct*, i32) local_unnamed_addr
+ declare void @func5(ptr, i32) local_unnamed_addr
- declare void @func6(%struct.thirdStruct*, i32, i8*) local_unnamed_addr
+ declare void @func6(ptr, i32, ptr) local_unnamed_addr
- declare i8* @__memset_to_buf(i64, i8*, i32, i64) local_unnamed_addr
+ declare ptr @__memset_to_buf(i64, ptr, i32, i64) local_unnamed_addr
- declare i8* @memset(i8*, i32, i64) local_unnamed_addr
+ declare ptr @memset(ptr, i32, i64) local_unnamed_addr
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #1
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #2
+ declare void @llvm.stackprotector(ptr, ptr) #2
attributes #0 = { nounwind uwtable "frame-pointer"="non-leaf" }
attributes #1 = { nounwind readnone speculatable }
diff --git a/llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks.mir b/llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks.mir
index 92918b11b93d4..41fcc0b17d37d 100644
--- a/llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks.mir
+++ b/llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks.mir
@@ -2,7 +2,7 @@
# CHECK: DW_TAG_subprogram
# Test that LiveDebugValues can handle MBBs that are not reachable in a RPOT.
--- |
- define hidden zeroext i1 @__foo_block_invoke(i8* nocapture noundef readonly %.block_descriptor, i64 noundef %type) !dbg !5 {
+ define hidden zeroext i1 @__foo_block_invoke(ptr nocapture noundef readonly %.block_descriptor, i64 noundef %type) !dbg !5 {
entry:
%call2.i = tail call zeroext i8 @foo_len(), !dbg !10
%cmp.i102.i = icmp ult i8 %call2.i, 64, !dbg !10
diff --git a/llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks2.mir b/llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks2.mir
index 5982980485e93..008d597ad7325 100644
--- a/llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks2.mir
+++ b/llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks2.mir
@@ -2,7 +2,7 @@
# CHECK: DW_TAG_subprogram
# Test that LiveDebugValues can handle MBBs that are not reachable in a RPOT.
--- |
- define hidden zeroext i1 @__foo_block_invoke(i8* nocapture noundef readonly %.block_descriptor, i64 noundef %type) !dbg !7 {
+ define hidden zeroext i1 @__foo_block_invoke(ptr nocapture noundef readonly %.block_descriptor, i64 noundef %type) !dbg !7 {
entry:
unreachable
do.body.i129.i: ; preds = %if.else6.i128.i
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
index 03b10929f7be0..f8428274b7e9d 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
@@ -43,7 +43,7 @@
br i1 %retval, label %loop2, label %exit
loop2: ; preds = %loop
- store i32 %bar, i32* @glob
+ store i32 %bar, ptr @glob
br label %loop
exit: ; preds = %loop
@@ -51,7 +51,7 @@
}
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
!llvm.module.flags = !{!0, !1}
!llvm.dbg.cu = !{!2}
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
index 78935e1107474..b54c748ac9e84 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
@@ -138,7 +138,7 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
- define i32 @foo(i32* %bees, i32* %output) !dbg !4 {
+ define i32 @foo(ptr %bees, ptr %output) !dbg !4 {
entry:
br label %bb1
bb1:
@@ -149,7 +149,7 @@
ret i32 0
}
- define i32 @bar(i32* %bees, i32* %output) !dbg !40 {
+ define i32 @bar(ptr %bees, ptr %output) !dbg !40 {
entry:
br label %bb1
bb1:
@@ -160,7 +160,7 @@
ret i32 0
}
- define i32 @baz(i32* %bees, i32* %output) !dbg !80 {
+ define i32 @baz(ptr %bees, ptr %output) !dbg !80 {
entry:
br label %bb1
bb1:
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
index d093685dc15db..6f5c36933cffe 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
@@ -23,10 +23,10 @@
entry:
%local1 = alloca i32, align 4
call void @llvm.dbg.value(metadata i32 %arg1, metadata !12, metadata !DIExpression()), !dbg !15
- %0 = bitcast i32* %local1 to i8*, !dbg !15
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0), !dbg !15
- call void @init(i32* nonnull %local1), !dbg !15
- %1 = load i32, i32* %local1, align 4, !dbg !15, !tbaa !20
+ %0 = bitcast ptr %local1 to ptr, !dbg !15
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %0), !dbg !15
+ call void @init(ptr nonnull %local1), !dbg !15
+ %1 = load i32, ptr %local1, align 4, !dbg !15, !tbaa !20
%add = add nsw i32 %1, %arg1, !dbg !15
%call = call i32 @coeficient(i32 %add), !dbg !15
%cmp = icmp sgt i32 %call, 32, !dbg !15
@@ -34,30 +34,30 @@
if.then: ; preds = %entry
%call1 = call i32 @externFunc(i32 %arg1), !dbg !15
- %2 = load i32, i32* %local1, align 4, !dbg !15, !tbaa !20
+ %2 = load i32, ptr %local1, align 4, !dbg !15, !tbaa !20
%add2 = add nsw i32 %2, %call1, !dbg !15
br label %if.end, !dbg !15
if.else: ; preds = %entry
%call3 = call i32 @externFunc2(i32 %arg1), !dbg !15
- %3 = load i32, i32* %local1, align 4, !dbg !15, !tbaa !20
+ %3 = load i32, ptr %local1, align 4, !dbg !15, !tbaa !20
%add4 = add nsw i32 %3, %call3, !dbg !15
br label %if.end
if.end: ; preds = %if.else, %if.then
%storemerge = phi i32 [ %add4, %if.else ], [ %add2, %if.then ]
- %4 = bitcast i32* %local1 to i8*
+ %4 = bitcast ptr %local1 to ptr
%mul = shl nsw i32 %arg1, 2, !dbg !15
%add5 = add nsw i32 %storemerge, %mul, !dbg !15
%mul6 = mul nsw i32 %add5, %call, !dbg !15
- call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %4), !dbg !15
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4), !dbg !15
ret i32 %mul6, !dbg !15
}
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #0
+ declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #0
- declare dso_local void @init(i32*) local_unnamed_addr
+ declare dso_local void @init(ptr) local_unnamed_addr
declare dso_local i32 @coeficient(i32) local_unnamed_addr
@@ -66,13 +66,13 @@
declare dso_local i32 @externFunc2(i32) local_unnamed_addr
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #0
+ declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #0
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #1
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #2
+ declare void @llvm.stackprotector(ptr, ptr) #2
attributes #0 = { argmemonly nounwind }
attributes #1 = { nounwind readnone speculatable }
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
index 881d391fee812..3b5bf5d38075c 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
@@ -41,10 +41,10 @@
# CHECK-NEXT: DBG_VALUE $rdi,{{.*}}![[PVAR]], !DIExpression()
--- |
- define dso_local i32 @f(i32* readonly %p) local_unnamed_addr !dbg !7 {
+ define dso_local i32 @f(ptr readonly %p) local_unnamed_addr !dbg !7 {
entry:
- call void @llvm.dbg.value(metadata i32* %p, metadata !13, metadata !DIExpression()), !dbg !14
- %tobool = icmp eq i32* %p, null, !dbg !15
+ call void @llvm.dbg.value(metadata ptr %p, metadata !13, metadata !DIExpression()), !dbg !14
+ %tobool = icmp eq ptr %p, null, !dbg !15
br i1 %tobool, label %if.end, label %if.then, !dbg !17
if.then: ; preds = %entry
@@ -52,15 +52,15 @@
br label %if.end, !dbg !21
if.end: ; preds = %entry, %if.then
- %add.ptr = getelementptr inbounds i32, i32* %p, i64 1, !dbg !22
- %0 = load i32, i32* %add.ptr, align 4, !dbg !23, !tbaa !24
+ %add.ptr = getelementptr inbounds i32, ptr %p, i64 1, !dbg !22
+ %0 = load i32, ptr %add.ptr, align 4, !dbg !23, !tbaa !24
ret i32 %0, !dbg !28
}
- define dso_local i32 @g(i32* readonly %p) local_unnamed_addr !dbg !107 {
+ define dso_local i32 @g(ptr readonly %p) local_unnamed_addr !dbg !107 {
entry:
- call void @llvm.dbg.value(metadata i32* %p, metadata !113, metadata !DIExpression()), !dbg !114
- %tobool = icmp eq i32* %p, null, !dbg !115
+ call void @llvm.dbg.value(metadata ptr %p, metadata !113, metadata !DIExpression()), !dbg !114
+ %tobool = icmp eq ptr %p, null, !dbg !115
br i1 %tobool, label %if.end, label %if.then, !dbg !117
if.then: ; preds = %entry
@@ -68,15 +68,15 @@
br label %if.end, !dbg !121
if.end: ; preds = %entry, %if.then
- %add.ptr = getelementptr inbounds i32, i32* %p, i64 1, !dbg !122
- %0 = load i32, i32* %add.ptr, align 4, !dbg !123, !tbaa !24
+ %add.ptr = getelementptr inbounds i32, ptr %p, i64 1, !dbg !122
+ %0 = load i32, ptr %add.ptr, align 4, !dbg !123, !tbaa !24
ret i32 %0, !dbg !128
}
- define dso_local i32 @h(i32* readonly %p) local_unnamed_addr !dbg !207 {
+ define dso_local i32 @h(ptr readonly %p) local_unnamed_addr !dbg !207 {
entry:
- call void @llvm.dbg.value(metadata i32* %p, metadata !213, metadata !DIExpression()), !dbg !214
- %tobool = icmp eq i32* %p, null, !dbg !215
+ call void @llvm.dbg.value(metadata ptr %p, metadata !213, metadata !DIExpression()), !dbg !214
+ %tobool = icmp eq ptr %p, null, !dbg !215
br i1 %tobool, label %if.end, label %if.then, !dbg !217
if.then: ; preds = %entry
@@ -84,18 +84,18 @@
br label %if.end, !dbg !221
if.end: ; preds = %entry, %if.then
- %add.ptr = getelementptr inbounds i32, i32* %p, i64 1, !dbg !222
- %0 = load i32, i32* %add.ptr, align 4, !dbg !223, !tbaa !24
+ %add.ptr = getelementptr inbounds i32, ptr %p, i64 1, !dbg !222
+ %0 = load i32, ptr %add.ptr, align 4, !dbg !223, !tbaa !24
ret i32 %0, !dbg !228
}
- define dso_local i32 @i(i32* readonly %p) local_unnamed_addr !dbg !307 {
+ define dso_local i32 @i(ptr readonly %p) local_unnamed_addr !dbg !307 {
entry:
br label %foo
foo:
- call void @llvm.dbg.value(metadata i32* %p, metadata !313, metadata !DIExpression()), !dbg !314
- %tobool = icmp eq i32* %p, null, !dbg !315
+ call void @llvm.dbg.value(metadata ptr %p, metadata !313, metadata !DIExpression()), !dbg !314
+ %tobool = icmp eq ptr %p, null, !dbg !315
br i1 %tobool, label %if.end, label %if.then, !dbg !317
if.then: ; preds = %entry
@@ -103,18 +103,18 @@
br label %if.end, !dbg !321
if.end: ; preds = %entry, %if.then
- %add.ptr = getelementptr inbounds i32, i32* %p, i64 1, !dbg !322
- %0 = load i32, i32* %add.ptr, align 4, !dbg !323, !tbaa !24
+ %add.ptr = getelementptr inbounds i32, ptr %p, i64 1, !dbg !322
+ %0 = load i32, ptr %add.ptr, align 4, !dbg !323, !tbaa !24
ret i32 %0, !dbg !328
}
- define dso_local i32 @j(i32* readonly %p) local_unnamed_addr !dbg !402 {
+ define dso_local i32 @j(ptr readonly %p) local_unnamed_addr !dbg !402 {
entry:
br label %foo
foo:
- call void @llvm.dbg.value(metadata i32* %p, metadata !404, metadata !DIExpression()), !dbg !405
- %tobool = icmp eq i32* %p, null, !dbg !406
+ call void @llvm.dbg.value(metadata ptr %p, metadata !404, metadata !DIExpression()), !dbg !405
+ %tobool = icmp eq ptr %p, null, !dbg !406
br i1 %tobool, label %if.end, label %if.then, !dbg !408
if.then: ; preds = %entry
@@ -122,15 +122,15 @@
br label %if.end, !dbg !412
if.end: ; preds = %entry, %if.then
- %add.ptr = getelementptr inbounds i32, i32* %p, i64 1, !dbg !413
- %0 = load i32, i32* %add.ptr, align 4, !dbg !414, !tbaa !24
+ %add.ptr = getelementptr inbounds i32, ptr %p, i64 1, !dbg !413
+ %0 = load i32, ptr %add.ptr, align 4, !dbg !414, !tbaa !24
ret i32 %0, !dbg !415
}
- define dso_local i32 @k(i32* readonly %p) local_unnamed_addr !dbg !507 {
+ define dso_local i32 @k(ptr readonly %p) local_unnamed_addr !dbg !507 {
entry:
- call void @llvm.dbg.value(metadata i32* %p, metadata !513, metadata !DIExpression()), !dbg !514
- %tobool = icmp eq i32* %p, null, !dbg !515
+ call void @llvm.dbg.value(metadata ptr %p, metadata !513, metadata !DIExpression()), !dbg !514
+ %tobool = icmp eq ptr %p, null, !dbg !515
br i1 %tobool, label %if.end, label %if.then, !dbg !517
if.then: ; preds = %entry
@@ -138,8 +138,8 @@
br label %if.end, !dbg !521
if.end: ; preds = %entry, %if.then
- %add.ptr = getelementptr inbounds i32, i32* %p, i64 1, !dbg !522
- %0 = load i32, i32* %add.ptr, align 4, !dbg !523, !tbaa !24
+ %add.ptr = getelementptr inbounds i32, ptr %p, i64 1, !dbg !522
+ %0 = load i32, ptr %add.ptr, align 4, !dbg !523, !tbaa !24
ret i32 %0, !dbg !528
}
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
index 88ba9a5ac458b..11254f1f9952e 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
@@ -108,28 +108,28 @@
tail call void @llvm.dbg.value(metadata i32 %int2, i64 0, metadata !28, metadata !38), !dbg !43
tail call void @llvm.dbg.value(metadata i32 %int3, i64 0, metadata !29, metadata !38), !dbg !44
tail call void @llvm.dbg.value(metadata i32 %int4, i64 0, metadata !30, metadata !38), !dbg !45
- %0 = load i32, i32* @glob0, align 4, !dbg !46, !tbaa !47
+ %0 = load i32, ptr @glob0, align 4, !dbg !46, !tbaa !47
tail call void @llvm.dbg.value(metadata i32 %0, i64 0, metadata !31, metadata !38), !dbg !51
- %1 = load i32, i32* @glob1, align 4, !dbg !52, !tbaa !47
+ %1 = load i32, ptr @glob1, align 4, !dbg !52, !tbaa !47
tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !32, metadata !38), !dbg !53
- %2 = load i32, i32* @glob2, align 4, !dbg !54, !tbaa !47
+ %2 = load i32, ptr @glob2, align 4, !dbg !54, !tbaa !47
tail call void @llvm.dbg.value(metadata i32 %2, i64 0, metadata !33, metadata !38), !dbg !55
- %3 = load i32, i32* @glob3, align 4, !dbg !56, !tbaa !47
+ %3 = load i32, ptr @glob3, align 4, !dbg !56, !tbaa !47
tail call void @llvm.dbg.value(metadata i32 %3, i64 0, metadata !34, metadata !38), !dbg !57
- %4 = bitcast i32* %inte to i8*, !dbg !58
- call void @llvm.lifetime.start(i64 4, i8* nonnull %4) #4, !dbg !58
- %5 = load i32, i32* @glob4, align 4, !dbg !59, !tbaa !47
+ %4 = bitcast ptr %inte to ptr, !dbg !58
+ call void @llvm.lifetime.start(i64 4, ptr nonnull %4) #4, !dbg !58
+ %5 = load i32, ptr @glob4, align 4, !dbg !59, !tbaa !47
tail call void @llvm.dbg.value(metadata i32 %5, i64 0, metadata !35, metadata !38), !dbg !60
tail call void @llvm.dbg.value(metadata i32 %5, i64 0, metadata !35, metadata !38), !dbg !60
- store i32 %5, i32* %inte, align 4, !dbg !60, !tbaa !47
- %6 = bitcast i32* %intf to i8*, !dbg !61
- call void @llvm.lifetime.start(i64 4, i8* nonnull %6) #4, !dbg !61
- %7 = load i32, i32* @glob5, align 4, !dbg !62, !tbaa !47
+ store i32 %5, ptr %inte, align 4, !dbg !60, !tbaa !47
+ %6 = bitcast ptr %intf to ptr, !dbg !61
+ call void @llvm.lifetime.start(i64 4, ptr nonnull %6) #4, !dbg !61
+ %7 = load i32, ptr @glob5, align 4, !dbg !62, !tbaa !47
tail call void @llvm.dbg.value(metadata i32 %7, i64 0, metadata !36, metadata !38), !dbg !63
tail call void @llvm.dbg.value(metadata i32 %7, i64 0, metadata !36, metadata !38), !dbg !63
- store i32 %7, i32* %intf, align 4, !dbg !63, !tbaa !47
- %8 = bitcast i32* %intg to i8*, !dbg !64
- call void @llvm.lifetime.start(i64 4, i8* nonnull %8) #4, !dbg !64
+ store i32 %7, ptr %intf, align 4, !dbg !63, !tbaa !47
+ %8 = bitcast ptr %intg to ptr, !dbg !64
+ call void @llvm.lifetime.start(i64 4, ptr nonnull %8) #4, !dbg !64
%tobool = icmp eq i32 %b0, 0, !dbg !65
br i1 %tobool, label %if.end, label %cleanup, !dbg !67
@@ -146,11 +146,11 @@
br i1 %tobool3, label %if.end13, label %if.then4, !dbg !76
if.then4: ; preds = %if.end
- tail call void @llvm.dbg.value(metadata i32* %inte, i64 0, metadata !35, metadata !77), !dbg !60
- tail call void @llvm.dbg.value(metadata i32* %intf, i64 0, metadata !36, metadata !77), !dbg !63
- tail call void @llvm.dbg.value(metadata i32* %intg, i64 0, metadata !37, metadata !77), !dbg !78
- call void @set(i32* nonnull %inte, i32* nonnull %intf, i32* nonnull %intg) #4, !dbg !79
- %9 = load i32, i32* %inte, align 4, !dbg !81, !tbaa !47
+ tail call void @llvm.dbg.value(metadata ptr %inte, i64 0, metadata !35, metadata !77), !dbg !60
+ tail call void @llvm.dbg.value(metadata ptr %intf, i64 0, metadata !36, metadata !77), !dbg !63
+ tail call void @llvm.dbg.value(metadata ptr %intg, i64 0, metadata !37, metadata !77), !dbg !78
+ call void @set(ptr nonnull %inte, ptr nonnull %intf, ptr nonnull %intg) #4, !dbg !79
+ %9 = load i32, ptr %inte, align 4, !dbg !81, !tbaa !47
call void @llvm.dbg.value(metadata i32 %9, i64 0, metadata !35, metadata !38), !dbg !60
%mul833 = add i32 %2, %1, !dbg !82
%add10 = mul i32 %9, %mul833, !dbg !82
@@ -171,30 +171,30 @@
br label %cleanup, !dbg !89
cleanup: ; preds = %if.end13, %entry
- %10 = bitcast i32* %intg to i8*
- %11 = bitcast i32* %intf to i8*
- %12 = bitcast i32* %inte to i8*
- call void @llvm.lifetime.end(i64 4, i8* nonnull %10) #4, !dbg !89
- call void @llvm.lifetime.end(i64 4, i8* nonnull %11) #4, !dbg !89
- call void @llvm.lifetime.end(i64 4, i8* nonnull %12) #4, !dbg !89
+ %10 = bitcast ptr %intg to ptr
+ %11 = bitcast ptr %intf to ptr
+ %12 = bitcast ptr %inte to ptr
+ call void @llvm.lifetime.end(i64 4, ptr nonnull %10) #4, !dbg !89
+ call void @llvm.lifetime.end(i64 4, ptr nonnull %11) #4, !dbg !89
+ call void @llvm.lifetime.end(i64 4, ptr nonnull %12) #4, !dbg !89
ret void, !dbg !90
}
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.start(i64, i8* nocapture) #1
+ declare void @llvm.lifetime.start(i64, ptr nocapture) #1
declare void @use(i32) local_unnamed_addr #2
- declare void @set(i32*, i32*, i32*) local_unnamed_addr #2
+ declare void @set(ptr, ptr, ptr) local_unnamed_addr #2
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.end(i64, i8* nocapture) #1
+ declare void @llvm.lifetime.end(i64, ptr nocapture) #1
; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #3
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #4
+ declare void @llvm.stackprotector(ptr, ptr) #4
attributes #0 = { nounwind uwtable "frame-pointer"="non-leaf" }
attributes #1 = { argmemonly nounwind }
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
index 279f166df6f89..4a8e5b4a3e4b7 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
@@ -47,17 +47,17 @@
@.str = private unnamed_addr constant [13 x i8] c"m(main): %d\0A\00", align 1
; Function Attrs: nounwind uwtable
- define i32 @main(i32 %argc, i8** nocapture readonly %argv) #0 !dbg !4 {
+ define i32 @main(i32 %argc, ptr nocapture readonly %argv) #0 !dbg !4 {
entry:
tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !12, metadata !20), !dbg !21
- tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !13, metadata !20), !dbg !22
+ tail call void @llvm.dbg.value(metadata ptr %argv, i64 0, metadata !13, metadata !20), !dbg !22
%cmp = icmp eq i32 %argc, 2, !dbg !24
br i1 %cmp, label %if.else, label %if.end, !dbg !26
if.else: ; preds = %entry
- %arrayidx = getelementptr inbounds i8*, i8** %argv, i64 1, !dbg !27
- %0 = load i8*, i8** %arrayidx, align 8, !dbg !27, !tbaa !28
- %call = tail call i32 (i8*, ...) bitcast (i32 (...)* @atoi to i32 (i8*, ...)*)(i8* %0) #4, !dbg !32
+ %arrayidx = getelementptr inbounds ptr, ptr %argv, i64 1, !dbg !27
+ %0 = load ptr, ptr %arrayidx, align 8, !dbg !27, !tbaa !28
+ %call = tail call i32 (ptr, ...) @atoi(ptr %0) #4, !dbg !32
tail call void @llvm.dbg.value(metadata i32 %call, i64 0, metadata !14, metadata !20), !dbg !33
br label %if.end
@@ -79,8 +79,8 @@
if.end.7: ; preds = %if.else.5, %if.then.3
%storemerge = phi i32 [ %call6, %if.else.5 ], [ %add, %if.then.3 ]
- store i32 %storemerge, i32* @m, align 4, !dbg !43, !tbaa !44
- %call8 = tail call i32 (i8*, ...) @printf(i8* nonnull getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %storemerge) #4, !dbg !46
+ store i32 %storemerge, ptr @m, align 4, !dbg !43, !tbaa !44
+ %call8 = tail call i32 (ptr, ...) @printf(ptr nonnull @.str, i32 %storemerge) #4, !dbg !46
ret i32 0, !dbg !47
}
@@ -93,7 +93,7 @@
declare i32 @inc(i32) #1
; Function Attrs: nounwind
- declare i32 @printf(i8* nocapture readonly, ...) #2
+ declare i32 @printf(ptr nocapture readonly, ...) #2
; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #3
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
index 1db981ba1d227..5134eb07f1787 100644
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
@@ -72,7 +72,7 @@
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #3
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #4
+ declare void @llvm.stackprotector(ptr, ptr) #4
attributes #0 = { alwaysinline nounwind ssp uwtable }
attributes #2 = { nounwind ssp uwtable }
diff --git a/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir b/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
index 8195ceef50a2e..037306a2ca95e 100644
--- a/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
+++ b/llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
@@ -26,10 +26,10 @@
%struct.a = type { i32 }
; Function Attrs: nounwind ssp
- define i32 @bar(%struct.a* nocapture %b, i32 %shoes) !dbg !4 {
+ define i32 @bar(ptr nocapture %b, i32 %shoes) !dbg !4 {
entry:
tail call void @llvm.dbg.value(metadata i32 %shoes, metadata !9, metadata !DIExpression()), !dbg !16
- %tmp1 = getelementptr inbounds %struct.a, %struct.a* %b, i64 0, i32 0, !dbg !17
+ %tmp1 = getelementptr inbounds %struct.a, ptr %b, i64 0, i32 0, !dbg !17
br label %bb3
bb1: ; preds = %bb2
@@ -43,7 +43,7 @@
br label %bb1
bb3: ; preds = %entry
- %tmp2 = load i32, i32* %tmp1, align 4, !dbg !17
+ %tmp2 = load i32, ptr %tmp1, align 4, !dbg !17
br label %bb2
exit: ; preds = %bb1
@@ -56,7 +56,7 @@
declare void @llvm.dbg.value(metadata, metadata, metadata)
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3}
diff --git a/llvm/test/DebugInfo/MIR/X86/machine-cse.mir b/llvm/test/DebugInfo/MIR/X86/machine-cse.mir
index cbced4dd3ee2d..120dbdf850cc4 100644
--- a/llvm/test/DebugInfo/MIR/X86/machine-cse.mir
+++ b/llvm/test/DebugInfo/MIR/X86/machine-cse.mir
@@ -15,34 +15,34 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
- %struct.s2 = type { i32, i8*, i8*, [256 x %struct.s1*], [8 x i32], i64, i8*, i32, i64, i64, i32, %struct.s3*, %struct.s3*, [49 x i64] }
+ %struct.s2 = type { i32, ptr, ptr, [256 x ptr], [8 x i32], i64, ptr, i32, i64, i64, i32, ptr, ptr, [49 x i64] }
%struct.s1 = type { %ptr, %ptr }
- %ptr = type { i8* }
- %struct.s3 = type { %struct.s3*, %struct.s3*, i32, i32, i32 }
+ %ptr = type { ptr }
+ %struct.s3 = type { ptr, ptr, i32, i32, i32 }
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #0
- define fastcc i8* @t(i32 %base) !dbg !3 {
+ define fastcc ptr @t(i32 %base) !dbg !3 {
entry:
%0 = zext i32 %base to i64
- %1 = getelementptr inbounds %struct.s2, %struct.s2* null, i64 %0
+ %1 = getelementptr inbounds %struct.s2, ptr null, i64 %0
br i1 undef, label %bb1, label %bb2
bb1: ; preds = %entry
- %2 = getelementptr inbounds %struct.s2, %struct.s2* null, i64 %0, i32 0
- call void @llvm.dbg.value(metadata i32* %2, metadata !4, metadata !DIExpression()), !dbg !7
- call void @bar(i32* %2)
+ %2 = getelementptr inbounds %struct.s2, ptr null, i64 %0, i32 0
+ call void @llvm.dbg.value(metadata ptr %2, metadata !4, metadata !DIExpression()), !dbg !7
+ call void @bar(ptr %2)
unreachable
bb2: ; preds = %entry
- %3 = ptrtoint %struct.s2* %1 to i64
+ %3 = ptrtoint ptr %1 to i64
call void @baz(i64 %3)
unreachable
}
; This is a stub replicating bb structure of @t
- define fastcc i8* @u(i32 %base) !dbg !33 {
+ define fastcc ptr @u(i32 %base) !dbg !33 {
entry:
br i1 undef, label %bb1, label %bb2
@@ -54,14 +54,14 @@
}
- declare void @bar(i32*)
+ declare void @bar(ptr)
declare void @baz(i64)
- declare i8* @foo(%struct.s2*)
+ declare ptr @foo(ptr)
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #1
+ declare void @llvm.stackprotector(ptr, ptr) #1
attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind }
diff --git a/llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir b/llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir
index 56d1f6a3bbe57..7d43a8ed678b3 100644
--- a/llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir
+++ b/llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir
@@ -9,7 +9,7 @@
@x = common local_unnamed_addr global i32 0, align 4
- define void @test(i32* nocapture readonly %p) local_unnamed_addr !dbg !14 {
+ define void @test(ptr nocapture readonly %p) local_unnamed_addr !dbg !14 {
; Stripped
entry:
br label %block1
diff --git a/llvm/test/DebugInfo/MIR/X86/machinesink.mir b/llvm/test/DebugInfo/MIR/X86/machinesink.mir
index 5d9d658afc43c..bd49278ce46c4 100644
--- a/llvm/test/DebugInfo/MIR/X86/machinesink.mir
+++ b/llvm/test/DebugInfo/MIR/X86/machinesink.mir
@@ -16,7 +16,7 @@
@x = common local_unnamed_addr global i32 0, align 4, !dbg !0
; Function Attrs: noreturn nounwind uwtable
- define void @Process(i32* nocapture readonly %p) local_unnamed_addr !dbg !9 {
+ define void @Process(ptr nocapture readonly %p) local_unnamed_addr !dbg !9 {
; Stripped
entry:
br label %nou
@@ -26,7 +26,7 @@
ret void
}
- define void @test2(i32* nocapture readonly %p) local_unnamed_addr !dbg !101 {
+ define void @test2(ptr nocapture readonly %p) local_unnamed_addr !dbg !101 {
; Stripped
entry:
br label %block1
@@ -36,7 +36,7 @@
ret void
}
- define void @test3(i32* nocapture readonly %p) local_unnamed_addr !dbg !201 {
+ define void @test3(ptr nocapture readonly %p) local_unnamed_addr !dbg !201 {
; Stripped
entry:
br label %block1
diff --git a/llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir b/llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
index 355530bc55ab2..a34ab441eb146 100644
--- a/llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
+++ b/llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
@@ -13,18 +13,18 @@
@x = common local_unnamed_addr global i32 0, align 4, !dbg !0
- define void @Process(i32* nocapture readonly %p) !dbg !10 {
+ define void @Process(ptr nocapture readonly %p) !dbg !10 {
entry:
- call void @llvm.dbg.value(metadata i32* %p, metadata !17, metadata !DIExpression()), !dbg !18
+ call void @llvm.dbg.value(metadata ptr %p, metadata !17, metadata !DIExpression()), !dbg !18
br label %while.body, !dbg !19
while.body: ; preds = %while.body, %entry
- %p.addr.0 = phi i32* [ %p, %entry ], [ %incdec.ptr, %while.body ]
- call void @llvm.dbg.value(metadata i32* %p.addr.0, metadata !17, metadata !DIExpression()), !dbg !18
- %incdec.ptr = getelementptr inbounds i32, i32* %p.addr.0, i64 1, !dbg !20
- call void @llvm.dbg.value(metadata i32* %incdec.ptr, metadata !17, metadata !DIExpression()), !dbg !18
- %0 = load i32, i32* %p.addr.0, align 4, !dbg !21
- store i32 %0, i32* @x, align 4, !dbg !22
+ %p.addr.0 = phi ptr [ %p, %entry ], [ %incdec.ptr, %while.body ]
+ call void @llvm.dbg.value(metadata ptr %p.addr.0, metadata !17, metadata !DIExpression()), !dbg !18
+ %incdec.ptr = getelementptr inbounds i32, ptr %p.addr.0, i64 1, !dbg !20
+ call void @llvm.dbg.value(metadata ptr %incdec.ptr, metadata !17, metadata !DIExpression()), !dbg !18
+ %0 = load i32, ptr %p.addr.0, align 4, !dbg !21
+ store i32 %0, ptr @x, align 4, !dbg !22
br label %while.body, !dbg !23, !llvm.loop !25
}
diff --git a/llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir b/llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
index 3ddcafba38d34..90a6abdf9bd0b 100644
--- a/llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
+++ b/llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
@@ -28,18 +28,18 @@
@x = common local_unnamed_addr global i32 0, align 4, !dbg !0
; Function Attrs: noreturn nounwind uwtable
- define void @Process(i32* nocapture readonly %p) local_unnamed_addr !dbg !9 {
+ define void @Process(ptr nocapture readonly %p) local_unnamed_addr !dbg !9 {
entry:
- tail call void @llvm.dbg.value(metadata i32* %p, i64 0, metadata !16, metadata !17), !dbg !18
+ tail call void @llvm.dbg.value(metadata ptr %p, i64 0, metadata !16, metadata !17), !dbg !18
br label %while.body, !dbg !19
while.body: ; preds = %while.body, %entry
- %p.addr.0 = phi i32* [ %p, %entry ], [ %incdec.ptr, %while.body ]
- tail call void @llvm.dbg.value(metadata i32* %p.addr.0, i64 0, metadata !16, metadata !17), !dbg !18
- %incdec.ptr = getelementptr inbounds i32, i32* %p.addr.0, i64 1, !dbg !20
- tail call void @llvm.dbg.value(metadata i32* %incdec.ptr, i64 0, metadata !16, metadata !17), !dbg !18
- %0 = load i32, i32* %p.addr.0, align 4, !dbg !21, !tbaa !22
- store i32 %0, i32* @x, align 4, !dbg !26, !tbaa !22
+ %p.addr.0 = phi ptr [ %p, %entry ], [ %incdec.ptr, %while.body ]
+ tail call void @llvm.dbg.value(metadata ptr %p.addr.0, i64 0, metadata !16, metadata !17), !dbg !18
+ %incdec.ptr = getelementptr inbounds i32, ptr %p.addr.0, i64 1, !dbg !20
+ tail call void @llvm.dbg.value(metadata ptr %incdec.ptr, i64 0, metadata !16, metadata !17), !dbg !18
+ %0 = load i32, ptr %p.addr.0, align 4, !dbg !21, !tbaa !22
+ store i32 %0, ptr @x, align 4, !dbg !26, !tbaa !22
br label %while.body, !dbg !27, !llvm.loop !29
}
diff --git a/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir b/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
index 262eb06697760..776335e5ddfd4 100644
--- a/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
+++ b/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
@@ -29,7 +29,7 @@
call void @llvm.dbg.value(metadata i32 %q, metadata !16, metadata !DIExpression()), !dbg !18
call void @llvm.dbg.value(metadata i32 %r, metadata !17, metadata !DIExpression()), !dbg !18
%add = add nsw i32 %p, 1, !dbg !18
- store i32 %add, i32* @global, align 4, !dbg !18
+ store i32 %add, ptr @global, align 4, !dbg !18
tail call void asm sideeffect "", "~{edi},~{esi},~{edx},~{dirflag},~{fpsr},~{flags}"(), !dbg !18, !srcloc !19
ret i32 123, !dbg !18
}
diff --git a/llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir b/llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
index 8ba64c47cb38b..9585f4bb13179 100644
--- a/llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
+++ b/llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
@@ -20,7 +20,7 @@
declare void @bar()
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #0
+ declare void @llvm.stackprotector(ptr, ptr) #0
attributes #0 = { nounwind }
diff --git a/llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir b/llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir
index 8cca1de12b9b1..2307df9b392ba 100644
--- a/llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir
+++ b/llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir
@@ -10,7 +10,7 @@
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: noinline norecurse nounwind uwtable
- define dso_local i32 @main(i32 %argc, i8** nocapture readnone %argv) !dbg !14 {
+ define dso_local i32 @main(i32 %argc, ptr nocapture readnone %argv) !dbg !14 {
entry:
br label %return
return:
diff --git a/llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir b/llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir
index 748214f46caea..6941467fe0e4a 100644
--- a/llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir
+++ b/llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir
@@ -27,32 +27,32 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
- @b = common dso_local local_unnamed_addr global i32* null, align 8, !dbg !0
+ @b = common dso_local local_unnamed_addr global ptr null, align 8, !dbg !0
@a = common dso_local local_unnamed_addr global i32 0, align 4, !dbg !6
; Function Attrs: nounwind uwtable
define dso_local i32 @main() local_unnamed_addr !dbg !14 {
entry:
%l_1081 = alloca i32, align 4
- %0 = bitcast i32* %l_1081 to i8*, !dbg !20
- call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0), !dbg !20
+ %0 = bitcast ptr %l_1081 to ptr, !dbg !20
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %0), !dbg !20
call void @llvm.dbg.value(metadata i32 1834104526, metadata !18, metadata !DIExpression()), !dbg !21
- call void @llvm.dbg.value(metadata i32* %l_1081, metadata !19, metadata !DIExpression()), !dbg !21
- store i32* %l_1081, i32** @b, align 8, !dbg !22, !tbaa !23
- store i32 9, i32* @a, align 4, !dbg !27, !tbaa !28
- store i32 9, i32* %l_1081, align 4, !dbg !30, !tbaa !28
+ call void @llvm.dbg.value(metadata ptr %l_1081, metadata !19, metadata !DIExpression()), !dbg !21
+ store ptr %l_1081, ptr @b, align 8, !dbg !22, !tbaa !23
+ store i32 9, ptr @a, align 4, !dbg !27, !tbaa !28
+ store i32 9, ptr %l_1081, align 4, !dbg !30, !tbaa !28
%call = call i32 (...) @optimize_me_not(), !dbg !31
- call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0), !dbg !32
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %0), !dbg !32
ret i32 0, !dbg !32
}
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+ declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
declare dso_local i32 @optimize_me_not(...) local_unnamed_addr
; Function Attrs: argmemonly nounwind
- declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+ declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata)
diff --git a/llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir b/llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir
index e2b8fa272d10e..4b5f19d66845a 100644
--- a/llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir
+++ b/llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir
@@ -13,13 +13,13 @@
declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; Original IR source here:
- define i32 @test(i32* %pin) {
+ define i32 @test(ptr %pin) {
entry:
br label %start.test1
start.test1: ; preds = %start, %entry
%foo = phi i32 [ 0, %entry ], [ %bar, %start.test1 ]
- %baz = load i32, i32* %pin, align 1
+ %baz = load i32, ptr %pin, align 1
%qux = xor i32 %baz, 1234
%bar = add i32 %qux, %foo
call void @llvm.dbg.value(metadata i32 %foo, metadata !3, metadata !DIExpression()), !dbg !5
@@ -31,7 +31,7 @@
}
; Stubs to appease the MIR parser
- define i32 @test2(i32* %pin) {
+ define i32 @test2(ptr %pin) {
entry:
ret i32 0
start.test2:
@@ -41,7 +41,7 @@
}
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**) #1
+ declare void @llvm.stackprotector(ptr, ptr) #1
attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind }
diff --git a/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir b/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
index 9c51dac7431e5..4817fe3115058 100644
--- a/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
+++ b/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
@@ -56,8 +56,8 @@
define dso_local i32 @foo(i32 %param) local_unnamed_addr !dbg !8 {
entry:
call void @llvm.dbg.value(metadata i32 %param, metadata !13, metadata !DIExpression()), !dbg !14
- store i32 %param, i32* @side_effect, align 4, !dbg !15
- %0 = load i32, i32* @value, align 4, !dbg !20
+ store i32 %param, ptr @side_effect, align 4, !dbg !15
+ %0 = load i32, ptr @value, align 4, !dbg !20
call void @llvm.dbg.value(metadata i32 %0, metadata !13, metadata !DIExpression()), !dbg !14
tail call void @bar(i32 %0), !dbg !21
ret i32 0, !dbg !22
@@ -65,8 +65,8 @@
define dso_local i32 @foo6(i32 %param) local_unnamed_addr !dbg !34 {
entry:
- store i32 %param, i32* @side_effect, align 4, !dbg !35
- %0 = load i32, i32* @value, align 4, !dbg !35
+ store i32 %param, ptr @side_effect, align 4, !dbg !35
+ %0 = load i32, ptr @value, align 4, !dbg !35
tail call void @bar(i32 %0), !dbg !35
ret i32 0, !dbg !35
}
@@ -74,8 +74,8 @@
; Function Attrs: nounwind uwtable
define dso_local i32 @foo2(i32 %param) local_unnamed_addr !dbg !26 {
entry:
- store i32 %param, i32* @side_effect, align 4, !dbg !27
- %0 = load i32, i32* @value, align 4, !dbg !27
+ store i32 %param, ptr @side_effect, align 4, !dbg !27
+ %0 = load i32, ptr @value, align 4, !dbg !27
tail call void @bar(i32 %0), !dbg !27
ret i32 0, !dbg !27
}
@@ -83,8 +83,8 @@
; Function Attrs: nounwind uwtable
define dso_local i32 @foo3(i32 %param) local_unnamed_addr !dbg !28 {
entry:
- store i32 %param, i32* @side_effect, align 4, !dbg !29
- %0 = load i32, i32* @value, align 4, !dbg !29
+ store i32 %param, ptr @side_effect, align 4, !dbg !29
+ %0 = load i32, ptr @value, align 4, !dbg !29
tail call void @bar(i32 %0), !dbg !29
ret i32 0, !dbg !29
}
@@ -92,8 +92,8 @@
; Function Attrs: nounwind uwtable
define dso_local i32 @foo4(i32 %param) local_unnamed_addr !dbg !30 {
entry:
- store i32 %param, i32* @side_effect, align 4, !dbg !31
- %0 = load i32, i32* @value, align 4, !dbg !31
+ store i32 %param, ptr @side_effect, align 4, !dbg !31
+ %0 = load i32, ptr @value, align 4, !dbg !31
tail call void @bar(i32 %0), !dbg !31
ret i32 0, !dbg !31
}
@@ -101,8 +101,8 @@
; Function Attrs: nounwind uwtable
define dso_local i32 @foo5(i32 %param) local_unnamed_addr !dbg !32 {
entry:
- store i32 %param, i32* @side_effect, align 4, !dbg !33
- %0 = load i32, i32* @value, align 4, !dbg !33
+ store i32 %param, ptr @side_effect, align 4, !dbg !33
+ %0 = load i32, ptr @value, align 4, !dbg !33
tail call void @bar(i32 %0), !dbg !33
ret i32 0, !dbg !33
}
diff --git a/llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir b/llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
index b50882e4079e0..73a571dbf150f 100644
--- a/llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
+++ b/llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
@@ -7,10 +7,10 @@
target triple = "x86_64-apple-macosx10.7.0"
; Function Attrs: nounwind readonly ssp uwtable
- define i32 @foo(i32 %i, i32* nocapture %c) !dbg !4 {
+ define i32 @foo(i32 %i, ptr nocapture %c) !dbg !4 {
call void @llvm.dbg.value(metadata i32 %i, metadata !9, metadata !DIExpression()), !dbg !14
- %ab = load i32, i32* %c, align 1, !dbg !15
- call void @llvm.dbg.value(metadata i32* %c, metadata !10, metadata !DIExpression()), !dbg !16
+ %ab = load i32, ptr %c, align 1, !dbg !15
+ call void @llvm.dbg.value(metadata ptr %c, metadata !10, metadata !DIExpression()), !dbg !16
call void @llvm.dbg.value(metadata i32 %ab, metadata !12, metadata !DIExpression()), !dbg !15
%cd = icmp eq i32 %i, 42, !dbg !17
br i1 %cd, label %bb1, label %bb2, !dbg !17
@@ -28,7 +28,7 @@
declare void @llvm.dbg.value(metadata, metadata, metadata)
; Function Attrs: nounwind
- declare void @llvm.stackprotector(i8*, i8**)
+ declare void @llvm.stackprotector(ptr, ptr)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3}
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