[llvm] cd0d11b - [M68k] Convert tests to opaque pointers (NFC)
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 6 12:53:21 PST 2024
Author: Fangrui Song
Date: 2024-02-06T12:53:16-08:00
New Revision: cd0d11be7a6de335dcfcf2788a97d915f017e25e
URL: https://github.com/llvm/llvm-project/commit/cd0d11be7a6de335dcfcf2788a97d915f017e25e
DIFF: https://github.com/llvm/llvm-project/commit/cd0d11be7a6de335dcfcf2788a97d915f017e25e.diff
LOG: [M68k] Convert tests to opaque pointers (NFC)
Added:
Modified:
llvm/test/CodeGen/M68k/Alloc/dyn_alloca_aligned.ll
llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll
llvm/test/CodeGen/M68k/Arith/add.ll
llvm/test/CodeGen/M68k/Arith/bitwise.ll
llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll
llvm/test/CodeGen/M68k/Atomics/load-store.ll
llvm/test/CodeGen/M68k/CConv/c-args-inreg.ll
llvm/test/CodeGen/M68k/CConv/c-args.ll
llvm/test/CodeGen/M68k/CConv/fastcc-args.ll
llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll
llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
llvm/test/CodeGen/M68k/CodeModel/medium-static.ll
llvm/test/CodeGen/M68k/CodeModel/small-pic.ll
llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
llvm/test/CodeGen/M68k/CodeModel/small-static.ll
llvm/test/CodeGen/M68k/Control/cmp.ll
llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
llvm/test/CodeGen/M68k/inline-asm.ll
llvm/test/CodeGen/M68k/link-unlnk.ll
llvm/test/CodeGen/M68k/reserved-regs.ll
llvm/test/CodeGen/M68k/varargs.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/M68k/Alloc/dyn_alloca_aligned.ll b/llvm/test/CodeGen/M68k/Alloc/dyn_alloca_aligned.ll
index ff361b6268221..c8cf34dbe7f2a 100644
--- a/llvm/test/CodeGen/M68k/Alloc/dyn_alloca_aligned.ll
+++ b/llvm/test/CodeGen/M68k/Alloc/dyn_alloca_aligned.ll
@@ -24,6 +24,6 @@ define i32 @A(i32 %Size) {
; CHECK-NEXT: unlk %a6
; CHECK-NEXT: rts
%A = alloca i8, i32 %Size, align 128
- %A_addr = ptrtoint i8* %A to i32
+ %A_addr = ptrtoint ptr %A to i32
ret i32 %A_addr
}
diff --git a/llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll b/llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll
index 0fd32b6c12adf..bd5e593edb33d 100644
--- a/llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll
+++ b/llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll
@@ -4,7 +4,7 @@
declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
-define fastcc i32 @test5(i32 %v1, i32 %v2, i32* %X) nounwind {
+define fastcc i32 @test5(i32 %v1, i32 %v2, ptr %X) nounwind {
; CHECK-LABEL: test5:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: add.l %d1, %d0
@@ -20,14 +20,14 @@ entry:
br i1 %obit, label %overflow, label %normal
normal:
- store i32 0, i32* %X
+ store i32 0, ptr %X
br label %overflow
overflow:
ret i32 %sum
}
-define fastcc i1 @test6(i32 %v1, i32 %v2, i32* %X) nounwind {
+define fastcc i1 @test6(i32 %v1, i32 %v2, ptr %X) nounwind {
; CHECK-LABEL: test6:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: add.l %d1, %d0
@@ -44,7 +44,7 @@ entry:
br i1 %obit, label %carry, label %normal
normal:
- store i32 0, i32* %X
+ store i32 0, ptr %X
br label %carry
carry:
diff --git a/llvm/test/CodeGen/M68k/Arith/add.ll b/llvm/test/CodeGen/M68k/Arith/add.ll
index 19d8d619083c9..281751e3e183c 100644
--- a/llvm/test/CodeGen/M68k/Arith/add.ll
+++ b/llvm/test/CodeGen/M68k/Arith/add.ll
@@ -14,30 +14,30 @@ define i64 @test1(i64 %A, i32 %B) nounwind {
ret i64 %tmp5
}
-define void @test2(i32* inreg %a) nounwind {
+define void @test2(ptr inreg %a) nounwind {
; CHECK-LABEL: test2:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l %d0, %a0
; CHECK-NEXT: add.l #128, (%a0)
; CHECK-NEXT: rts
- %aa = load i32, i32* %a
+ %aa = load i32, ptr %a
%b = add i32 %aa, 128
- store i32 %b, i32* %a
+ store i32 %b, ptr %a
ret void
}
-define fastcc void @test2_fast(i32* inreg %a) nounwind {
+define fastcc void @test2_fast(ptr inreg %a) nounwind {
; CHECK-LABEL: test2_fast:
; CHECK: ; %bb.0:
; CHECK-NEXT: add.l #128, (%a0)
; CHECK-NEXT: rts
- %aa = load i32, i32* %a
+ %aa = load i32, ptr %a
%b = add i32 %aa, 128
- store i32 %b, i32* %a
+ store i32 %b, ptr %a
ret void
}
-define fastcc void @test3(i64* inreg %a) nounwind {
+define fastcc void @test3(ptr inreg %a) nounwind {
; CHECK-LABEL: test3:
; CHECK: ; %bb.0:
; CHECK-NEXT: suba.l #4, %sp
@@ -52,13 +52,13 @@ define fastcc void @test3(i64* inreg %a) nounwind {
; CHECK-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
- %aa = load i64, i64* %a
+ %aa = load i64, ptr %a
%b = add i64 %aa, 2147483648
- store i64 %b, i64* %a
+ store i64 %b, ptr %a
ret void
}
-define fastcc void @test4(i64* inreg %a) nounwind {
+define fastcc void @test4(ptr inreg %a) nounwind {
; CHECK-LABEL: test4:
; CHECK: ; %bb.0:
; CHECK-NEXT: suba.l #4, %sp
@@ -73,9 +73,9 @@ define fastcc void @test4(i64* inreg %a) nounwind {
; CHECK-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
- %aa = load i64, i64* %a
+ %aa = load i64, ptr %a
%b = add i64 %aa, 128
- store i64 %b, i64* %a
+ store i64 %b, ptr %a
ret void
}
diff --git a/llvm/test/CodeGen/M68k/Arith/bitwise.ll b/llvm/test/CodeGen/M68k/Arith/bitwise.ll
index fa8ea1370f866..70e4dd42bfb6d 100644
--- a/llvm/test/CodeGen/M68k/Arith/bitwise.ll
+++ b/llvm/test/CodeGen/M68k/Arith/bitwise.ll
@@ -117,7 +117,7 @@ define i32 @eorl(i32 %a, i32 %b) nounwind {
; op reg, imm
; For type i8 and i16, value is loaded from memory to avoid optimizing it to *.l
-define void @andib(i8* %a) nounwind {
+define void @andib(ptr %a) nounwind {
; CHECK-LABEL: andib:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l (4,%sp), %a0
@@ -125,13 +125,13 @@ define void @andib(i8* %a) nounwind {
; CHECK-NEXT: and.b #18, %d0
; CHECK-NEXT: move.b %d0, (%a0)
; CHECK-NEXT: rts
- %1 = load i8, i8* %a
+ %1 = load i8, ptr %a
%2 = and i8 %1, 18
- store i8 %2, i8* %a
+ store i8 %2, ptr %a
ret void
}
-define void @andiw(i16* %a) nounwind {
+define void @andiw(ptr %a) nounwind {
; CHECK-LABEL: andiw:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l (4,%sp), %a0
@@ -139,9 +139,9 @@ define void @andiw(i16* %a) nounwind {
; CHECK-NEXT: and.w #4660, %d0
; CHECK-NEXT: move.w %d0, (%a0)
; CHECK-NEXT: rts
- %1 = load i16, i16* %a
+ %1 = load i16, ptr %a
%2 = and i16 %1, 4660
- store i16 %2, i16* %a
+ store i16 %2, ptr %a
ret void
}
@@ -155,7 +155,7 @@ define i32 @andil(i32 %a) nounwind {
ret i32 %1
}
-define void @orib(i8* %a) nounwind {
+define void @orib(ptr %a) nounwind {
; CHECK-LABEL: orib:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l (4,%sp), %a0
@@ -163,13 +163,13 @@ define void @orib(i8* %a) nounwind {
; CHECK-NEXT: or.b #18, %d0
; CHECK-NEXT: move.b %d0, (%a0)
; CHECK-NEXT: rts
- %1 = load i8, i8* %a
+ %1 = load i8, ptr %a
%2 = or i8 %1, 18
- store i8 %2, i8* %a
+ store i8 %2, ptr %a
ret void
}
-define void @oriw(i16* %a) nounwind {
+define void @oriw(ptr %a) nounwind {
; CHECK-LABEL: oriw:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l (4,%sp), %a0
@@ -177,9 +177,9 @@ define void @oriw(i16* %a) nounwind {
; CHECK-NEXT: or.w #4660, %d0
; CHECK-NEXT: move.w %d0, (%a0)
; CHECK-NEXT: rts
- %1 = load i16, i16* %a
+ %1 = load i16, ptr %a
%2 = or i16 %1, 4660
- store i16 %2, i16* %a
+ store i16 %2, ptr %a
ret void
}
@@ -193,7 +193,7 @@ define i32 @oril(i32 %a) nounwind {
ret i32 %1
}
-define void @eorib(i8* %a) nounwind {
+define void @eorib(ptr %a) nounwind {
; CHECK-LABEL: eorib:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l (4,%sp), %a0
@@ -201,13 +201,13 @@ define void @eorib(i8* %a) nounwind {
; CHECK-NEXT: eori.b #18, %d0
; CHECK-NEXT: move.b %d0, (%a0)
; CHECK-NEXT: rts
- %1 = load i8, i8* %a
+ %1 = load i8, ptr %a
%2 = xor i8 %1, 18
- store i8 %2, i8* %a
+ store i8 %2, ptr %a
ret void
}
-define void @eoriw(i16* %a) nounwind {
+define void @eoriw(ptr %a) nounwind {
; CHECK-LABEL: eoriw:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l (4,%sp), %a0
@@ -215,9 +215,9 @@ define void @eoriw(i16* %a) nounwind {
; CHECK-NEXT: eori.w #4660, %d0
; CHECK-NEXT: move.w %d0, (%a0)
; CHECK-NEXT: rts
- %1 = load i16, i16* %a
+ %1 = load i16, ptr %a
%2 = xor i16 %1, 4660
- store i16 %2, i16* %a
+ store i16 %2, ptr %a
ret void
}
diff --git a/llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll b/llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
index b649b2ba16147..5bd4d5d48bc85 100644
--- a/llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
+++ b/llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
@@ -54,7 +54,7 @@ entry:
declare { i16, i1 } @llvm.smul.with.overflow.i16(i16, i16) nounwind readnone
-declare i32 @printf(i8*, ...) nounwind
+declare i32 @printf(ptr, ...) nounwind
declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
@ok = internal constant [4 x i8] c"%d\0A\00"
@@ -88,11 +88,11 @@ entry:
br i1 %obit, label %overflow, label %normal
normal:
- %t1 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ %t1 = tail call i32 (ptr, ...) @printf( ptr @ok, i32 %sum ) nounwind
ret i1 true
overflow:
- %t2 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @no, i32 0, i32 0) ) nounwind
+ %t2 = tail call i32 (ptr, ...) @printf( ptr @no ) nounwind
ret i1 false
}
@@ -126,11 +126,11 @@ entry:
br i1 %obit, label %overflow, label %normal
overflow:
- %t2 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @no, i32 0, i32 0) ) nounwind
+ %t2 = tail call i32 (ptr, ...) @printf( ptr @no ) nounwind
ret i1 false
normal:
- %t1 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ %t1 = tail call i32 (ptr, ...) @printf( ptr @ok, i32 %sum ) nounwind
ret i1 true
}
diff --git a/llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll b/llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll
index da6d78a492882..8d47c7ebf7e56 100644
--- a/llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll
+++ b/llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=m68k-linux -verify-machineinstrs | FileCheck %s
-declare i32 @printf(i8*, ...) nounwind
+declare i32 @printf(ptr, ...) nounwind
declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32)
declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32)
@@ -37,11 +37,11 @@ entry:
br i1 %obit, label %overflow, label %normal
normal:
- %t1 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ %t1 = tail call i32 (ptr, ...) @printf( ptr @ok, i32 %sum ) nounwind
ret i1 true
overflow:
- %t2 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @no, i32 0, i32 0) ) nounwind
+ %t2 = tail call i32 (ptr, ...) @printf( ptr @no ) nounwind
ret i1 false
}
@@ -74,11 +74,11 @@ entry:
br i1 %obit, label %carry, label %normal
normal:
- %t1 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+ %t1 = tail call i32 (ptr, ...) @printf( ptr @ok, i32 %sum ) nounwind
ret i1 true
carry:
- %t2 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @no, i32 0, i32 0) ) nounwind
+ %t2 = tail call i32 (ptr, ...) @printf( ptr @no ) nounwind
ret i1 false
}
diff --git a/llvm/test/CodeGen/M68k/Atomics/load-store.ll b/llvm/test/CodeGen/M68k/Atomics/load-store.ll
index 7608edb220d3c..b238172c2f12c 100644
--- a/llvm/test/CodeGen/M68k/Atomics/load-store.ll
+++ b/llvm/test/CodeGen/M68k/Atomics/load-store.ll
@@ -5,7 +5,7 @@
; RUN: llc %s -o - -mtriple=m68k -mcpu=M68030 | FileCheck %s --check-prefix=ATOMIC
; RUN: llc %s -o - -mtriple=m68k -mcpu=M68040 | FileCheck %s --check-prefix=ATOMIC
-define i8 @atomic_load_i8_unordered(i8 *%a) nounwind {
+define i8 @atomic_load_i8_unordered(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i8_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -17,11 +17,11 @@ define i8 @atomic_load_i8_unordered(i8 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i8, i8* %a unordered, align 1
+ %1 = load atomic i8, ptr %a unordered, align 1
ret i8 %1
}
-define i8 @atomic_load_i8_monotonic(i8 *%a) nounwind {
+define i8 @atomic_load_i8_monotonic(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i8_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -33,11 +33,11 @@ define i8 @atomic_load_i8_monotonic(i8 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i8, i8* %a monotonic, align 1
+ %1 = load atomic i8, ptr %a monotonic, align 1
ret i8 %1
}
-define i8 @atomic_load_i8_acquire(i8 *%a) nounwind {
+define i8 @atomic_load_i8_acquire(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i8_acquire:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -49,11 +49,11 @@ define i8 @atomic_load_i8_acquire(i8 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i8, i8* %a acquire, align 1
+ %1 = load atomic i8, ptr %a acquire, align 1
ret i8 %1
}
-define i8 @atomic_load_i8_seq_cst(i8 *%a) nounwind {
+define i8 @atomic_load_i8_seq_cst(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i8_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -65,11 +65,11 @@ define i8 @atomic_load_i8_seq_cst(i8 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i8, i8* %a seq_cst, align 1
+ %1 = load atomic i8, ptr %a seq_cst, align 1
ret i8 %1
}
-define i16 @atomic_load_i16_unordered(i16 *%a) nounwind {
+define i16 @atomic_load_i16_unordered(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i16_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -81,11 +81,11 @@ define i16 @atomic_load_i16_unordered(i16 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i16, i16* %a unordered, align 2
+ %1 = load atomic i16, ptr %a unordered, align 2
ret i16 %1
}
-define i16 @atomic_load_i16_monotonic(i16 *%a) nounwind {
+define i16 @atomic_load_i16_monotonic(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i16_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -97,11 +97,11 @@ define i16 @atomic_load_i16_monotonic(i16 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i16, i16* %a monotonic, align 2
+ %1 = load atomic i16, ptr %a monotonic, align 2
ret i16 %1
}
-define i16 @atomic_load_i16_acquire(i16 *%a) nounwind {
+define i16 @atomic_load_i16_acquire(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i16_acquire:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -113,11 +113,11 @@ define i16 @atomic_load_i16_acquire(i16 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i16, i16* %a acquire, align 2
+ %1 = load atomic i16, ptr %a acquire, align 2
ret i16 %1
}
-define i16 @atomic_load_i16_seq_cst(i16 *%a) nounwind {
+define i16 @atomic_load_i16_seq_cst(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i16_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -129,11 +129,11 @@ define i16 @atomic_load_i16_seq_cst(i16 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i16, i16* %a seq_cst, align 2
+ %1 = load atomic i16, ptr %a seq_cst, align 2
ret i16 %1
}
-define i32 @atomic_load_i32_unordered(i32 *%a) nounwind {
+define i32 @atomic_load_i32_unordered(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i32_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -145,11 +145,11 @@ define i32 @atomic_load_i32_unordered(i32 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i32, i32* %a unordered, align 4
+ %1 = load atomic i32, ptr %a unordered, align 4
ret i32 %1
}
-define i32 @atomic_load_i32_monotonic(i32 *%a) nounwind {
+define i32 @atomic_load_i32_monotonic(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i32_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -161,11 +161,11 @@ define i32 @atomic_load_i32_monotonic(i32 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i32, i32* %a monotonic, align 4
+ %1 = load atomic i32, ptr %a monotonic, align 4
ret i32 %1
}
-define i32 @atomic_load_i32_acquire(i32 *%a) nounwind {
+define i32 @atomic_load_i32_acquire(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i32_acquire:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -177,11 +177,11 @@ define i32 @atomic_load_i32_acquire(i32 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i32, i32* %a acquire, align 4
+ %1 = load atomic i32, ptr %a acquire, align 4
ret i32 %1
}
-define i32 @atomic_load_i32_seq_cst(i32 *%a) nounwind {
+define i32 @atomic_load_i32_seq_cst(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i32_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (4,%sp), %a0
@@ -193,11 +193,11 @@ define i32 @atomic_load_i32_seq_cst(i32 *%a) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l (%a0), %d0
; ATOMIC-NEXT: rts
- %1 = load atomic i32, i32* %a seq_cst, align 4
+ %1 = load atomic i32, ptr %a seq_cst, align 4
ret i32 %1
}
-define i64 @atomic_load_i64_unordered(i64 *%a) nounwind {
+define i64 @atomic_load_i64_unordered(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i64_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
@@ -215,11 +215,11 @@ define i64 @atomic_load_i64_unordered(i64 *%a) nounwind {
; ATOMIC-NEXT: jsr __atomic_load_8 at PLT
; ATOMIC-NEXT: adda.l #12, %sp
; ATOMIC-NEXT: rts
- %1 = load atomic i64, i64* %a unordered, align 8
+ %1 = load atomic i64, ptr %a unordered, align 8
ret i64 %1
}
-define i64 @atomic_load_i64_monotonic(i64 *%a) nounwind {
+define i64 @atomic_load_i64_monotonic(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i64_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
@@ -237,11 +237,11 @@ define i64 @atomic_load_i64_monotonic(i64 *%a) nounwind {
; ATOMIC-NEXT: jsr __atomic_load_8 at PLT
; ATOMIC-NEXT: adda.l #12, %sp
; ATOMIC-NEXT: rts
- %1 = load atomic i64, i64* %a monotonic, align 8
+ %1 = load atomic i64, ptr %a monotonic, align 8
ret i64 %1
}
-define i64 @atomic_load_i64_acquire(i64 *%a) nounwind {
+define i64 @atomic_load_i64_acquire(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i64_acquire:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
@@ -259,11 +259,11 @@ define i64 @atomic_load_i64_acquire(i64 *%a) nounwind {
; ATOMIC-NEXT: jsr __atomic_load_8 at PLT
; ATOMIC-NEXT: adda.l #12, %sp
; ATOMIC-NEXT: rts
- %1 = load atomic i64, i64* %a acquire, align 8
+ %1 = load atomic i64, ptr %a acquire, align 8
ret i64 %1
}
-define i64 @atomic_load_i64_seq_cst(i64 *%a) nounwind {
+define i64 @atomic_load_i64_seq_cst(ptr %a) nounwind {
; NO-ATOMIC-LABEL: atomic_load_i64_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
@@ -281,11 +281,11 @@ define i64 @atomic_load_i64_seq_cst(i64 *%a) nounwind {
; ATOMIC-NEXT: jsr __atomic_load_8 at PLT
; ATOMIC-NEXT: adda.l #12, %sp
; ATOMIC-NEXT: rts
- %1 = load atomic i64, i64* %a seq_cst, align 8
+ %1 = load atomic i64, ptr %a seq_cst, align 8
ret i64 %1
}
-define void @atomic_store_i8_unordered(i8 *%a, i8 %val) nounwind {
+define void @atomic_store_i8_unordered(ptr %a, i8 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i8_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.b (11,%sp), %d0
@@ -299,11 +299,11 @@ define void @atomic_store_i8_unordered(i8 *%a, i8 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i8 %val, i8* %a unordered, align 1
+ store atomic i8 %val, ptr %a unordered, align 1
ret void
}
-define void @atomic_store_i8_monotonic(i8 *%a, i8 %val) nounwind {
+define void @atomic_store_i8_monotonic(ptr %a, i8 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i8_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.b (11,%sp), %d0
@@ -317,11 +317,11 @@ define void @atomic_store_i8_monotonic(i8 *%a, i8 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i8 %val, i8* %a monotonic, align 1
+ store atomic i8 %val, ptr %a monotonic, align 1
ret void
}
-define void @atomic_store_i8_release(i8 *%a, i8 %val) nounwind {
+define void @atomic_store_i8_release(ptr %a, i8 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i8_release:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.b (11,%sp), %d0
@@ -335,11 +335,11 @@ define void @atomic_store_i8_release(i8 *%a, i8 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i8 %val, i8* %a release, align 1
+ store atomic i8 %val, ptr %a release, align 1
ret void
}
-define void @atomic_store_i8_seq_cst(i8 *%a, i8 %val) nounwind {
+define void @atomic_store_i8_seq_cst(ptr %a, i8 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i8_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.b (11,%sp), %d0
@@ -353,11 +353,11 @@ define void @atomic_store_i8_seq_cst(i8 *%a, i8 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.b %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i8 %val, i8* %a seq_cst, align 1
+ store atomic i8 %val, ptr %a seq_cst, align 1
ret void
}
-define void @atomic_store_i16_unordered(i16 *%a, i16 %val) nounwind {
+define void @atomic_store_i16_unordered(ptr %a, i16 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i16_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.w (10,%sp), %d0
@@ -371,11 +371,11 @@ define void @atomic_store_i16_unordered(i16 *%a, i16 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i16 %val, i16* %a unordered, align 2
+ store atomic i16 %val, ptr %a unordered, align 2
ret void
}
-define void @atomic_store_i16_monotonic(i16 *%a, i16 %val) nounwind {
+define void @atomic_store_i16_monotonic(ptr %a, i16 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i16_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.w (10,%sp), %d0
@@ -389,11 +389,11 @@ define void @atomic_store_i16_monotonic(i16 *%a, i16 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i16 %val, i16* %a monotonic, align 2
+ store atomic i16 %val, ptr %a monotonic, align 2
ret void
}
-define void @atomic_store_i16_release(i16 *%a, i16 %val) nounwind {
+define void @atomic_store_i16_release(ptr %a, i16 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i16_release:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.w (10,%sp), %d0
@@ -407,11 +407,11 @@ define void @atomic_store_i16_release(i16 *%a, i16 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i16 %val, i16* %a release, align 2
+ store atomic i16 %val, ptr %a release, align 2
ret void
}
-define void @atomic_store_i16_seq_cst(i16 *%a, i16 %val) nounwind {
+define void @atomic_store_i16_seq_cst(ptr %a, i16 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i16_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.w (10,%sp), %d0
@@ -425,11 +425,11 @@ define void @atomic_store_i16_seq_cst(i16 *%a, i16 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.w %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i16 %val, i16* %a seq_cst, align 2
+ store atomic i16 %val, ptr %a seq_cst, align 2
ret void
}
-define void @atomic_store_i32_unordered(i32 *%a, i32 %val) nounwind {
+define void @atomic_store_i32_unordered(ptr %a, i32 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i32_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (8,%sp), %d0
@@ -443,11 +443,11 @@ define void @atomic_store_i32_unordered(i32 *%a, i32 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i32 %val, i32* %a unordered, align 4
+ store atomic i32 %val, ptr %a unordered, align 4
ret void
}
-define void @atomic_store_i32_monotonic(i32 *%a, i32 %val) nounwind {
+define void @atomic_store_i32_monotonic(ptr %a, i32 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i32_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (8,%sp), %d0
@@ -461,11 +461,11 @@ define void @atomic_store_i32_monotonic(i32 *%a, i32 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i32 %val, i32* %a monotonic, align 4
+ store atomic i32 %val, ptr %a monotonic, align 4
ret void
}
-define void @atomic_store_i32_release(i32 *%a, i32 %val) nounwind {
+define void @atomic_store_i32_release(ptr %a, i32 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i32_release:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (8,%sp), %d0
@@ -479,11 +479,11 @@ define void @atomic_store_i32_release(i32 *%a, i32 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i32 %val, i32* %a release, align 4
+ store atomic i32 %val, ptr %a release, align 4
ret void
}
-define void @atomic_store_i32_seq_cst(i32 *%a, i32 %val) nounwind {
+define void @atomic_store_i32_seq_cst(ptr %a, i32 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i32_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: move.l (8,%sp), %d0
@@ -497,11 +497,11 @@ define void @atomic_store_i32_seq_cst(i32 *%a, i32 %val) nounwind {
; ATOMIC-NEXT: move.l (4,%sp), %a0
; ATOMIC-NEXT: move.l %d0, (%a0)
; ATOMIC-NEXT: rts
- store atomic i32 %val, i32* %a seq_cst, align 4
+ store atomic i32 %val, ptr %a seq_cst, align 4
ret void
}
-define void @atomic_store_i64_unordered(i64 *%a, i64 %val) nounwind {
+define void @atomic_store_i64_unordered(ptr %a, i64 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i64_unordered:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
@@ -523,11 +523,11 @@ define void @atomic_store_i64_unordered(i64 *%a, i64 %val) nounwind {
; ATOMIC-NEXT: jsr __atomic_store_8 at PLT
; ATOMIC-NEXT: adda.l #20, %sp
; ATOMIC-NEXT: rts
- store atomic i64 %val, i64* %a unordered, align 8
+ store atomic i64 %val, ptr %a unordered, align 8
ret void
}
-define void @atomic_store_i64_monotonic(i64 *%a, i64 %val) nounwind {
+define void @atomic_store_i64_monotonic(ptr %a, i64 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i64_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
@@ -549,11 +549,11 @@ define void @atomic_store_i64_monotonic(i64 *%a, i64 %val) nounwind {
; ATOMIC-NEXT: jsr __atomic_store_8 at PLT
; ATOMIC-NEXT: adda.l #20, %sp
; ATOMIC-NEXT: rts
- store atomic i64 %val, i64* %a monotonic, align 8
+ store atomic i64 %val, ptr %a monotonic, align 8
ret void
}
-define void @atomic_store_i64_release(i64 *%a, i64 %val) nounwind {
+define void @atomic_store_i64_release(ptr %a, i64 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i64_release:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
@@ -575,11 +575,11 @@ define void @atomic_store_i64_release(i64 *%a, i64 %val) nounwind {
; ATOMIC-NEXT: jsr __atomic_store_8 at PLT
; ATOMIC-NEXT: adda.l #20, %sp
; ATOMIC-NEXT: rts
- store atomic i64 %val, i64* %a release, align 8
+ store atomic i64 %val, ptr %a release, align 8
ret void
}
-define void @atomic_store_i64_seq_cst(i64 *%a, i64 %val) nounwind {
+define void @atomic_store_i64_seq_cst(ptr %a, i64 %val) nounwind {
; NO-ATOMIC-LABEL: atomic_store_i64_seq_cst:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
@@ -601,6 +601,6 @@ define void @atomic_store_i64_seq_cst(i64 *%a, i64 %val) nounwind {
; ATOMIC-NEXT: jsr __atomic_store_8 at PLT
; ATOMIC-NEXT: adda.l #20, %sp
; ATOMIC-NEXT: rts
- store atomic i64 %val, i64* %a seq_cst, align 8
+ store atomic i64 %val, ptr %a seq_cst, align 8
ret void
}
diff --git a/llvm/test/CodeGen/M68k/CConv/c-args-inreg.ll b/llvm/test/CodeGen/M68k/CConv/c-args-inreg.ll
index 5eee426462cfa..f0ccd8c09e535 100644
--- a/llvm/test/CodeGen/M68k/CConv/c-args-inreg.ll
+++ b/llvm/test/CodeGen/M68k/CConv/c-args-inreg.ll
@@ -4,18 +4,18 @@
;
; Pass first two arguments in registers %d0 and %d1
-define void @foo_inreg(i32* nocapture inreg %out, i32 inreg %in) nounwind {
+define void @foo_inreg(ptr nocapture inreg %out, i32 inreg %in) nounwind {
; CHECK-LABEL: foo_inreg:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l %d0, %a0
; CHECK-NEXT: move.l %d1, (%a0)
; CHECK-NEXT: rts
entry:
- store i32 %in, i32* %out, align 4
+ store i32 %in, ptr %out, align 4
ret void
}
-define void @bar_inreg(i32* nocapture inreg %pOut, i32* nocapture inreg %pIn) nounwind {
+define void @bar_inreg(ptr nocapture inreg %pOut, ptr nocapture inreg %pIn) nounwind {
; CHECK-LABEL: bar_inreg:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l %d1, %a0
@@ -23,7 +23,7 @@ define void @bar_inreg(i32* nocapture inreg %pOut, i32* nocapture inreg %pIn) no
; CHECK-NEXT: move.l (%a0), (%a1)
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* %pIn, align 4
- store i32 %0, i32* %pOut, align 4
+ %0 = load i32, ptr %pIn, align 4
+ store i32 %0, ptr %pOut, align 4
ret void
}
diff --git a/llvm/test/CodeGen/M68k/CConv/c-args.ll b/llvm/test/CodeGen/M68k/CConv/c-args.ll
index c5477e2812ca1..c7e356ef349b6 100644
--- a/llvm/test/CodeGen/M68k/CConv/c-args.ll
+++ b/llvm/test/CodeGen/M68k/CConv/c-args.ll
@@ -4,18 +4,18 @@
;
; C Call passes all arguments on stack ...
-define void @test1(i32* nocapture %out, i32 %in) nounwind {
+define void @test1(ptr nocapture %out, i32 %in) nounwind {
; CHECK-LABEL: test1:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l (4,%sp), %a0
; CHECK-NEXT: move.l (8,%sp), (%a0)
; CHECK-NEXT: rts
entry:
- store i32 %in, i32* %out, align 4
+ store i32 %in, ptr %out, align 4
ret void
}
-define void @test2(i32* nocapture %pOut, i32* nocapture %pIn) nounwind {
+define void @test2(ptr nocapture %pOut, ptr nocapture %pIn) nounwind {
; CHECK-LABEL: test2:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l (8,%sp), %a0
@@ -23,30 +23,30 @@ define void @test2(i32* nocapture %pOut, i32* nocapture %pIn) nounwind {
; CHECK-NEXT: move.l (%a0), (%a1)
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* %pIn, align 4
- store i32 %0, i32* %pOut, align 4
+ %0 = load i32, ptr %pIn, align 4
+ store i32 %0, ptr %pOut, align 4
ret void
}
-define void @test3(i8* nocapture %out, i8 %in) nounwind {
+define void @test3(ptr nocapture %out, i8 %in) nounwind {
; CHECK-LABEL: test3:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l (4,%sp), %a0
; CHECK-NEXT: move.b (11,%sp), (%a0)
; CHECK-NEXT: rts
entry:
- store i8 %in, i8* %out, align 1
+ store i8 %in, ptr %out, align 1
ret void
}
-define void @test4(i16* nocapture %out, i16 %in) nounwind {
+define void @test4(ptr nocapture %out, i16 %in) nounwind {
; CHECK-LABEL: test4:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l (4,%sp), %a0
; CHECK-NEXT: move.w (10,%sp), (%a0)
; CHECK-NEXT: rts
entry:
- store i16 %in, i16* %out, align 2
+ store i16 %in, ptr %out, align 2
ret void
}
diff --git a/llvm/test/CodeGen/M68k/CConv/fastcc-args.ll b/llvm/test/CodeGen/M68k/CConv/fastcc-args.ll
index 55c0b9f449e79..12ba97e261787 100644
--- a/llvm/test/CodeGen/M68k/CConv/fastcc-args.ll
+++ b/llvm/test/CodeGen/M68k/CConv/fastcc-args.ll
@@ -3,24 +3,24 @@
;
; C Call passes all arguments on stack ...
-define fastcc void @test1(i32* nocapture %out, i32 %in) nounwind {
+define fastcc void @test1(ptr nocapture %out, i32 %in) nounwind {
; CHECK-LABEL: test1:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l %d0, (%a0)
; CHECK-NEXT: rts
entry:
- store i32 %in, i32* %out, align 4
+ store i32 %in, ptr %out, align 4
ret void
}
-define fastcc void @test2(i32* nocapture %pOut, i32* nocapture %pIn) nounwind {
+define fastcc void @test2(ptr nocapture %pOut, ptr nocapture %pIn) nounwind {
; CHECK-LABEL: test2:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l (%a1), (%a0)
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* %pIn, align 4
- store i32 %0, i32* %pOut, align 4
+ %0 = load i32, ptr %pIn, align 4
+ store i32 %0, ptr %pOut, align 4
ret void
}
diff --git a/llvm/test/CodeGen/M68k/CConv/fastcc-call.ll b/llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
index 5931f76d70b19..4b0f8ed254a5e 100644
--- a/llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
+++ b/llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
@@ -44,8 +44,8 @@ define i32 @foo2() nounwind uwtable {
entry:
%a = alloca i32, align 4
%b = alloca i32, align 4
- call fastcc void @bar2(i32* %a, i32 2, i32* %b, i32 4) nounwind
+ call fastcc void @bar2(ptr %a, i32 2, ptr %b, i32 4) nounwind
ret i32 0
}
-declare fastcc void @bar2(i32* %a, i32 %b, i32* %c, i32 %d);
+declare fastcc void @bar2(ptr %a, i32 %b, ptr %c, i32 %d);
diff --git a/llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll b/llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll
index 2ab3115f87f50..407bbd48bc7f8 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll
@@ -3,7 +3,7 @@
; RUN: -code-model=medium -relocation-model=pic \
; RUN: | FileCheck %s
- at ptr = external global i32*
+ at ptr = external global ptr
@dst = external global i32
@src = external global i32
@@ -17,13 +17,13 @@ define void @test0() nounwind {
; CHECK-NEXT: move.l (%a1), (%a0)
; CHECK-NEXT: rts
entry:
- store i32* @dst, i32** @ptr
- %tmp.s = load i32, i32* @src
- store i32 %tmp.s, i32* @dst
+ store ptr @dst, ptr @ptr
+ %tmp.s = load i32, ptr @src
+ store i32 %tmp.s, ptr @dst
ret void
}
- at ptr2 = global i32* null
+ at ptr2 = global ptr null
@dst2 = global i32 0
@src2 = global i32 0
@@ -37,13 +37,13 @@ define void @test1() nounwind {
; CHECK-NEXT: move.l (%a1), (%a0)
; CHECK-NEXT: rts
entry:
- store i32* @dst2, i32** @ptr2
- %tmp.s = load i32, i32* @src2
- store i32 %tmp.s, i32* @dst2
+ store ptr @dst2, ptr @ptr2
+ %tmp.s = load i32, ptr @src2
+ store i32 %tmp.s, ptr @dst2
ret void
}
-declare i8* @malloc(i32)
+declare ptr @malloc(i32)
define void @test2() nounwind {
; CHECK-LABEL: test2:
@@ -54,12 +54,12 @@ define void @test2() nounwind {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %ptr = call i8* @malloc(i32 40)
+ %ptr = call ptr @malloc(i32 40)
ret void
}
- at pfoo = external global void(...)*
-declare void(...)* @afoo(...)
+ at pfoo = external global ptr
+declare ptr @afoo(...)
define void @test3() nounwind {
; CHECK-LABEL: test3:
@@ -72,9 +72,9 @@ define void @test3() nounwind {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %tmp = call void(...)*(...) @afoo()
- store void(...)* %tmp, void(...)** @pfoo
- %tmp1 = load void(...)*, void(...)** @pfoo
+ %tmp = call ptr(...) @afoo()
+ store ptr %tmp, ptr @pfoo
+ %tmp1 = load ptr, ptr @pfoo
call void(...) %tmp1()
ret void
}
@@ -93,7 +93,7 @@ entry:
ret void
}
- at ptr6 = internal global i32* null
+ at ptr6 = internal global ptr null
@dst6 = internal global i32 0
@src6 = internal global i32 0
@@ -110,9 +110,9 @@ define void @test5() nounwind {
; CHECK-NEXT: move.l (0,%a0,%d0), (0,%a0,%d1)
; CHECK-NEXT: rts
entry:
- store i32* @dst6, i32** @ptr6
- %tmp.s = load i32, i32* @src6
- store i32 %tmp.s, i32* @dst6
+ store ptr @dst6, ptr @ptr6
+ %tmp.s = load i32, ptr @src6
+ store i32 %tmp.s, ptr @dst6
ret void
}
diff --git a/llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll b/llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
index aca79f0017374..ce8f2d0a6ba76 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
@@ -14,7 +14,7 @@ define i32 @my_access_global_a() #0 {
; CHECK-NEXT: move.l (%a0), %d0
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* @a, align 4
+ %0 = load i32, ptr @a, align 4
ret i32 %0
}
@@ -29,7 +29,7 @@ define i32 @my_access_global_b() #0 {
; CHECK-NEXT: move.l (%a0), %d0
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* @b, align 4
+ %0 = load i32, ptr @b, align 4
ret i32 %0
}
@@ -45,7 +45,7 @@ define i32 @my_access_global_c() #0 {
; CHECK-NEXT: move.l (0,%a0,%d0), %d0
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* @c, align 4
+ %0 = load i32, ptr @c, align 4
ret i32 %0
}
@@ -60,7 +60,7 @@ define i32 @my_access_global_load_d() #0 {
; CHECK-NEXT: move.l (%a0), %d0
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* @d, align 4
+ %0 = load i32, ptr @d, align 4
ret i32 %0
}
@@ -74,12 +74,12 @@ define i32 @my_access_global_store_d() #0 {
; CHECK-NEXT: move.l #0, %d0
; CHECK-NEXT: rts
entry:
- store i32 2, i32* @d, align 4
+ store i32 2, ptr @d, align 4
ret i32 0
}
; External Linkage, function pointer access.
-declare i32 @access_fp(i32 ()*)
+declare i32 @access_fp(ptr)
declare i32 @foo()
define i32 @my_access_fp_foo() #0 {
@@ -93,7 +93,7 @@ define i32 @my_access_fp_foo() #0 {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %call = call i32 @access_fp(i32 ()* @foo)
+ %call = call i32 @access_fp(ptr @foo)
ret i32 %call
}
@@ -122,7 +122,7 @@ define i32 @my_access_fp_bar() #0 {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %call = call i32 @access_fp(i32 ()* @bar)
+ %call = call i32 @access_fp(ptr @bar)
ret i32 %call
}
diff --git a/llvm/test/CodeGen/M68k/CodeModel/medium-static.ll b/llvm/test/CodeGen/M68k/CodeModel/medium-static.ll
index 1a544a971d266..87d8380d6cc9c 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/medium-static.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/medium-static.ll
@@ -3,7 +3,7 @@
; RUN: -code-model=medium -relocation-model=static \
; RUN: | FileCheck %s
- at ptr = external global i32*
+ at ptr = external global ptr
@dst = external global i32
@src = external global i32
@@ -14,13 +14,13 @@ define void @test0() nounwind {
; CHECK-NEXT: move.l src, dst
; CHECK-NEXT: rts
entry:
- store i32* @dst, i32** @ptr
- %tmp.s = load i32, i32* @src
- store i32 %tmp.s, i32* @dst
+ store ptr @dst, ptr @ptr
+ %tmp.s = load i32, ptr @src
+ store i32 %tmp.s, ptr @dst
ret void
}
- at ptr2 = global i32* null
+ at ptr2 = global ptr null
@dst2 = global i32 0
@src2 = global i32 0
@@ -31,13 +31,13 @@ define void @test1() nounwind {
; CHECK-NEXT: move.l src2, dst2
; CHECK-NEXT: rts
entry:
- store i32* @dst2, i32** @ptr2
- %tmp.s = load i32, i32* @src2
- store i32 %tmp.s, i32* @dst2
+ store ptr @dst2, ptr @ptr2
+ %tmp.s = load i32, ptr @src2
+ store i32 %tmp.s, ptr @dst2
ret void
}
-declare i8* @malloc(i32)
+declare ptr @malloc(i32)
define void @test2() nounwind {
; CHECK-LABEL: test2:
@@ -48,12 +48,12 @@ define void @test2() nounwind {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %ptr = call i8* @malloc(i32 40)
+ %ptr = call ptr @malloc(i32 40)
ret void
}
- at pfoo = external global void(...)*
-declare void(...)* @afoo(...)
+ at pfoo = external global ptr
+declare ptr @afoo(...)
define void @test3() nounwind {
@@ -66,9 +66,9 @@ define void @test3() nounwind {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %tmp = call void(...)*(...) @afoo()
- store void(...)* %tmp, void(...)** @pfoo
- %tmp1 = load void(...)*, void(...)** @pfoo
+ %tmp = call ptr(...) @afoo()
+ store ptr %tmp, ptr @pfoo
+ %tmp1 = load ptr, ptr @pfoo
call void(...) %tmp1()
ret void
}
@@ -87,7 +87,7 @@ entry:
ret void
}
- at ptr6 = internal global i32* null
+ at ptr6 = internal global ptr null
@dst6 = internal global i32 0
@src6 = internal global i32 0
@@ -98,9 +98,9 @@ define void @test5() nounwind {
; CHECK-NEXT: move.l src6, dst6
; CHECK-NEXT: rts
entry:
- store i32* @dst6, i32** @ptr6
- %tmp.s = load i32, i32* @src6
- store i32 %tmp.s, i32* @dst6
+ store ptr @dst6, ptr @ptr6
+ %tmp.s = load i32, ptr @src6
+ store i32 %tmp.s, ptr @dst6
ret void
}
diff --git a/llvm/test/CodeGen/M68k/CodeModel/small-pic.ll b/llvm/test/CodeGen/M68k/CodeModel/small-pic.ll
index 1f39ec82db326..37115953e5be3 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/small-pic.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/small-pic.ll
@@ -3,7 +3,7 @@
; RUN: -code-model=small -relocation-model=pic \
; RUN: | FileCheck %s
- at ptr = external global i32*
+ at ptr = external global ptr
@dst = external global i32
@src = external global i32
@@ -17,13 +17,13 @@ define void @test0() nounwind {
; CHECK-NEXT: move.l (%a1), (%a0)
; CHECK-NEXT: rts
entry:
- store i32* @dst, i32** @ptr
- %tmp.s = load i32, i32* @src
- store i32 %tmp.s, i32* @dst
+ store ptr @dst, ptr @ptr
+ %tmp.s = load i32, ptr @src
+ store i32 %tmp.s, ptr @dst
ret void
}
- at ptr2 = global i32* null
+ at ptr2 = global ptr null
@dst2 = global i32 0
@src2 = global i32 0
@@ -37,13 +37,13 @@ define void @test1() nounwind {
; CHECK-NEXT: move.l (%a1), (%a0)
; CHECK-NEXT: rts
entry:
- store i32* @dst2, i32** @ptr2
- %tmp.s = load i32, i32* @src2
- store i32 %tmp.s, i32* @dst2
+ store ptr @dst2, ptr @ptr2
+ %tmp.s = load i32, ptr @src2
+ store i32 %tmp.s, ptr @dst2
ret void
}
-declare i8* @malloc(i32)
+declare ptr @malloc(i32)
define void @test2() nounwind {
; CHECK-LABEL: test2:
@@ -54,12 +54,12 @@ define void @test2() nounwind {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %ptr = call i8* @malloc(i32 40)
+ %ptr = call ptr @malloc(i32 40)
ret void
}
- at pfoo = external global void(...)*
-declare void(...)* @afoo(...)
+ at pfoo = external global ptr
+declare ptr @afoo(...)
define void @test3() nounwind {
; CHECK-LABEL: test3:
@@ -72,9 +72,9 @@ define void @test3() nounwind {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %tmp = call void(...)*(...) @afoo()
- store void(...)* %tmp, void(...)** @pfoo
- %tmp1 = load void(...)*, void(...)** @pfoo
+ %tmp = call ptr(...) @afoo()
+ store ptr %tmp, ptr @pfoo
+ %tmp1 = load ptr, ptr @pfoo
call void(...) %tmp1()
ret void
}
@@ -93,7 +93,7 @@ entry:
ret void
}
- at ptr6 = internal global i32* null
+ at ptr6 = internal global ptr null
@dst6 = internal global i32 0
@src6 = internal global i32 0
@@ -105,9 +105,9 @@ define void @test5() nounwind {
; CHECK-NEXT: move.l (src6,%pc), (dst6,%pc)
; CHECK-NEXT: rts
entry:
- store i32* @dst6, i32** @ptr6
- %tmp.s = load i32, i32* @src6
- store i32 %tmp.s, i32* @dst6
+ store ptr @dst6, ptr @ptr6
+ %tmp.s = load i32, ptr @src6
+ store i32 %tmp.s, ptr @dst6
ret void
}
diff --git a/llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll b/llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
index de6e1227e72a3..668f8a96ac6f9 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
@@ -14,7 +14,7 @@ define i32 @my_access_global_a() #0 {
; CHECK-NEXT: move.l (%a0), %d0
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* @a, align 4
+ %0 = load i32, ptr @a, align 4
ret i32 %0
}
@@ -29,7 +29,7 @@ define i32 @my_access_global_b() #0 {
; CHECK-NEXT: move.l (%a0), %d0
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* @b, align 4
+ %0 = load i32, ptr @b, align 4
ret i32 %0
}
@@ -43,7 +43,7 @@ define i32 @my_access_global_c() #0 {
; CHECK-NEXT: move.l (c,%pc), %d0
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* @c, align 4
+ %0 = load i32, ptr @c, align 4
ret i32 %0
}
@@ -58,7 +58,7 @@ define i32 @my_access_global_load_d() #0 {
; CHECK-NEXT: move.l (%a0), %d0
; CHECK-NEXT: rts
entry:
- %0 = load i32, i32* @d, align 4
+ %0 = load i32, ptr @d, align 4
ret i32 %0
}
@@ -72,12 +72,12 @@ define i32 @my_access_global_store_d() #0 {
; CHECK-NEXT: move.l #0, %d0
; CHECK-NEXT: rts
entry:
- store i32 2, i32* @d, align 4
+ store i32 2, ptr @d, align 4
ret i32 0
}
; External Linkage, function pointer access.
-declare i32 @access_fp(i32 ()*)
+declare i32 @access_fp(ptr)
declare i32 @foo()
define i32 @my_access_fp_foo() #0 {
@@ -91,7 +91,7 @@ define i32 @my_access_fp_foo() #0 {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %call = call i32 @access_fp(i32 ()* @foo)
+ %call = call i32 @access_fp(ptr @foo)
ret i32 %call
}
@@ -120,7 +120,7 @@ define i32 @my_access_fp_bar() #0 {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %call = call i32 @access_fp(i32 ()* @bar)
+ %call = call i32 @access_fp(ptr @bar)
ret i32 %call
}
diff --git a/llvm/test/CodeGen/M68k/CodeModel/small-static.ll b/llvm/test/CodeGen/M68k/CodeModel/small-static.ll
index 6ab9a7b61e441..d7fa5b0ea4e56 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/small-static.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/small-static.ll
@@ -3,7 +3,7 @@
; RUN: -code-model=small -relocation-model=static \
; RUN: | FileCheck %s
- at ptr = external global i32*
+ at ptr = external global ptr
@dst = external global i32
@src = external global i32
@@ -15,13 +15,13 @@ define void @test0() nounwind {
; CHECK-NEXT: move.l (src,%pc), (dst,%pc)
; CHECK-NEXT: rts
entry:
- store i32* @dst, i32** @ptr
- %tmp.s = load i32, i32* @src
- store i32 %tmp.s, i32* @dst
+ store ptr @dst, ptr @ptr
+ %tmp.s = load i32, ptr @src
+ store i32 %tmp.s, ptr @dst
ret void
}
- at ptr2 = global i32* null
+ at ptr2 = global ptr null
@dst2 = global i32 0
@src2 = global i32 0
@@ -33,13 +33,13 @@ define void @test1() nounwind {
; CHECK-NEXT: move.l (src2,%pc), (dst2,%pc)
; CHECK-NEXT: rts
entry:
- store i32* @dst2, i32** @ptr2
- %tmp.s = load i32, i32* @src2
- store i32 %tmp.s, i32* @dst2
+ store ptr @dst2, ptr @ptr2
+ %tmp.s = load i32, ptr @src2
+ store i32 %tmp.s, ptr @dst2
ret void
}
-declare i8* @malloc(i32)
+declare ptr @malloc(i32)
define void @test2() nounwind {
; CHECK-LABEL: test2:
@@ -50,12 +50,12 @@ define void @test2() nounwind {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %ptr = call i8* @malloc(i32 40)
+ %ptr = call ptr @malloc(i32 40)
ret void
}
- at pfoo = external global void(...)*
-declare void(...)* @afoo(...)
+ at pfoo = external global ptr
+declare ptr @afoo(...)
define void @test3() nounwind {
; CHECK-LABEL: test3:
@@ -67,9 +67,9 @@ define void @test3() nounwind {
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
- %tmp = call void(...)*(...) @afoo()
- store void(...)* %tmp, void(...)** @pfoo
- %tmp1 = load void(...)*, void(...)** @pfoo
+ %tmp = call ptr(...) @afoo()
+ store ptr %tmp, ptr @pfoo
+ %tmp1 = load ptr, ptr @pfoo
call void(...) %tmp1()
ret void
}
@@ -88,7 +88,7 @@ entry:
ret void
}
- at ptr6 = internal global i32* null
+ at ptr6 = internal global ptr null
@dst6 = internal global i32 0
@src6 = internal global i32 0
@@ -100,9 +100,9 @@ define void @test5() nounwind {
; CHECK-NEXT: move.l (src6,%pc), (dst6,%pc)
; CHECK-NEXT: rts
entry:
- store i32* @dst6, i32** @ptr6
- %tmp.s = load i32, i32* @src6
- store i32 %tmp.s, i32* @dst6
+ store ptr @dst6, ptr @ptr6
+ %tmp.s = load i32, ptr @src6
+ store i32 %tmp.s, ptr @dst6
ret void
}
diff --git a/llvm/test/CodeGen/M68k/Control/cmp.ll b/llvm/test/CodeGen/M68k/Control/cmp.ll
index aa20461a8d651..634c08760a4e0 100644
--- a/llvm/test/CodeGen/M68k/Control/cmp.ll
+++ b/llvm/test/CodeGen/M68k/Control/cmp.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=m68k -verify-machineinstrs | FileCheck %s
-define i32 @test1(i32* %y) nounwind {
+define i32 @test1(ptr %y) nounwind {
; CHECK-LABEL: test1:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l (4,%sp), %a0
@@ -13,7 +13,7 @@ define i32 @test1(i32* %y) nounwind {
; CHECK-NEXT: .LBB0_2: ; %cond_true
; CHECK-NEXT: move.l #1, %d0
; CHECK-NEXT: rts
- %tmp = load i32, i32* %y ; <i32> [#uses=1]
+ %tmp = load i32, ptr %y ; <i32> [#uses=1]
%tmp.upgrd.1 = icmp eq i32 %tmp, 0 ; <i1> [#uses=1]
br i1 %tmp.upgrd.1, label %cond_true, label %cond_false
@@ -24,7 +24,7 @@ cond_true: ; preds = %0
ret i32 1
}
-define i32 @test2(i32* %y) nounwind {
+define i32 @test2(ptr %y) nounwind {
; CHECK-LABEL: test2:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l (4,%sp), %a0
@@ -38,7 +38,7 @@ define i32 @test2(i32* %y) nounwind {
; CHECK-NEXT: .LBB1_2: ; %cond_true
; CHECK-NEXT: move.l #1, %d0
; CHECK-NEXT: rts
- %tmp = load i32, i32* %y ; <i32> [#uses=1]
+ %tmp = load i32, ptr %y ; <i32> [#uses=1]
%tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1]
%tmp1.upgrd.2 = icmp eq i32 %tmp1, 0 ; <i1> [#uses=1]
br i1 %tmp1.upgrd.2, label %cond_true, label %cond_false
@@ -50,7 +50,7 @@ cond_true: ; preds = %0
ret i32 1
}
-define i8 @test2b(i8* %y) nounwind {
+define i8 @test2b(ptr %y) nounwind {
; CHECK-LABEL: test2b:
; CHECK: ; %bb.0:
; CHECK-NEXT: move.l (4,%sp), %a0
@@ -64,7 +64,7 @@ define i8 @test2b(i8* %y) nounwind {
; CHECK-NEXT: .LBB2_2: ; %cond_true
; CHECK-NEXT: move.b #1, %d0
; CHECK-NEXT: rts
- %tmp = load i8, i8* %y ; <i8> [#uses=1]
+ %tmp = load i8, ptr %y ; <i8> [#uses=1]
%tmp1 = shl i8 %tmp, 3 ; <i8> [#uses=1]
%tmp1.upgrd.2 = icmp eq i8 %tmp1, 0 ; <i1> [#uses=1]
br i1 %tmp1.upgrd.2, label %cond_true, label %cond_false
@@ -127,8 +127,8 @@ define i32 @test6() nounwind align 2 {
; CHECK-NEXT: adda.l #20, %sp
; CHECK-NEXT: rts
%A = alloca {i64, i64}, align 8
- %B = getelementptr inbounds {i64, i64}, {i64, i64}* %A, i64 0, i32 1
- %C = load i64, i64* %B
+ %B = getelementptr inbounds {i64, i64}, ptr %A, i64 0, i32 1
+ %C = load i64, ptr %B
%D = icmp eq i64 %C, 0
br i1 %D, label %T, label %F
T:
@@ -282,7 +282,7 @@ define i8 @test18(i64 %L) {
@d = global i8 0, align 1
-define void @test20(i32 %bf.load, i8 %x1, i8* %b_addr) {
+define void @test20(i32 %bf.load, i8 %x1, ptr %b_addr) {
; CHECK-LABEL: test20:
; CHECK: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
@@ -312,9 +312,9 @@ define void @test20(i32 %bf.load, i8 %x1, i8* %b_addr) {
%add = add nuw nsw i32 %conv, %conv6
%tobool7 = icmp ne i32 %add, 0
%frombool = zext i1 %tobool7 to i8
- store i8 %frombool, i8* %b_addr, align 1
+ store i8 %frombool, ptr %b_addr, align 1
%tobool14 = icmp ne i32 %bf.shl, 0
%frombool15 = zext i1 %tobool14 to i8
- store i8 %frombool15, i8* @d, align 1
+ store i8 %frombool15, ptr @d, align 1
ret void
}
diff --git a/llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll b/llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
index f4ff2582fbb17..b4ecbd5c62825 100644
--- a/llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
+++ b/llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
@@ -57,8 +57,8 @@ define i8 @test_ret_i8() nounwind {
ret i8 %1
}
-declare void @sret_callee(%struct.A* sret(%struct.A))
-define void @test_sret(%struct.A* sret(%struct.A) %0) nounwind {
+declare void @sret_callee(ptr sret(%struct.A))
+define void @test_sret(ptr sret(%struct.A) %0) nounwind {
; CHECK-LABEL: name: test_sret
; CHECK: bb.1 (%ir-block.1):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
@@ -71,7 +71,7 @@ define void @test_sret(%struct.A* sret(%struct.A) %0) nounwind {
; CHECK-NEXT: CALLb @sret_callee, csr_std, implicit $sp
; CHECK-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $sp, implicit-def $ccr, implicit $sp
; CHECK-NEXT: RTS
- call void @sret_callee(%struct.A* sret(%struct.A) %0)
+ call void @sret_callee(ptr sret(%struct.A) %0)
ret void
}
@@ -105,7 +105,7 @@ define void @test_arg_i32_i16_i8() nounwind {
}
declare void @arg_struct_callee(%struct.A)
-define void @test_arg_struct(%struct.A *%0) nounwind {
+define void @test_arg_struct(ptr %0) nounwind {
; CHECK-LABEL: name: test_arg_struct
; CHECK: bb.1 (%ir-block.1):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
@@ -135,13 +135,13 @@ define void @test_arg_struct(%struct.A *%0) nounwind {
; CHECK-NEXT: CALLb @arg_struct_callee, csr_std, implicit $sp
; CHECK-NEXT: ADJCALLSTACKUP 12, 0, implicit-def $sp, implicit-def $ccr, implicit $sp
; CHECK-NEXT: RTS
- %2 = load %struct.A, %struct.A* %0
+ %2 = load %struct.A, ptr %0
call void @arg_struct_callee(%struct.A %2)
ret void
}
declare void @arg_array_callee([8 x i8])
-define void @test_arg_array([8 x i8] *%0) nounwind {
+define void @test_arg_array(ptr %0) nounwind {
; CHECK-LABEL: name: test_arg_array
; CHECK: bb.1 (%ir-block.1):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
@@ -212,13 +212,13 @@ define void @test_arg_array([8 x i8] *%0) nounwind {
; CHECK-NEXT: CALLb @arg_array_callee, csr_std, implicit $sp
; CHECK-NEXT: ADJCALLSTACKUP 32, 0, implicit-def $sp, implicit-def $ccr, implicit $sp
; CHECK-NEXT: RTS
- %2 = load [8 x i8], [8 x i8]* %0
+ %2 = load [8 x i8], ptr %0
call void @arg_array_callee([8 x i8] %2)
ret void
}
-declare void @arg_pass_struct_by_ptr_callee(%struct.A*)
-define void @test_arg_pass_struct_by_ptr(%struct.A *%0) nounwind {
+declare void @arg_pass_struct_by_ptr_callee(ptr)
+define void @test_arg_pass_struct_by_ptr(ptr %0) nounwind {
; CHECK-LABEL: name: test_arg_pass_struct_by_ptr
; CHECK: bb.1 (%ir-block.1):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
@@ -231,12 +231,12 @@ define void @test_arg_pass_struct_by_ptr(%struct.A *%0) nounwind {
; CHECK-NEXT: CALLb @arg_pass_struct_by_ptr_callee, csr_std, implicit $sp
; CHECK-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $sp, implicit-def $ccr, implicit $sp
; CHECK-NEXT: RTS
- call void @arg_pass_struct_by_ptr_callee(%struct.A *%0)
+ call void @arg_pass_struct_by_ptr_callee(ptr %0)
ret void
}
-declare void @arg_pass_integer_byval_callee(i32* byval(i32), i16* byval(i16), i8* byval(i8))
-define void @test_arg_pass_integer_byval(i32 *%0, i16 *%1, i8 *%2) nounwind {
+declare void @arg_pass_integer_byval_callee(ptr byval(i32), ptr byval(i16), ptr byval(i8))
+define void @test_arg_pass_integer_byval(ptr %0, ptr %1, ptr %2) nounwind {
; CHECK-LABEL: name: test_arg_pass_integer_byval
; CHECK: bb.1 (%ir-block.3):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.2
@@ -264,12 +264,12 @@ define void @test_arg_pass_integer_byval(i32 *%0, i16 *%1, i8 *%2) nounwind {
; CHECK-NEXT: CALLb @arg_pass_integer_byval_callee, csr_std, implicit $sp
; CHECK-NEXT: ADJCALLSTACKUP 12, 0, implicit-def $sp, implicit-def $ccr, implicit $sp
; CHECK-NEXT: RTS
- call void @arg_pass_integer_byval_callee(i32* byval(i32) %0, i16* byval(i16) %1, i8* byval(i8) %2)
+ call void @arg_pass_integer_byval_callee(ptr byval(i32) %0, ptr byval(i16) %1, ptr byval(i8) %2)
ret void
}
-declare void @arg_pass_struct_byval_callee(%struct.A* byval(%struct.A))
-define void @test_arg_pass_struct_byval(%struct.A *%0) nounwind {
+declare void @arg_pass_struct_byval_callee(ptr byval(%struct.A))
+define void @test_arg_pass_struct_byval(ptr %0) nounwind {
; CHECK-LABEL: name: test_arg_pass_struct_byval
; CHECK: bb.1 (%ir-block.1):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
@@ -283,12 +283,12 @@ define void @test_arg_pass_struct_byval(%struct.A *%0) nounwind {
; CHECK-NEXT: CALLb @arg_pass_struct_byval_callee, csr_std, implicit $sp
; CHECK-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $sp, implicit-def $ccr, implicit $sp
; CHECK-NEXT: RTS
- call void @arg_pass_struct_byval_callee(%struct.A* byval(%struct.A) %0)
+ call void @arg_pass_struct_byval_callee(ptr byval(%struct.A) %0)
ret void
}
-declare void @arg_pass_array_byval_callee([32 x i8]* byval([32 x i8]))
-define void @test_arg_pass_array_byval([32 x i8] *%0) nounwind {
+declare void @arg_pass_array_byval_callee(ptr byval([32 x i8]))
+define void @test_arg_pass_array_byval(ptr %0) nounwind {
; CHECK-LABEL: name: test_arg_pass_array_byval
; CHECK: bb.1 (%ir-block.1):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
@@ -302,11 +302,11 @@ define void @test_arg_pass_array_byval([32 x i8] *%0) nounwind {
; CHECK-NEXT: CALLb @arg_pass_array_byval_callee, csr_std, implicit $sp
; CHECK-NEXT: ADJCALLSTACKUP 32, 0, implicit-def $sp, implicit-def $ccr, implicit $sp
; CHECK-NEXT: RTS
- call void @arg_pass_array_byval_callee([32 x i8]* byval([32 x i8]) %0)
+ call void @arg_pass_array_byval_callee(ptr byval([32 x i8]) %0)
ret void
}
-define void @test_indirect_call(void() *%fptr) nounwind {
+define void @test_indirect_call(ptr %fptr) nounwind {
; CHECK-LABEL: name: test_indirect_call
; CHECK: bb.1 (%ir-block.0):
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
diff --git a/llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll b/llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
index 1dd2585991354..0504792c3fceb 100644
--- a/llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
+++ b/llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
@@ -140,7 +140,7 @@ define void @test_arg_lowering_multiple(i1 %a, i8 %b, i16 %c, i32 %d, i64 %e, i1
ret void
}
-define void @test_arg_lowering_ptr(i32* %x) {
+define void @test_arg_lowering_ptr(ptr %x) {
; CHECK-LABEL: name: test_arg_lowering_ptr
; CHECK: bb.1 (%ir-block.0):
; CHECK: [[G_F_I1:%[0-9]+]]:_(p0) = G_FRAME_INDEX
@@ -149,7 +149,7 @@ define void @test_arg_lowering_ptr(i32* %x) {
ret void
}
-define void @test_arg_lowering_float_ptr(float* %x) {
+define void @test_arg_lowering_float_ptr(ptr %x) {
; CHECK-LABEL: name: test_arg_lowering_float_ptr
; CHECK: bb.1 (%ir-block.0):
; CHECK: [[G_F_I1:%[0-9]+]]:_(p0) = G_FRAME_INDEX
diff --git a/llvm/test/CodeGen/M68k/inline-asm.ll b/llvm/test/CodeGen/M68k/inline-asm.ll
index 72cdfb78e82d3..dda943920788d 100644
--- a/llvm/test/CodeGen/M68k/inline-asm.ll
+++ b/llvm/test/CodeGen/M68k/inline-asm.ll
@@ -114,11 +114,11 @@ define void @register_constraints() {
entry:
%out = alloca i32, align 4
%0 = call i32 asm sideeffect "move.l #94, $0", "=r"()
- store i32 %0, i32* %out, align 4
+ store i32 %0, ptr %out, align 4
%1 = call i32 asm sideeffect "move.l #87, $0", "=d"()
- store i32 %1, i32* %out, align 4
+ store i32 %1, ptr %out, align 4
%2 = call i32 asm sideeffect "move.l #66, $0", "=a"()
- store i32 %2, i32* %out, align 4
+ store i32 %2, ptr %out, align 4
ret void
}
diff --git a/llvm/test/CodeGen/M68k/link-unlnk.ll b/llvm/test/CodeGen/M68k/link-unlnk.ll
index 530f01b56998f..dfdd80e66ade7 100644
--- a/llvm/test/CodeGen/M68k/link-unlnk.ll
+++ b/llvm/test/CodeGen/M68k/link-unlnk.ll
@@ -59,8 +59,8 @@ entry:
%arr = alloca [8 x i32], align 4
%s0 = getelementptr i32, ptr %arr, i32 0
%s1 = getelementptr i32, ptr %arr, i32 1
- store i32 %a, i32* %s0
- store i32 %b, i32* %s1
+ store i32 %a, ptr %s0
+ store i32 %b, ptr %s1
%ptr0 = getelementptr i32, ptr %arr, i32 0
%ptr1 = getelementptr i32, ptr %arr, i32 1
@@ -71,26 +71,26 @@ entry:
%ptr6 = getelementptr i32, ptr %arr, i32 6
%ptr7 = getelementptr i32, ptr %arr, i32 7
- %res0 = load i32, i32 * %ptr0
- %res1 = load i32, i32 * %ptr1
+ %res0 = load i32, ptr %ptr0
+ %res1 = load i32, ptr %ptr1
%res2 = add i32 %res0, %res1
- store i32 %res2, i32 * %ptr2
+ store i32 %res2, ptr %ptr2
%res3 = add i32 %res1, %res2
- store i32 %res3, i32 * %ptr3
+ store i32 %res3, ptr %ptr3
%res4 = add i32 %res2, %res3
- store i32 %res4, i32 * %ptr4
+ store i32 %res4, ptr %ptr4
%res5 = add i32 %res3, %res4
- store i32 %res5, i32 * %ptr5
+ store i32 %res5, ptr %ptr5
%res6 = add i32 %res4, %res5
- store i32 %res6, i32 * %ptr6
+ store i32 %res6, ptr %ptr6
%res7 = add i32 %res5, %res6
- store i32 %res7, i32 * %ptr7
+ store i32 %res7, ptr %ptr7
ret i32 %res7
}
@@ -122,8 +122,8 @@ define i32 @test_gep() {
entry:
%arr = alloca [8 x [8 x i32]]
%ptr1 = getelementptr [8 x i32], ptr %arr, i64 0, i64 0
- store i32 12, i32 * %ptr1
+ store i32 12, ptr %ptr1
%ptr2 = getelementptr [8 x i32], ptr %arr, i64 7, i64 7
- store i32 21, i32 * %ptr2
+ store i32 21, ptr %ptr2
ret i32 0
}
diff --git a/llvm/test/CodeGen/M68k/reserved-regs.ll b/llvm/test/CodeGen/M68k/reserved-regs.ll
index 04acaf6797925..553e6c8faaed2 100644
--- a/llvm/test/CodeGen/M68k/reserved-regs.ll
+++ b/llvm/test/CodeGen/M68k/reserved-regs.ll
@@ -26,27 +26,27 @@
; Which is copied from `test/CodeGen/RISCV/reserved-regs.ll`.
; But currently we have problem doing codegen for the above snippet
; (https://bugs.llvm.org/show_bug.cgi?id=50377).
-define void @foo(i32* nocapture readonly %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32* nocapture readonly %d,
- i32* nocapture readonly %a1, i32* nocapture readonly %b1, i32* nocapture readonly %c1, i32* nocapture readonly %d1,
- i32* nocapture readonly %a2, i32* nocapture readonly %b2, i32* nocapture readonly %c2, i32* nocapture readonly %d2,
- i32* nocapture readonly %a3, i32* nocapture readonly %b3, i32* nocapture readonly %c3, i32* nocapture readonly %d3) {
+define void @foo(ptr nocapture readonly %a, ptr nocapture readonly %b, ptr nocapture readonly %c, ptr nocapture readonly %d,
+ ptr nocapture readonly %a1, ptr nocapture readonly %b1, ptr nocapture readonly %c1, ptr nocapture readonly %d1,
+ ptr nocapture readonly %a2, ptr nocapture readonly %b2, ptr nocapture readonly %c2, ptr nocapture readonly %d2,
+ ptr nocapture readonly %a3, ptr nocapture readonly %b3, ptr nocapture readonly %c3, ptr nocapture readonly %d3) {
entry:
- %0 = load i32, i32* %a, align 4
- %1 = load i32, i32* %b, align 4
- %2 = load i32, i32* %c, align 4
- %3 = load i32, i32* %d, align 4
- %4 = load i32, i32* %a1, align 4
- %5 = load i32, i32* %b1, align 4
- %6 = load i32, i32* %c1, align 4
- %7 = load i32, i32* %d1, align 4
- %8 = load i32, i32* %a2, align 4
- %9 = load i32, i32* %b2, align 4
- %10 = load i32, i32* %c2, align 4
- %11 = load i32, i32* %d2, align 4
- %12 = load i32, i32* %a3, align 4
- %13 = load i32, i32* %b3, align 4
- %14 = load i32, i32* %c3, align 4
- %15 = load i32, i32* %d3, align 4
+ %0 = load i32, ptr %a, align 4
+ %1 = load i32, ptr %b, align 4
+ %2 = load i32, ptr %c, align 4
+ %3 = load i32, ptr %d, align 4
+ %4 = load i32, ptr %a1, align 4
+ %5 = load i32, ptr %b1, align 4
+ %6 = load i32, ptr %c1, align 4
+ %7 = load i32, ptr %d1, align 4
+ %8 = load i32, ptr %a2, align 4
+ %9 = load i32, ptr %b2, align 4
+ %10 = load i32, ptr %c2, align 4
+ %11 = load i32, ptr %d2, align 4
+ %12 = load i32, ptr %a3, align 4
+ %13 = load i32, ptr %b3, align 4
+ %14 = load i32, ptr %c3, align 4
+ %15 = load i32, ptr %d3, align 4
; A0-NOT: %a0
; A1-NOT: %a1
; A2-NOT: %a2
diff --git a/llvm/test/CodeGen/M68k/varargs.ll b/llvm/test/CodeGen/M68k/varargs.ll
index c04bfdd404779..dae72edc6a348 100644
--- a/llvm/test/CodeGen/M68k/varargs.ll
+++ b/llvm/test/CodeGen/M68k/varargs.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=m68k-linux -verify-machineinstrs | FileCheck %s
-%struct.va_list = type { i8* }
+%struct.va_list = type { ptr }
define i32 @test(i32 %X, ...) {
; Initialize variable argument processing
@@ -19,23 +19,23 @@ define i32 @test(i32 %X, ...) {
; CHECK-NEXT: adda.l #8, %sp
; CHECK-NEXT: rts
%ap = alloca %struct.va_list
- %ap2 = bitcast %struct.va_list* %ap to i8*
- call void @llvm.va_start(i8* %ap2)
+ %ap2 = bitcast ptr %ap to ptr
+ call void @llvm.va_start(ptr %ap2)
; Read a single integer argument
- %tmp = va_arg i8* %ap2, i32
+ %tmp = va_arg ptr %ap2, i32
; Demonstrate usage of llvm.va_copy and llvm.va_end
- %aq = alloca i8*
- %aq2 = bitcast i8** %aq to i8*
- call void @llvm.va_copy(i8* %aq2, i8* %ap2)
- call void @llvm.va_end(i8* %aq2)
+ %aq = alloca ptr
+ %aq2 = bitcast ptr %aq to ptr
+ call void @llvm.va_copy(ptr %aq2, ptr %ap2)
+ call void @llvm.va_end(ptr %aq2)
; Stop processing of arguments.
- call void @llvm.va_end(i8* %ap2)
+ call void @llvm.va_end(ptr %ap2)
ret i32 %tmp
}
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_copy(i8*, i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start(ptr)
+declare void @llvm.va_copy(ptr, ptr)
+declare void @llvm.va_end(ptr)
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