[llvm] [InstCombine] Resolve TODO: nnan nsz X / -0.0 -> copysign(inf, X) (PR #79766)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 6 12:06:45 PST 2024
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/79766
>From 996d50b9760abd2c88233a78a514ff78093f653f Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Sun, 28 Jan 2024 15:04:34 -0500
Subject: [PATCH 1/2] [InstCombine] pre-commit tests (NFC)
---
llvm/test/Transforms/InstCombine/fdiv.ll | 72 ++++++++++++++++++++++++
1 file changed, 72 insertions(+)
diff --git a/llvm/test/Transforms/InstCombine/fdiv.ll b/llvm/test/Transforms/InstCombine/fdiv.ll
index c81a9ba6d4215..c6a78e13b2445 100644
--- a/llvm/test/Transforms/InstCombine/fdiv.ll
+++ b/llvm/test/Transforms/InstCombine/fdiv.ll
@@ -992,3 +992,75 @@ define float @fdiv_nnan_neg_zero_f32(float %x) {
%fdiv = fdiv nnan float %x, -0.0
ret float %fdiv
}
+
+define double @test_positive_zero_nsz(double %X) {
+; CHECK-LABEL: @test_positive_zero_nsz(
+; CHECK-NEXT: [[TMP1:%.*]] = call nnan nsz double @llvm.copysign.f64(double 0x7FF0000000000000, double [[X:%.*]])
+; CHECK-NEXT: ret double [[TMP1]]
+;
+ %1 = fdiv nnan nsz double %X, 0.0
+ ret double %1
+}
+
+define double @test_negative_zero_nsz(double %X) {
+; CHECK-LABEL: @test_negative_zero_nsz(
+; CHECK-NEXT: [[TMP1:%.*]] = fdiv nnan nsz double [[X:%.*]], -0.000000e+00
+; CHECK-NEXT: ret double [[TMP1]]
+;
+ %1 = fdiv nnan nsz double %X, -0.0
+ ret double %1
+}
+
+define double @test_positive_zero(double %X) {
+; CHECK-LABEL: @test_positive_zero(
+; CHECK-NEXT: [[TMP1:%.*]] = call nnan double @llvm.copysign.f64(double 0x7FF0000000000000, double [[X:%.*]])
+; CHECK-NEXT: ret double [[TMP1]]
+;
+ %1 = fdiv nnan double %X, 0.0
+ ret double %1
+}
+
+define double @test_negative_zero(double %X) {
+; CHECK-LABEL: @test_negative_zero(
+; CHECK-NEXT: [[TMP1:%.*]] = fdiv nnan double [[X:%.*]], -0.000000e+00
+; CHECK-NEXT: ret double [[TMP1]]
+;
+ %1 = fdiv nnan double %X, -0.0
+ ret double %1
+}
+
+define <2 x double> @test_positive_zero_vector_nsz(<2 x double> %X) {
+; CHECK-LABEL: @test_positive_zero_vector_nsz(
+; CHECK-NEXT: [[TMP1:%.*]] = call nnan nsz <2 x double> @llvm.copysign.v2f64(<2 x double> <double 0x7FF0000000000000, double 0x7FF0000000000000>, <2 x double> [[X:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = fdiv nnan nsz <2 x double> %X, <double 0.0, double 0.0>
+ ret <2 x double> %1
+}
+
+define <2 x double> @test_negative_zero_vector_nsz(<2 x double> %X) {
+; CHECK-LABEL: @test_negative_zero_vector_nsz(
+; CHECK-NEXT: [[TMP1:%.*]] = fdiv nnan nsz <2 x double> [[X:%.*]], <double -0.000000e+00, double 0.000000e+00>
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = fdiv nnan nsz <2 x double> %X, <double -0.0, double 0.0>
+ ret <2 x double> %1
+}
+
+define <2 x double> @test_positive_zero_vector(<2 x double> %X) {
+; CHECK-LABEL: @test_positive_zero_vector(
+; CHECK-NEXT: [[TMP1:%.*]] = call nnan <2 x double> @llvm.copysign.v2f64(<2 x double> <double 0x7FF0000000000000, double 0x7FF0000000000000>, <2 x double> [[X:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = fdiv nnan <2 x double> %X, <double 0.0, double 0.0>
+ ret <2 x double> %1
+}
+
+define <2 x double> @test_negative_zero_vector(<2 x double> %X) {
+; CHECK-LABEL: @test_negative_zero_vector(
+; CHECK-NEXT: [[TMP1:%.*]] = fdiv nnan <2 x double> [[X:%.*]], <double -0.000000e+00, double 0.000000e+00>
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = fdiv nnan <2 x double> %X, <double -0.0, double 0.0>
+ ret <2 x double> %1
+}
>From 874b7a498d054acdb5a7746bafc2ceea69d9cd51 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Sun, 28 Jan 2024 13:30:29 -0500
Subject: [PATCH 2/2] [InstCombine] Resolve TODO: nnan nsz X / -0.0 ->
copysign(inf, X)
---
.../InstCombine/InstCombineMulDivRem.cpp | 6 ++-
.../aix-small-local-exec-tls-largeaccess.ll | 2 +-
.../aix-small-local-exec-tls-largeaccess2.ll | 40 +++++++++----------
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll | 2 +-
llvm/test/Transforms/InstCombine/fdiv.ll | 4 +-
5 files changed, 28 insertions(+), 26 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 6c3adf00c189a..f9cee9dfcfada 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1598,9 +1598,11 @@ Instruction *InstCombinerImpl::foldFDivConstantDivisor(BinaryOperator &I) {
return BinaryOperator::CreateFDivFMF(X, NegC, &I);
// nnan X / +0.0 -> copysign(inf, X)
- if (I.hasNoNaNs() && match(I.getOperand(1), m_Zero())) {
+ // nnan nsz X / -0.0 -> copysign(inf, X)
+ if (I.hasNoNaNs() &&
+ (match(I.getOperand(1), m_PosZeroFP()) ||
+ (I.hasNoSignedZeros() && match(I.getOperand(1), m_AnyZeroFP())))) {
IRBuilder<> B(&I);
- // TODO: nnan nsz X / -0.0 -> copysign(inf, X)
CallInst *CopySign = B.CreateIntrinsic(
Intrinsic::copysign, {C->getType()},
{ConstantFP::getInfinity(I.getType()), I.getOperand(0)}, &I);
diff --git a/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll b/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
index 67d82c6908d75..ef4e79b830c44 100644
--- a/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
@@ -227,4 +227,4 @@ entry:
; DIS: 000000000000be6c (idx: [[#NFA+19]]) mySmallLocalExecTLS3[TL]:
; DIS: 000000000000fcec (idx: [[#NFA+21]]) mySmallLocalExecTLS4[TL]:
; DIS: 0000000000013b6c (idx: [[#NFA+23]]) mySmallLocalExecTLS5[TL]:
-; DIS: 00000000000179ec (idx: [[#NFA+25]]) mySmallLocalExecTLSv2[TL]:
\ No newline at end of file
+; DIS: 00000000000179ec (idx: [[#NFA+25]]) mySmallLocalExecTLSv2[TL]:
diff --git a/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess2.ll b/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess2.ll
index 725b680054926..c4ba33fbc0c80 100644
--- a/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess2.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess2.ll
@@ -105,37 +105,37 @@ entry:
ret i64 %add11
}
-; DIS: 0000000000000000 (idx: 7) .StoreLargeAccess1:
+; DIS: 0000000000000000 (idx: 9) .StoreLargeAccess1:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} mflr 0
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} stdu 1, -48(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 212
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 0, 64(1)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 4, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 13) MyTLSGDVar[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 15) MyTLSGDVar[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 4, 0(4)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 13) MyTLSGDVar[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 15) MyTLSGDVar[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 3, 424(13)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 1) mySmallLocalExecTLS6[UL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 3) mySmallLocalExecTLS6[UL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 203
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 3, 1200(13)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 17) mySmallLocalExecTLS2[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 19) mySmallLocalExecTLS2[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 15) .MyTLSGDVar[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 17) .MyTLSGDVar[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 3, 8(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 15) .MyTLSGDVar[TE]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 17) .MyTLSGDVar[TE]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 3) .__tls_get_addr[PR]
+; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 5) .__tls_get_addr[PR]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 44
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 4, 440(3)
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 6
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 4, 100
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 3, 32400(13)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 21) mySmallLocalExecTLS3[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 23) mySmallLocalExecTLS3[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 882
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 4, -4336(13)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 23) mySmallLocalExecTLS4[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 25) mySmallLocalExecTLS4[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} std 3, 21264(13)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 25) mySmallLocalExecTLS5[TL]
+; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TLS_LE (idx: 27) mySmallLocalExecTLS5[TL]
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} li 3, 1191
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} addi 1, 1, 48
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} ld 0, 16(1)
@@ -143,18 +143,18 @@ entry:
; DIS-NEXT: [[#%x, ADDR:]]: {{.*}} blr
; DIS: Disassembly of section .data:
-; DIS: 0000000000000068 (idx: 9) StoreLargeAccess1[DS]:
+; DIS: 0000000000000068 (idx: 11) StoreLargeAccess1[DS]:
; DIS-NEXT: 68: 00 00 00 00
-; DIS-NEXT: 0000000000000068: R_POS (idx: 7) .StoreLargeAccess1
+; DIS-NEXT: 0000000000000068: R_POS (idx: 9) .StoreLargeAccess1
; DIS-NEXT: 6c: 00 00 00 00
; DIS-NEXT: 70: 00 00 00 00
-; DIS-NEXT: 0000000000000070: R_POS (idx: 11) TOC[TC0]
+; DIS-NEXT: 0000000000000070: R_POS (idx: 13) TOC[TC0]
; DIS-NEXT: 74: 00 00 00 80
; DIS: Disassembly of section .tdata:
-; DIS: 0000000000000000 (idx: 17) mySmallLocalExecTLS2[TL]:
-; DIS: 0000000000005dc0 (idx: 19) MyTLSGDVar[TL]:
-; DIS: 00000000000076c0 (idx: 21) mySmallLocalExecTLS3[TL]:
-; DIS: 000000000000d480 (idx: 23) mySmallLocalExecTLS4[TL]:
-; DIS: 0000000000013240 (idx: 25) mySmallLocalExecTLS5[TL]:
-; DIS: 0000000000019000 (idx: 27) mySmallLocalExecTLS[TL]:
+; DIS: 0000000000000000 (idx: 19) mySmallLocalExecTLS2[TL]:
+; DIS: 0000000000005dc0 (idx: 21) MyTLSGDVar[TL]:
+; DIS: 00000000000076c0 (idx: 23) mySmallLocalExecTLS3[TL]:
+; DIS: 000000000000d480 (idx: 25) mySmallLocalExecTLS4[TL]:
+; DIS: 0000000000013240 (idx: 27) mySmallLocalExecTLS5[TL]:
+; DIS: 0000000000019000 (idx: 29) mySmallLocalExecTLS[TL]:
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
index 82ff008ad16d0..52f3c116f60a3 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
@@ -175,7 +175,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: File Auxiliary Entry {
; SYM-NEXT: Index: 2
-; SYM-NEXT: Name: LLVM version 18.0.0git
+; SYM-NEXT: Name: LLVM version 19.0.0git
; SYM-NEXT: Type: XFT_CV (0x2)
; SYM64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
; SYM-NEXT: }
diff --git a/llvm/test/Transforms/InstCombine/fdiv.ll b/llvm/test/Transforms/InstCombine/fdiv.ll
index c6a78e13b2445..448f9f8d7dd6e 100644
--- a/llvm/test/Transforms/InstCombine/fdiv.ll
+++ b/llvm/test/Transforms/InstCombine/fdiv.ll
@@ -1004,7 +1004,7 @@ define double @test_positive_zero_nsz(double %X) {
define double @test_negative_zero_nsz(double %X) {
; CHECK-LABEL: @test_negative_zero_nsz(
-; CHECK-NEXT: [[TMP1:%.*]] = fdiv nnan nsz double [[X:%.*]], -0.000000e+00
+; CHECK-NEXT: [[TMP1:%.*]] = call nnan nsz double @llvm.copysign.f64(double 0x7FF0000000000000, double [[X:%.*]])
; CHECK-NEXT: ret double [[TMP1]]
;
%1 = fdiv nnan nsz double %X, -0.0
@@ -1040,7 +1040,7 @@ define <2 x double> @test_positive_zero_vector_nsz(<2 x double> %X) {
define <2 x double> @test_negative_zero_vector_nsz(<2 x double> %X) {
; CHECK-LABEL: @test_negative_zero_vector_nsz(
-; CHECK-NEXT: [[TMP1:%.*]] = fdiv nnan nsz <2 x double> [[X:%.*]], <double -0.000000e+00, double 0.000000e+00>
+; CHECK-NEXT: [[TMP1:%.*]] = call nnan nsz <2 x double> @llvm.copysign.v2f64(<2 x double> <double 0x7FF0000000000000, double 0x7FF0000000000000>, <2 x double> [[X:%.*]])
; CHECK-NEXT: ret <2 x double> [[TMP1]]
;
%1 = fdiv nnan nsz <2 x double> %X, <double -0.0, double 0.0>
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