[llvm] 0fb9f68 - [SelectionDAG] Use getRegisterType instead of getTypeToTransformTo in ComputePHILiveOutRegInfo. (#80773)

via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 6 09:39:23 PST 2024


Author: Craig Topper
Date: 2024-02-06T09:39:19-08:00
New Revision: 0fb9f68bae4743dbabbccf3bbc575ac569730840

URL: https://github.com/llvm/llvm-project/commit/0fb9f68bae4743dbabbccf3bbc575ac569730840
DIFF: https://github.com/llvm/llvm-project/commit/0fb9f68bae4743dbabbccf3bbc575ac569730840.diff

LOG: [SelectionDAG] Use getRegisterType instead of getTypeToTransformTo in ComputePHILiveOutRegInfo. (#80773)

Since we used getNumRegisters right before this, I think this is the
correct interface we should be using here.

I'm experimenting with making i32 legal on RISC-V 64, but using i64 for
the register type between basic blocks. This was one of the first issues
I found trying to do that.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
index 5926a60581112..6cf5408591523 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -431,7 +431,7 @@ void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
 
   if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
     return;
-  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
+  IntVT = TLI->getRegisterType(PN->getContext(), IntVT);
   unsigned BitWidth = IntVT.getSizeInBits();
 
   auto It = ValueMap.find(PN);


        


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