[llvm] [RISCV] RISCV vector calling convention (2/2) (PR #79096)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 6 01:55:14 PST 2024


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@@ -17711,7 +17691,7 @@ bool RISCV::CC_RISCV(const DataLayout &DL, RISCVABI::ABI ABI, unsigned ValNo,
   }
 
   // Allocate to a register if possible, or else a stack slot.
-  Register Reg;
+  Register Reg = MCRegister();
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arsenm wrote:

Don't need to initialize this 

https://github.com/llvm/llvm-project/pull/79096


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