[llvm] dfdea4d - [RISCV] Update llvm/test/MC/RISCV/attribute-arch.s for RISC-V Pointer Masking (#80748)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 5 14:31:15 PST 2024
Author: Michael Maitland
Date: 2024-02-05T17:31:11-05:00
New Revision: dfdea4d5fb18ddf928b043a359e50c3f015dae71
URL: https://github.com/llvm/llvm-project/commit/dfdea4d5fb18ddf928b043a359e50c3f015dae71
DIFF: https://github.com/llvm/llvm-project/commit/dfdea4d5fb18ddf928b043a359e50c3f015dae71.diff
LOG: [RISCV] Update llvm/test/MC/RISCV/attribute-arch.s for RISC-V Pointer Masking (#80748)
I forgot to update this test in #79929
Added:
Modified:
llvm/test/MC/RISCV/attribute-arch.s
Removed:
################################################################################
diff --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s
index 34b7ee52da320d..342e6327cde394 100644
--- a/llvm/test/MC/RISCV/attribute-arch.s
+++ b/llvm/test/MC/RISCV/attribute-arch.s
@@ -392,3 +392,33 @@
.attribute arch, "rv64i_xsfvfwmaccqqq"
# CHECK: attribute 5, "rv64i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvl32b1p0_xsfvfwmaccqqq1p0"
+
+.attribute arch, "rv32i_ssnpm0p8"
+# CHECK: attribute 5, "rv32i2p1_ssnpm0p8"
+
+.attribute arch, "rv32i_smnpm0p8"
+# CHECK: attribute 5, "rv32i2p1_smnpm0p8"
+
+.attribute arch, "rv32i_smmpm0p8"
+# CHECK: attribute 5, "rv32i2p1_smmpm0p8"
+
+.attribute arch, "rv32i_sspm0p8"
+# CHECK: attribute 5, "rv32i2p1_sspm0p8"
+
+.attribute arch, "rv32i_supm0p8"
+# CHECK: attribute 5, "rv32i2p1_supm0p8"
+
+.attribute arch, "rv64i_ssnpm0p8"
+# CHECK: attribute 5, "rv64i2p1_ssnpm0p8"
+
+.attribute arch, "rv64i_smnpm0p8"
+# CHECK: attribute 5, "rv64i2p1_smnpm0p8"
+
+.attribute arch, "rv64i_smmpm0p8"
+# CHECK: attribute 5, "rv64i2p1_smmpm0p8"
+
+.attribute arch, "rv64i_sspm0p8"
+# CHECK: attribute 5, "rv64i2p1_sspm0p8"
+
+.attribute arch, "rv64i_supm0p8"
+# CHECK: attribute 5, "rv64i2p1_supm0p8"
More information about the llvm-commits
mailing list