[llvm] GlobalISel: adapt MachineSSAUpdater for use in GlobalISel path (PR #78431)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 5 05:38:16 PST 2024
arsenm wrote:
> > > Seems out of date, and needs to swap in G_* opcodes for generic registers
> >
> >
> > For global-isel lane-mask registers are not generic registers, they have regclass + LLT instead of only regclass. PHI lane masks should be fully instruction selected (all reg operands need to have reg class) when they are introduced. Undef lane-masks should also be inst-selected, so use of IMPLICIT_DEF is fine.
>
> If that's the case, then this patch is unnecessary? Allowing MachineSSAUpdater in GlobalISel means handling generic virtual registers, and emitting the appropriate G_* opcodes instead of the post-selection equivalents.
I guess preserve-LLT is one property, but is much more narrow than the title suggests. The title implies it will handle emitting G_* opcodes
https://github.com/llvm/llvm-project/pull/78431
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