[llvm] 7bdc80f - [AVR] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 5 04:55:58 PST 2024
Author: Nikita Popov
Date: 2024-02-05T13:55:50+01:00
New Revision: 7bdc80f35c325d148b1ddbdfce7dea8c6ba7af84
URL: https://github.com/llvm/llvm-project/commit/7bdc80f35c325d148b1ddbdfce7dea8c6ba7af84
DIFF: https://github.com/llvm/llvm-project/commit/7bdc80f35c325d148b1ddbdfce7dea8c6ba7af84.diff
LOG: [AVR] Convert tests to opaque pointers (NFC)
Added:
Modified:
llvm/test/CodeGen/AVR/PR37143.ll
llvm/test/CodeGen/AVR/alloca.ll
llvm/test/CodeGen/AVR/atomics/load-store-16-unexpected-register-bug.ll
llvm/test/CodeGen/AVR/atomics/load16.ll
llvm/test/CodeGen/AVR/atomics/load32.ll
llvm/test/CodeGen/AVR/atomics/load64.ll
llvm/test/CodeGen/AVR/atomics/load8.ll
llvm/test/CodeGen/AVR/atomics/store.ll
llvm/test/CodeGen/AVR/atomics/store16.ll
llvm/test/CodeGen/AVR/atomics/swap.ll
llvm/test/CodeGen/AVR/avr-rust-issue-123.ll
llvm/test/CodeGen/AVR/block-address-is-in-progmem-space.ll
llvm/test/CodeGen/AVR/brind.ll
llvm/test/CodeGen/AVR/call.ll
llvm/test/CodeGen/AVR/calling-conv/c/basic.ll
llvm/test/CodeGen/AVR/calling-conv/c/basic_aggr.ll
llvm/test/CodeGen/AVR/calling-conv/c/stack.ll
llvm/test/CodeGen/AVR/ctors.ll
llvm/test/CodeGen/AVR/directmem.ll
llvm/test/CodeGen/AVR/dynalloca.ll
llvm/test/CodeGen/AVR/elpm.ll
llvm/test/CodeGen/AVR/features/avr-tiny.ll
llvm/test/CodeGen/AVR/features/xmega_io.ll
llvm/test/CodeGen/AVR/frmidx-iterator-bug.ll
llvm/test/CodeGen/AVR/high-pressure-on-ptrregs.ll
llvm/test/CodeGen/AVR/icall-func-pointer-correct-addr-space.ll
llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll
llvm/test/CodeGen/AVR/inline-asm/inline-asm.ll
llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll
llvm/test/CodeGen/AVR/inline-asm/loadstore.ll
llvm/test/CodeGen/AVR/integration/blink.ll
llvm/test/CodeGen/AVR/interrupts.ll
llvm/test/CodeGen/AVR/intrinsics/stacksave-restore.ll
llvm/test/CodeGen/AVR/io.ll
llvm/test/CodeGen/AVR/issue-regalloc-stackframe-folding-earlyclobber.ll
llvm/test/CodeGen/AVR/load.ll
llvm/test/CodeGen/AVR/lpmx.ll
llvm/test/CodeGen/AVR/pr43443-ctor-alias.ll
llvm/test/CodeGen/AVR/progmem-extended.ll
llvm/test/CodeGen/AVR/progmem.ll
llvm/test/CodeGen/AVR/rust-avr-bug-112.ll
llvm/test/CodeGen/AVR/rust-avr-bug-37.ll
llvm/test/CodeGen/AVR/rust-avr-bug-95.ll
llvm/test/CodeGen/AVR/rust-avr-bug-99.ll
llvm/test/CodeGen/AVR/rust-trait-object.ll
llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll
llvm/test/CodeGen/AVR/store-undef.ll
llvm/test/CodeGen/AVR/store.ll
llvm/test/CodeGen/AVR/struct.ll
llvm/test/CodeGen/AVR/umul.with.overflow.i16-bug.ll
llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll
llvm/test/CodeGen/AVR/varargs.ll
llvm/test/CodeGen/AVR/zeroreg.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AVR/PR37143.ll b/llvm/test/CodeGen/AVR/PR37143.ll
index fe9529a24973f..95ae209aae950 100644
--- a/llvm/test/CodeGen/AVR/PR37143.ll
+++ b/llvm/test/CodeGen/AVR/PR37143.ll
@@ -4,10 +4,10 @@
; CHECK: ldd {{r[0-9]+}}, [[PTR]]+1
; CHECK: std [[PTR2:[XYZ]]]+1, {{r[0-9]+}}
; CHECK: st [[PTR2]], {{r[0-9]+}}
-define void @load_store_16(i16* nocapture %ptr) local_unnamed_addr #1 {
+define void @load_store_16(ptr nocapture %ptr) local_unnamed_addr #1 {
entry:
- %0 = load i16, i16* %ptr, align 2
+ %0 = load i16, ptr %ptr, align 2
%add = add i16 %0, 5
- store i16 %add, i16* %ptr, align 2
+ store i16 %add, ptr %ptr, align 2
ret void
}
diff --git a/llvm/test/CodeGen/AVR/alloca.ll b/llvm/test/CodeGen/AVR/alloca.ll
index 30842f8244c61..2d53106b5f846 100644
--- a/llvm/test/CodeGen/AVR/alloca.ll
+++ b/llvm/test/CodeGen/AVR/alloca.ll
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=avr -mattr=avr6 | FileCheck %s
-declare i16 @allocate(i16*, i16*)
+declare i16 @allocate(ptr, ptr)
; Test taking an address of an alloca with a small offset (adiw)
define i16 @alloca_addressof_small() {
@@ -18,9 +18,9 @@ entry:
; CHECK: pop r28
%p = alloca [18 x i16]
%k = alloca [14 x i16]
- %arrayidx = getelementptr inbounds [14 x i16], [14 x i16]* %k, i16 0, i16 8
- %arrayidx1 = getelementptr inbounds [18 x i16], [18 x i16]* %p, i16 0, i16 5
- %call = call i16 @allocate(i16* %arrayidx, i16* %arrayidx1)
+ %arrayidx = getelementptr inbounds [14 x i16], ptr %k, i16 0, i16 8
+ %arrayidx1 = getelementptr inbounds [18 x i16], ptr %p, i16 0, i16 5
+ %call = call i16 @allocate(ptr %arrayidx, ptr %arrayidx1)
ret i16 %call
}
@@ -35,9 +35,9 @@ entry:
; CHECK: sbci r23, 255
%p = alloca [55 x i16]
%k = alloca [14 x i16]
- %arrayidx = getelementptr inbounds [14 x i16], [14 x i16]* %k, i16 0, i16 8
- %arrayidx1 = getelementptr inbounds [55 x i16], [55 x i16]* %p, i16 0, i16 41
- %call = call i16 @allocate(i16* %arrayidx, i16* %arrayidx1)
+ %arrayidx = getelementptr inbounds [14 x i16], ptr %k, i16 0, i16 8
+ %arrayidx1 = getelementptr inbounds [55 x i16], ptr %p, i16 0, i16 41
+ %call = call i16 @allocate(ptr %arrayidx, ptr %arrayidx1)
ret i16 %call
}
@@ -55,13 +55,13 @@ entry:
; CHECK: sbiw r28, 57
%p = alloca [15 x i16]
%k = alloca [14 x i16]
- %arrayidx = getelementptr inbounds [15 x i16], [15 x i16]* %p, i16 0, i16 45
- store i16 22, i16* %arrayidx
- %arrayidx1 = getelementptr inbounds [14 x i16], [14 x i16]* %k, i16 0, i16 11
- store i16 42, i16* %arrayidx1
- %arrayidx2 = getelementptr inbounds [14 x i16], [14 x i16]* %k, i16 0, i16 0
- %arrayidx3 = getelementptr inbounds [15 x i16], [15 x i16]* %p, i16 0, i16 0
- %call = call i16 @allocate(i16* %arrayidx2, i16* %arrayidx3)
+ %arrayidx = getelementptr inbounds [15 x i16], ptr %p, i16 0, i16 45
+ store i16 22, ptr %arrayidx
+ %arrayidx1 = getelementptr inbounds [14 x i16], ptr %k, i16 0, i16 11
+ store i16 42, ptr %arrayidx1
+ %arrayidx2 = getelementptr inbounds [14 x i16], ptr %k, i16 0, i16 0
+ %arrayidx3 = getelementptr inbounds [15 x i16], ptr %p, i16 0, i16 0
+ %call = call i16 @allocate(ptr %arrayidx2, ptr %arrayidx3)
ret i16 %call
}
@@ -76,9 +76,9 @@ define void @alloca_write_huge() {
; CHECK: subi r28, 215
; CHECK: sbci r29, 0
%k = alloca [140 x i16]
- %arrayidx = getelementptr inbounds [140 x i16], [140 x i16]* %k, i16 0, i16 138
- store i16 22, i16* %arrayidx
- %arraydecay = getelementptr inbounds [140 x i16], [140 x i16]* %k, i16 0, i16 0
- call i16 @allocate(i16* %arraydecay, i16* null)
+ %arrayidx = getelementptr inbounds [140 x i16], ptr %k, i16 0, i16 138
+ store i16 22, ptr %arrayidx
+ %arraydecay = getelementptr inbounds [140 x i16], ptr %k, i16 0, i16 0
+ call i16 @allocate(ptr %arraydecay, ptr null)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/atomics/load-store-16-unexpected-register-bug.ll b/llvm/test/CodeGen/AVR/atomics/load-store-16-unexpected-register-bug.ll
index 9c72940b2b796..1f5a61148147c 100644
--- a/llvm/test/CodeGen/AVR/atomics/load-store-16-unexpected-register-bug.ll
+++ b/llvm/test/CodeGen/AVR/atomics/load-store-16-unexpected-register-bug.ll
@@ -11,13 +11,13 @@
%UnsafeCell = type { i16, [0 x i8] }
; CHECK-LABEL: foo
-define i8 @foo(%AtomicI16*) {
+define i8 @foo(ptr) {
start:
; We should not be generating atomics that use the X register, they will fail when emitting MC.
; CHECK-NOT: X
- %1 = getelementptr inbounds %AtomicI16, %AtomicI16* %0, i16 0, i32 0, i32 0
- %2 = load atomic i16, i16* %1 seq_cst, align 2
+ %1 = getelementptr inbounds %AtomicI16, ptr %0, i16 0, i32 0, i32 0
+ %2 = load atomic i16, ptr %1 seq_cst, align 2
ret i8 0
}
diff --git a/llvm/test/CodeGen/AVR/atomics/load16.ll b/llvm/test/CodeGen/AVR/atomics/load16.ll
index 5046332688b34..5355fb610a35d 100644
--- a/llvm/test/CodeGen/AVR/atomics/load16.ll
+++ b/llvm/test/CodeGen/AVR/atomics/load16.ll
@@ -6,22 +6,22 @@
; CHECK-NEXT: ld [[RR:r[0-9]+]], [[RD:(X|Y|Z)]]
; CHECK-NEXT: ldd [[RR:r[0-9]+]], [[RD]]+1
; CHECK-NEXT: out 63, r0
-define i16 @atomic_load16(i16* %foo) {
- %val = load atomic i16, i16* %foo unordered, align 2
+define i16 @atomic_load16(ptr %foo) {
+ %val = load atomic i16, ptr %foo unordered, align 2
ret i16 %val
}
; CHECK-LABEL: atomic_load_swap16
; CHECK: call __sync_lock_test_and_set_2
-define i16 @atomic_load_swap16(i16* %foo) {
- %val = atomicrmw xchg i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_swap16(ptr %foo) {
+ %val = atomicrmw xchg ptr %foo, i16 13 seq_cst
ret i16 %val
}
; CHECK-LABEL: atomic_load_cmp_swap16
; CHECK: call __sync_val_compare_and_swap_2
-define i16 @atomic_load_cmp_swap16(i16* %foo) {
- %val = cmpxchg i16* %foo, i16 5, i16 10 acq_rel monotonic
+define i16 @atomic_load_cmp_swap16(ptr %foo) {
+ %val = cmpxchg ptr %foo, i16 5, i16 10 acq_rel monotonic
%value_loaded = extractvalue { i16, i1 } %val, 0
ret i16 %value_loaded
}
@@ -36,8 +36,8 @@ define i16 @atomic_load_cmp_swap16(i16* %foo) {
; CHECK-NEXT: std [[RR]]+1, [[RR1H]]
; CHECK-NEXT: st [[RR]], [[RR1L]]
; CHECK-NEXT: out 63, r0
-define i16 @atomic_load_add16(i16* %foo) {
- %val = atomicrmw add i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_add16(ptr %foo) {
+ %val = atomicrmw add ptr %foo, i16 13 seq_cst
ret i16 %val
}
@@ -52,8 +52,8 @@ define i16 @atomic_load_add16(i16* %foo) {
; CHECK-NEXT: std [[RR]]+1, [[TMPH]]
; CHECK-NEXT: st [[RR]], [[TMPL]]
; CHECK-NEXT: out 63, r0
-define i16 @atomic_load_sub16(i16* %foo) {
- %val = atomicrmw sub i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_sub16(ptr %foo) {
+ %val = atomicrmw sub ptr %foo, i16 13 seq_cst
ret i16 %val
}
@@ -67,8 +67,8 @@ define i16 @atomic_load_sub16(i16* %foo) {
; CHECK-NEXT: std [[RR]]+1, [[RD1H]]
; CHECK-NEXT: st [[RR]], [[RD1L]]
; CHECK-NEXT: out 63, r0
-define i16 @atomic_load_and16(i16* %foo) {
- %val = atomicrmw and i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_and16(ptr %foo) {
+ %val = atomicrmw and ptr %foo, i16 13 seq_cst
ret i16 %val
}
@@ -82,8 +82,8 @@ define i16 @atomic_load_and16(i16* %foo) {
; CHECK-NEXT: std [[RR]]+1, [[RD1H]]
; CHECK-NEXT: st [[RR]], [[RD1L]]
; CHECK-NEXT: out 63, r0
-define i16 @atomic_load_or16(i16* %foo) {
- %val = atomicrmw or i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_or16(ptr %foo) {
+ %val = atomicrmw or ptr %foo, i16 13 seq_cst
ret i16 %val
}
@@ -97,42 +97,42 @@ define i16 @atomic_load_or16(i16* %foo) {
; CHECK-NEXT: std [[RR]]+1, [[RD1H]]
; CHECK-NEXT: st [[RR]], [[RD1L]]
; CHECK-NEXT: out 63, r0
-define i16 @atomic_load_xor16(i16* %foo) {
- %val = atomicrmw xor i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_xor16(ptr %foo) {
+ %val = atomicrmw xor ptr %foo, i16 13 seq_cst
ret i16 %val
}
; CHECK-LABEL: atomic_load_nand16
; CHECK: call __sync_fetch_and_nand_2
-define i16 @atomic_load_nand16(i16* %foo) {
- %val = atomicrmw nand i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_nand16(ptr %foo) {
+ %val = atomicrmw nand ptr %foo, i16 13 seq_cst
ret i16 %val
}
; CHECK-LABEL: atomic_load_max16
; CHECK: call __sync_fetch_and_max_2
-define i16 @atomic_load_max16(i16* %foo) {
- %val = atomicrmw max i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_max16(ptr %foo) {
+ %val = atomicrmw max ptr %foo, i16 13 seq_cst
ret i16 %val
}
; CHECK-LABEL: atomic_load_min16
; CHECK: call __sync_fetch_and_min_2
-define i16 @atomic_load_min16(i16* %foo) {
- %val = atomicrmw min i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_min16(ptr %foo) {
+ %val = atomicrmw min ptr %foo, i16 13 seq_cst
ret i16 %val
}
; CHECK-LABEL: atomic_load_umax16
; CHECK: call __sync_fetch_and_umax_2
-define i16 @atomic_load_umax16(i16* %foo) {
- %val = atomicrmw umax i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_umax16(ptr %foo) {
+ %val = atomicrmw umax ptr %foo, i16 13 seq_cst
ret i16 %val
}
; CHECK-LABEL: atomic_load_umin16
; CHECK: call __sync_fetch_and_umin_2
-define i16 @atomic_load_umin16(i16* %foo) {
- %val = atomicrmw umin i16* %foo, i16 13 seq_cst
+define i16 @atomic_load_umin16(ptr %foo) {
+ %val = atomicrmw umin ptr %foo, i16 13 seq_cst
ret i16 %val
}
diff --git a/llvm/test/CodeGen/AVR/atomics/load32.ll b/llvm/test/CodeGen/AVR/atomics/load32.ll
index 5320b2aeb1c6e..51a99f1f0e457 100644
--- a/llvm/test/CodeGen/AVR/atomics/load32.ll
+++ b/llvm/test/CodeGen/AVR/atomics/load32.ll
@@ -2,15 +2,15 @@
; CHECK-LABEL: atomic_load32
; CHECK: call __sync_val_compare_and_swap_4
-define i32 @atomic_load32(i32* %foo) {
- %val = load atomic i32, i32* %foo unordered, align 4
+define i32 @atomic_load32(ptr %foo) {
+ %val = load atomic i32, ptr %foo unordered, align 4
ret i32 %val
}
; CHECK-LABEL: atomic_load_sub32
; CHECK: call __sync_fetch_and_sub_4
-define i32 @atomic_load_sub32(i32* %foo) {
- %val = atomicrmw sub i32* %foo, i32 13 seq_cst
+define i32 @atomic_load_sub32(ptr %foo) {
+ %val = atomicrmw sub ptr %foo, i32 13 seq_cst
ret i32 %val
}
diff --git a/llvm/test/CodeGen/AVR/atomics/load64.ll b/llvm/test/CodeGen/AVR/atomics/load64.ll
index 44360d5706209..7fafcb7d35c3d 100644
--- a/llvm/test/CodeGen/AVR/atomics/load64.ll
+++ b/llvm/test/CodeGen/AVR/atomics/load64.ll
@@ -2,15 +2,15 @@
; CHECK-LABEL: atomic_load64
; CHECK: call __sync_val_compare_and_swap_8
-define i64 @atomic_load64(i64* %foo) {
- %val = load atomic i64, i64* %foo unordered, align 8
+define i64 @atomic_load64(ptr %foo) {
+ %val = load atomic i64, ptr %foo unordered, align 8
ret i64 %val
}
; CHECK-LABEL: atomic_load_sub64
; CHECK: call __sync_fetch_and_sub_8
-define i64 @atomic_load_sub64(i64* %foo) {
- %val = atomicrmw sub i64* %foo, i64 13 seq_cst
+define i64 @atomic_load_sub64(ptr %foo) {
+ %val = atomicrmw sub ptr %foo, i64 13 seq_cst
ret i64 %val
}
diff --git a/llvm/test/CodeGen/AVR/atomics/load8.ll b/llvm/test/CodeGen/AVR/atomics/load8.ll
index bf9ac369c19dd..73187a09316a4 100644
--- a/llvm/test/CodeGen/AVR/atomics/load8.ll
+++ b/llvm/test/CodeGen/AVR/atomics/load8.ll
@@ -7,22 +7,22 @@
; CHECK-NEXT: cli
; CHECK-NEXT: ld [[RR:r[0-9]+]], [[RD:(X|Y|Z)]]
; CHECK-NEXT: out 63, r0
-define i8 @atomic_load8(i8* %foo) {
- %val = load atomic i8, i8* %foo unordered, align 1
+define i8 @atomic_load8(ptr %foo) {
+ %val = load atomic i8, ptr %foo unordered, align 1
ret i8 %val
}
; CHECK-LABEL: atomic_load_swap8
; CHECK: call __sync_lock_test_and_set_1
-define i8 @atomic_load_swap8(i8* %foo) {
- %val = atomicrmw xchg i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_swap8(ptr %foo) {
+ %val = atomicrmw xchg ptr %foo, i8 13 seq_cst
ret i8 %val
}
; CHECK-LABEL: atomic_load_cmp_swap8
; CHECK: call __sync_val_compare_and_swap_1
-define i8 @atomic_load_cmp_swap8(i8* %foo) {
- %val = cmpxchg i8* %foo, i8 5, i8 10 acq_rel monotonic
+define i8 @atomic_load_cmp_swap8(ptr %foo) {
+ %val = cmpxchg ptr %foo, i8 5, i8 10 acq_rel monotonic
%value_loaded = extractvalue { i8, i1 } %val, 0
ret i8 %value_loaded
}
@@ -34,8 +34,8 @@ define i8 @atomic_load_cmp_swap8(i8* %foo) {
; CHECK-NEXT: add [[RR1:r[0-9]+]], [[RD]]
; CHECK-NEXT: st [[RR]], [[RR1]]
; CHECK-NEXT: out 63, r0
-define i8 @atomic_load_add8(i8* %foo) {
- %val = atomicrmw add i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_add8(ptr %foo) {
+ %val = atomicrmw add ptr %foo, i8 13 seq_cst
ret i8 %val
}
@@ -47,8 +47,8 @@ define i8 @atomic_load_add8(i8* %foo) {
; CHECK-NEXT: sub [[TMP]], [[RR1:r[0-9]+]]
; CHECK-NEXT: st [[RR]], [[TMP]]
; CHECK-NEXT: out 63, r0
-define i8 @atomic_load_sub8(i8* %foo) {
- %val = atomicrmw sub i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_sub8(ptr %foo) {
+ %val = atomicrmw sub ptr %foo, i8 13 seq_cst
ret i8 %val
}
@@ -59,8 +59,8 @@ define i8 @atomic_load_sub8(i8* %foo) {
; CHECK-NEXT: and [[RR1:r[0-9]+]], [[RD]]
; CHECK-NEXT: st [[RR]], [[RR1]]
; CHECK-NEXT: out 63, r0
-define i8 @atomic_load_and8(i8* %foo) {
- %val = atomicrmw and i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_and8(ptr %foo) {
+ %val = atomicrmw and ptr %foo, i8 13 seq_cst
ret i8 %val
}
@@ -71,8 +71,8 @@ define i8 @atomic_load_and8(i8* %foo) {
; CHECK-NEXT: or [[RR1:r[0-9]+]], [[RD]]
; CHECK-NEXT: st [[RR]], [[RR1]]
; CHECK-NEXT: out 63, r0
-define i8 @atomic_load_or8(i8* %foo) {
- %val = atomicrmw or i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_or8(ptr %foo) {
+ %val = atomicrmw or ptr %foo, i8 13 seq_cst
ret i8 %val
}
@@ -83,43 +83,43 @@ define i8 @atomic_load_or8(i8* %foo) {
; CHECK-NEXT: eor [[RR1:r[0-9]+]], [[RD]]
; CHECK-NEXT: st [[RR]], [[RR1]]
; CHECK-NEXT: out 63, r0
-define i8 @atomic_load_xor8(i8* %foo) {
- %val = atomicrmw xor i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_xor8(ptr %foo) {
+ %val = atomicrmw xor ptr %foo, i8 13 seq_cst
ret i8 %val
}
; CHECK-LABEL: atomic_load_nand8
; CHECK: call __sync_fetch_and_nand_1
-define i8 @atomic_load_nand8(i8* %foo) {
- %val = atomicrmw nand i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_nand8(ptr %foo) {
+ %val = atomicrmw nand ptr %foo, i8 13 seq_cst
ret i8 %val
}
; CHECK-LABEL: atomic_load_max8
; CHECK: call __sync_fetch_and_max_1
-define i8 @atomic_load_max8(i8* %foo) {
- %val = atomicrmw max i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_max8(ptr %foo) {
+ %val = atomicrmw max ptr %foo, i8 13 seq_cst
ret i8 %val
}
; CHECK-LABEL: atomic_load_min8
; CHECK: call __sync_fetch_and_min_1
-define i8 @atomic_load_min8(i8* %foo) {
- %val = atomicrmw min i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_min8(ptr %foo) {
+ %val = atomicrmw min ptr %foo, i8 13 seq_cst
ret i8 %val
}
; CHECK-LABEL: atomic_load_umax8
; CHECK: call __sync_fetch_and_umax_1
-define i8 @atomic_load_umax8(i8* %foo) {
- %val = atomicrmw umax i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_umax8(ptr %foo) {
+ %val = atomicrmw umax ptr %foo, i8 13 seq_cst
ret i8 %val
}
; CHECK-LABEL: atomic_load_umin8
; CHECK: call __sync_fetch_and_umin_1
-define i8 @atomic_load_umin8(i8* %foo) {
- %val = atomicrmw umin i8* %foo, i8 13 seq_cst
+define i8 @atomic_load_umin8(ptr %foo) {
+ %val = atomicrmw umin ptr %foo, i8 13 seq_cst
ret i8 %val
}
diff --git a/llvm/test/CodeGen/AVR/atomics/store.ll b/llvm/test/CodeGen/AVR/atomics/store.ll
index 0eb6b51b67515..16a4598347dd7 100644
--- a/llvm/test/CodeGen/AVR/atomics/store.ll
+++ b/llvm/test/CodeGen/AVR/atomics/store.ll
@@ -5,8 +5,8 @@
; CHECK-NEXT: cli
; CHECK-NEXT: st [[RD:(X|Y|Z)]], [[RR:r[0-9]+]]
; CHECK-NEXT: out 63, r0
-define void @atomic_store8(i8* %foo) {
- store atomic i8 1, i8* %foo unordered, align 1
+define void @atomic_store8(ptr %foo) {
+ store atomic i8 1, ptr %foo unordered, align 1
ret void
}
@@ -16,22 +16,22 @@ define void @atomic_store8(i8* %foo) {
; CHECK-NEXT: std [[RD:(X|Y|Z)]]+1, [[RR:r[0-9]+]]
; CHECK-NEXT: st [[RD]], [[RR:r[0-9]+]]
; CHECK-NEXT: out 63, r0
-define void @atomic_store16(i16* %foo) {
- store atomic i16 1, i16* %foo unordered, align 2
+define void @atomic_store16(ptr %foo) {
+ store atomic i16 1, ptr %foo unordered, align 2
ret void
}
; CHECK-LABEL: atomic_store32
; CHECK: call __sync_lock_test_and_set_4
-define void @atomic_store32(i32* %foo) {
- store atomic i32 1, i32* %foo unordered, align 4
+define void @atomic_store32(ptr %foo) {
+ store atomic i32 1, ptr %foo unordered, align 4
ret void
}
; CHECK-LABEL: atomic_store64
; CHECK: call __sync_lock_test_and_set_8
-define void @atomic_store64(i64* %foo) {
- store atomic i64 1, i64* %foo unordered, align 8
+define void @atomic_store64(ptr %foo) {
+ store atomic i64 1, ptr %foo unordered, align 8
ret void
}
diff --git a/llvm/test/CodeGen/AVR/atomics/store16.ll b/llvm/test/CodeGen/AVR/atomics/store16.ll
index 779ea188be771..05cd865bf8508 100644
--- a/llvm/test/CodeGen/AVR/atomics/store16.ll
+++ b/llvm/test/CodeGen/AVR/atomics/store16.ll
@@ -6,8 +6,8 @@
; CHECK-NEXT: std [[RD:(X|Y|Z)]]+1, [[RR:r[0-9]+]]
; CHECK-NEXT: st [[RD:(X|Y|Z)]], [[RR:r[0-9]+]]
; CHECK-NEXT: out 63, r0
-define void @atomic_store16(i16* %foo) {
- store atomic i16 1, i16* %foo unordered, align 2
+define void @atomic_store16(ptr %foo) {
+ store atomic i16 1, ptr %foo unordered, align 2
ret void
}
@@ -19,7 +19,7 @@ define void @atomic_store16(i16* %foo) {
; CHECK-NEXT: out 63, r0
define void @monotonic(i16) {
entry-block:
- store atomic i16 %0, i16* undef monotonic, align 2
+ store atomic i16 %0, ptr undef monotonic, align 2
ret void
}
diff --git a/llvm/test/CodeGen/AVR/atomics/swap.ll b/llvm/test/CodeGen/AVR/atomics/swap.ll
index 69372643c6600..d6eba95949d57 100644
--- a/llvm/test/CodeGen/AVR/atomics/swap.ll
+++ b/llvm/test/CodeGen/AVR/atomics/swap.ll
@@ -2,29 +2,29 @@
; CHECK-LABEL: atomic_swap8
; CHECK: call __sync_lock_test_and_set_1
-define i8 @atomic_swap8(i8* %foo) {
- %val = atomicrmw xchg i8* %foo, i8 13 seq_cst
+define i8 @atomic_swap8(ptr %foo) {
+ %val = atomicrmw xchg ptr %foo, i8 13 seq_cst
ret i8 %val
}
; CHECK-LABEL: atomic_swap16
; CHECK: call __sync_lock_test_and_set_2
-define i16 @atomic_swap16(i16* %foo) {
- %val = atomicrmw xchg i16* %foo, i16 13 seq_cst
+define i16 @atomic_swap16(ptr %foo) {
+ %val = atomicrmw xchg ptr %foo, i16 13 seq_cst
ret i16 %val
}
; CHECK-LABEL: atomic_swap32
; CHECK: call __sync_lock_test_and_set_4
-define i32 @atomic_swap32(i32* %foo) {
- %val = atomicrmw xchg i32* %foo, i32 13 seq_cst
+define i32 @atomic_swap32(ptr %foo) {
+ %val = atomicrmw xchg ptr %foo, i32 13 seq_cst
ret i32 %val
}
; CHECK-LABEL: atomic_swap64
; CHECK: call __sync_lock_test_and_set_8
-define i64 @atomic_swap64(i64* %foo) {
- %val = atomicrmw xchg i64* %foo, i64 13 seq_cst
+define i64 @atomic_swap64(ptr %foo) {
+ %val = atomicrmw xchg ptr %foo, i64 13 seq_cst
ret i64 %val
}
diff --git a/llvm/test/CodeGen/AVR/avr-rust-issue-123.ll b/llvm/test/CodeGen/AVR/avr-rust-issue-123.ll
index b2e4bf0e1448f..c12377bd0756c 100644
--- a/llvm/test/CodeGen/AVR/avr-rust-issue-123.ll
+++ b/llvm/test/CodeGen/AVR/avr-rust-issue-123.ll
@@ -43,21 +43,21 @@ bb: ; preds = %entry
%. = select i1 %tmp2, i8 5, i8 %arg1
%tmp3 = select i1 %tmp, i8 90, i8 %.
; CHECK: sts delayFactor, r{{[0-9]+}}
- store i8 %tmp3, i8* getelementptr inbounds (%UInt8, %UInt8* @delayFactor, i64 0, i32 0), align 1
+ store i8 %tmp3, ptr @delayFactor, align 1
%tmp4 = zext i8 %tmp3 to i32
%tmp5 = mul nuw nsw i32 %tmp4, 100
; CHECK: sts delay+3, r{{[0-9]+}}
; CHECK-NEXT: sts delay+2, r{{[0-9]+}}
; CHECK-NEXT: sts delay+1, r{{[0-9]+}}
; CHECK-NEXT: sts delay, r{{[0-9]+}}
- store i32 %tmp5, i32* getelementptr inbounds (%UInt32, %UInt32* @delay, i64 0, i32 0), align 4
+ store i32 %tmp5, ptr @delay, align 4
tail call void @eeprom_write(i16 34, i8 %tmp3)
br label %bb7
bb6: ; preds = %entry
%not. = icmp ne i8 %arg1, 0
%.2 = zext i1 %not. to i8
- store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @flag, i64 0, i32 0), align 1
+ store i1 %not., ptr @flag, align 1
; CHECK: call eeprom_write
tail call void @eeprom_write(i16 35, i8 %.2)
diff --git a/llvm/test/CodeGen/AVR/block-address-is-in-progmem-space.ll b/llvm/test/CodeGen/AVR/block-address-is-in-progmem-space.ll
index 8e6e3a7106283..7b2f25d1bc1cf 100644
--- a/llvm/test/CodeGen/AVR/block-address-is-in-progmem-space.ll
+++ b/llvm/test/CodeGen/AVR/block-address-is-in-progmem-space.ll
@@ -19,7 +19,7 @@ second:
; CHECK: ldi r30, .Ltmp0+2
; CHECK-NEXT: ldi r31, .Ltmp0+4
; CHECK: lpm r24, Z
- %bar = load i8, i8 addrspace(1)* blockaddress(@function_with_no_forward_reference, %second)
+ %bar = load i8, ptr addrspace(1) blockaddress(@function_with_no_forward_reference, %second)
ret i8 %bar
}
@@ -35,7 +35,7 @@ second:
; CHECK: ldi r30, .Ltmp1+2
; CHECK-NEXT: ldi r31, .Ltmp1+4
; CHECK-NEXT: lpm r24, Z
- %result2 = load i8, i8 addrspace(1)* blockaddress(@load_from_local_label, %second)
+ %result2 = load i8, ptr addrspace(1) blockaddress(@load_from_local_label, %second)
ret i8 %result2
}
diff --git a/llvm/test/CodeGen/AVR/brind.ll b/llvm/test/CodeGen/AVR/brind.ll
index b66319c872fe5..725afd45b4ddf 100644
--- a/llvm/test/CodeGen/AVR/brind.ll
+++ b/llvm/test/CodeGen/AVR/brind.ll
@@ -1,15 +1,15 @@
; RUN: llc -mattr=sram,eijmpcall < %s -march=avr -verify-machineinstrs | FileCheck %s
- at brind.k = private unnamed_addr constant [2 x i8 addrspace(1)*] [i8 addrspace(1)* blockaddress(@brind, %return), i8 addrspace(1)* blockaddress(@brind, %b)], align 1
+ at brind.k = private unnamed_addr constant [2 x ptr addrspace(1)] [ptr addrspace(1) blockaddress(@brind, %return), ptr addrspace(1) blockaddress(@brind, %b)], align 1
define i8 @brind(i8 %p) {
; CHECK-LABEL: brind:
; CHECK: ijmp
entry:
%idxprom = sext i8 %p to i16
- %arrayidx = getelementptr inbounds [2 x i8 addrspace(1)*], [2 x i8 addrspace(1)*]* @brind.k, i16 0, i16 %idxprom
- %s = load i8 addrspace(1)*, i8 addrspace(1)** %arrayidx
- indirectbr i8 addrspace(1)* %s, [label %return, label %b]
+ %arrayidx = getelementptr inbounds [2 x ptr addrspace(1)], ptr @brind.k, i16 0, i16 %idxprom
+ %s = load ptr addrspace(1), ptr %arrayidx
+ indirectbr ptr addrspace(1) %s, [label %return, label %b]
b:
br label %return
return:
diff --git a/llvm/test/CodeGen/AVR/call.ll b/llvm/test/CodeGen/AVR/call.ll
index 39382bc6a34b5..0054653a7428e 100644
--- a/llvm/test/CodeGen/AVR/call.ll
+++ b/llvm/test/CodeGen/AVR/call.ll
@@ -146,7 +146,7 @@ define i64 @calli64_stack() {
; Test passing arguments through the stack when the call frame is allocated
; in the prologue.
-declare void @foo64_3(i64, i64, i64, i8, i16*)
+declare void @foo64_3(i64, i64, i64, i8, ptr)
define void @testcallprologue() {
; CHECK-LABEL: testcallprologue:
@@ -174,12 +174,12 @@ define void @testcallprologue() {
; CHECK: pop r29
; CHECK: pop r28
%p = alloca [8 x i16]
- %arraydecay = getelementptr inbounds [8 x i16], [8 x i16]* %p, i16 0, i16 0
- call void @foo64_3(i64 723685415333071112, i64 723685415333071112, i64 723685415333071112, i8 88, i16* %arraydecay)
+ %arraydecay = getelementptr inbounds [8 x i16], ptr %p, i16 0, i16 0
+ call void @foo64_3(i64 723685415333071112, i64 723685415333071112, i64 723685415333071112, i8 88, ptr %arraydecay)
ret void
}
-define i32 @icall(i32 (i32) addrspace(1)* %foo) {
+define i32 @icall(ptr addrspace(1) %foo) {
; CHECK-LABEL: icall:
; AVR6: movw r30, r24
; AVR2: mov r30, r24
diff --git a/llvm/test/CodeGen/AVR/calling-conv/c/basic.ll b/llvm/test/CodeGen/AVR/calling-conv/c/basic.ll
index 1c3c0312b0883..3d783d143192d 100644
--- a/llvm/test/CodeGen/AVR/calling-conv/c/basic.ll
+++ b/llvm/test/CodeGen/AVR/calling-conv/c/basic.ll
@@ -3,33 +3,33 @@
; CHECK-LABEL: ret_void_args_i8
define void @ret_void_args_i8(i8 %a) {
; CHECK: sts 4, r24
- store volatile i8 %a, i8* inttoptr (i64 4 to i8*)
+ store volatile i8 %a, ptr inttoptr (i64 4 to ptr)
ret void
}
; CHECK-LABEL: ret_void_args_i8_i32
define void @ret_void_args_i8_i32(i8 %a, i32 %b) {
; CHECK: sts 4, r24
- store volatile i8 %a, i8* inttoptr (i64 4 to i8*)
+ store volatile i8 %a, ptr inttoptr (i64 4 to ptr)
; CHECK-NEXT: sts 8, r23
; CHECK-NEXT: sts 7, r22
; CHECK-NEXT: sts 6, r21
; CHECK-NEXT: sts 5, r20
- store volatile i32 %b, i32* inttoptr (i64 5 to i32*)
+ store volatile i32 %b, ptr inttoptr (i64 5 to ptr)
ret void
}
; CHECK-LABEL: ret_void_args_i8_i8_i8_i8
define void @ret_void_args_i8_i8_i8_i8(i8 %a, i8 %b, i8 %c, i8 %d) {
; CHECK: sts 4, r24
- store volatile i8 %a, i8* inttoptr (i64 4 to i8*)
+ store volatile i8 %a, ptr inttoptr (i64 4 to ptr)
; CHECK-NEXT: sts 5, r22
- store volatile i8 %b, i8* inttoptr (i64 5 to i8*)
+ store volatile i8 %b, ptr inttoptr (i64 5 to ptr)
; CHECK-NEXT: sts 6, r20
- store volatile i8 %c, i8* inttoptr (i64 6 to i8*)
+ store volatile i8 %c, ptr inttoptr (i64 6 to ptr)
; CHECK-NEXT: sts 7, r18
- store volatile i8 %d, i8* inttoptr (i64 7 to i8*)
+ store volatile i8 %d, ptr inttoptr (i64 7 to ptr)
ret void
}
@@ -39,14 +39,14 @@ define void @ret_void_args_i32_16_i8(i32 %a, i16 %b, i8 %c) {
; CHECK-NEXT: sts 6, r24
; CHECK-NEXT: sts 5, r23
; CHECK-NEXT: sts 4, r22
- store volatile i32 %a, i32* inttoptr (i64 4 to i32*)
+ store volatile i32 %a, ptr inttoptr (i64 4 to ptr)
; CHECK-NEXT: sts 5, r21
; CHECK-NEXT: sts 4, r20
- store volatile i16 %b, i16* inttoptr (i64 4 to i16*)
+ store volatile i16 %b, ptr inttoptr (i64 4 to ptr)
; CHECK-NEXT: sts 4, r18
- store volatile i8 %c, i8* inttoptr (i64 4 to i8*)
+ store volatile i8 %c, ptr inttoptr (i64 4 to ptr)
ret void
}
@@ -60,7 +60,7 @@ define void @ret_void_args_i64(i64 %a) {
; CHECK-NEXT: sts 6, r20
; CHECK-NEXT: sts 5, r19
; CHECK-NEXT: sts 4, r18
- store volatile i64 %a, i64* inttoptr (i64 4 to i64*)
+ store volatile i64 %a, ptr inttoptr (i64 4 to ptr)
ret void
}
@@ -74,7 +74,7 @@ define void @ret_void_args_i64_i64(i64 %a, i64 %b) {
; CHECK-DAG: sts 6, r20
; CHECK-DAG: sts 5, r19
; CHECK-DAG: sts 4, r18
- store volatile i64 %a, i64* inttoptr (i64 4 to i64*)
+ store volatile i64 %a, ptr inttoptr (i64 4 to ptr)
; CHECK-DAG: sts 11, r17
; CHECK-DAG: sts 10, r16
@@ -84,7 +84,7 @@ define void @ret_void_args_i64_i64(i64 %a, i64 %b) {
; CHECK-DAG: sts 6, r12
; CHECK-DAG: sts 5, r11
; CHECK-DAG: sts 4, r10
- store volatile i64 %b, i64* inttoptr (i64 4 to i64*)
+ store volatile i64 %b, ptr inttoptr (i64 4 to ptr)
ret void
}
@@ -94,7 +94,7 @@ define void @ret_void_args_i64_i64(i64 %a, i64 %b) {
define void @ret_void_args_i64_i64_i16(i64 %a, i64 %b, i16 %c) {
; CHECK: sts 5, r9
; CHECK-NEXT: sts 4, r8
- store volatile i16 %c, i16* inttoptr (i64 4 to i16*)
+ store volatile i16 %c, ptr inttoptr (i64 4 to ptr)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/calling-conv/c/basic_aggr.ll b/llvm/test/CodeGen/AVR/calling-conv/c/basic_aggr.ll
index 98317518057ac..96f24b0b96e6e 100644
--- a/llvm/test/CodeGen/AVR/calling-conv/c/basic_aggr.ll
+++ b/llvm/test/CodeGen/AVR/calling-conv/c/basic_aggr.ll
@@ -5,14 +5,14 @@ define void @ret_void_args_struct_i8_i32({ i8, i32 } %a) {
start:
; CHECK: sts 4, r20
%0 = extractvalue { i8, i32 } %a, 0
- store volatile i8 %0, i8* inttoptr (i64 4 to i8*)
+ store volatile i8 %0, ptr inttoptr (i64 4 to ptr)
; CHECK-NEXT: sts 8, r24
; CHECK-NEXT: sts 7, r23
; CHECK-NEXT: sts 6, r22
; CHECK-NEXT: sts 5, r21
%1 = extractvalue { i8, i32 } %a, 1
- store volatile i32 %1, i32* inttoptr (i64 5 to i32*)
+ store volatile i32 %1, ptr inttoptr (i64 5 to ptr)
ret void
}
@@ -21,16 +21,16 @@ define void @ret_void_args_struct_i8_i8_i8_i8({ i8, i8, i8, i8 } %a) {
start:
; CHECK: sts 4, r22
%0 = extractvalue { i8, i8, i8, i8 } %a, 0
- store volatile i8 %0, i8* inttoptr (i64 4 to i8*)
+ store volatile i8 %0, ptr inttoptr (i64 4 to ptr)
; CHECK-NEXT: sts 5, r23
%1 = extractvalue { i8, i8, i8, i8 } %a, 1
- store volatile i8 %1, i8* inttoptr (i64 5 to i8*)
+ store volatile i8 %1, ptr inttoptr (i64 5 to ptr)
; CHECK-NEXT: sts 6, r24
%2 = extractvalue { i8, i8, i8, i8 } %a, 2
- store volatile i8 %2, i8* inttoptr (i64 6 to i8*)
+ store volatile i8 %2, ptr inttoptr (i64 6 to ptr)
; CHECK-NEXT: sts 7, r25
%3 = extractvalue { i8, i8, i8, i8 } %a, 3
- store volatile i8 %3, i8* inttoptr (i64 7 to i8*)
+ store volatile i8 %3, ptr inttoptr (i64 7 to ptr)
ret void
}
@@ -42,16 +42,16 @@ start:
; CHECK-NEXT: sts 5, r19
; CHECK-NEXT: sts 4, r18
%0 = extractvalue { i32, i16, i8 } %a, 0
- store volatile i32 %0, i32* inttoptr (i64 4 to i32*)
+ store volatile i32 %0, ptr inttoptr (i64 4 to ptr)
; CHECK-NEXT: sts 5, r23
; CHECK-NEXT: sts 4, r22
%1 = extractvalue { i32, i16, i8 } %a, 1
- store volatile i16 %1, i16* inttoptr (i64 4 to i16*)
+ store volatile i16 %1, ptr inttoptr (i64 4 to ptr)
; CHECK-NEXT: sts 4, r24
%2 = extractvalue { i32, i16, i8 } %a, 2
- store volatile i8 %2, i8* inttoptr (i64 4 to i8*)
+ store volatile i8 %2, ptr inttoptr (i64 4 to ptr)
ret void
}
@@ -60,25 +60,25 @@ define void @ret_void_args_struct_i8_i32_struct_i32_i8({ i8, i32 } %a, { i32, i8
start:
; CHECK: sts 4, r20
%0 = extractvalue { i8, i32 } %a, 0
- store volatile i8 %0, i8* inttoptr (i64 4 to i8*)
+ store volatile i8 %0, ptr inttoptr (i64 4 to ptr)
; CHECK-NEXT: sts 8, r24
; CHECK-NEXT: sts 7, r23
; CHECK-NEXT: sts 6, r22
; CHECK-NEXT: sts 5, r21
%1 = extractvalue { i8, i32 } %a, 1
- store volatile i32 %1, i32* inttoptr (i64 5 to i32*)
+ store volatile i32 %1, ptr inttoptr (i64 5 to ptr)
; CHECK-NEXT: sts 9, r17
; CHECK-NEXT: sts 8, r16
; CHECK-NEXT: sts 7, r15
; CHECK-NEXT: sts 6, r14
%2 = extractvalue { i32, i8 } %b, 0
- store volatile i32 %2, i32* inttoptr (i64 6 to i32*)
+ store volatile i32 %2, ptr inttoptr (i64 6 to ptr)
; CHECK-NEXT: sts 7, r18
%3 = extractvalue { i32, i8 } %b, 1
- store volatile i8 %3, i8* inttoptr (i64 7 to i8*)
+ store volatile i8 %3, ptr inttoptr (i64 7 to ptr)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/calling-conv/c/stack.ll b/llvm/test/CodeGen/AVR/calling-conv/c/stack.ll
index bfe01ede85a75..ba2e65eb2bcba 100644
--- a/llvm/test/CodeGen/AVR/calling-conv/c/stack.ll
+++ b/llvm/test/CodeGen/AVR/calling-conv/c/stack.ll
@@ -27,7 +27,7 @@ define void @ret_void_args_i64_i64_i32(i64 %a, i64 %b, i32 %c) {
; Restore PTRREG Y
; CHECK-NEXT: pop r29
; CHECK-NEXT: pop r28
- store volatile i32 %c, i32* inttoptr (i64 4 to i32*)
+ store volatile i32 %c, ptr inttoptr (i64 4 to ptr)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/ctors.ll b/llvm/test/CodeGen/AVR/ctors.ll
index 728f188e553e3..1343a3e8de50b 100644
--- a/llvm/test/CodeGen/AVR/ctors.ll
+++ b/llvm/test/CodeGen/AVR/ctors.ll
@@ -9,7 +9,7 @@ define void @do_nothing() addrspace(1) #0 {
}
; CHECK: .globl __do_global_ctors
- at llvm.global_ctors = appending global [1 x { i32, void () addrspace(1)*, i8* }] [{ i32, void () addrspace(1)*, i8* } { i32 65535, void () addrspace(1)* @do_nothing, i8* null }]
+ at llvm.global_ctors = appending global [1 x { i32, ptr addrspace(1), ptr }] [{ i32, ptr addrspace(1), ptr } { i32 65535, ptr addrspace(1) @do_nothing, ptr null }]
; CHECK: .globl __do_global_dtors
- at llvm.global_dtors = appending global [1 x { i32, void () addrspace(1)*, i8* }] [{ i32, void () addrspace(1)*, i8* } { i32 65535, void () addrspace(1)* @do_nothing, i8* null }]
+ at llvm.global_dtors = appending global [1 x { i32, ptr addrspace(1), ptr }] [{ i32, ptr addrspace(1), ptr } { i32 65535, ptr addrspace(1) @do_nothing, ptr null }]
diff --git a/llvm/test/CodeGen/AVR/directmem.ll b/llvm/test/CodeGen/AVR/directmem.ll
index ded3f2146b93a..c3b5e1f528fba 100644
--- a/llvm/test/CodeGen/AVR/directmem.ll
+++ b/llvm/test/CodeGen/AVR/directmem.ll
@@ -25,7 +25,7 @@ define void @global8_store() {
; CHECK-TINY-LABEL: global8_store:
; CHECK-TINY: ldi [[REG:r[0-9]+]], 6
; CHECK-TINY: sts char, [[REG]]
- store i8 6, i8* @char
+ store i8 6, ptr @char
ret void
}
@@ -35,7 +35,7 @@ define i8 @global8_load() {
;
; CHECK-TINY-LABEL: global8_load:
; CHECK-TINY: lds r24, char
- %result = load i8, i8* @char
+ %result = load i8, ptr @char
ret i8 %result
}
@@ -51,9 +51,9 @@ define void @array8_store() {
; CHECK-TINY-LABEL: array8_store:
; CHECK-TINY: ldi [[REG1:r[0-9]+]], 3
; CHECK-TINY: sts char.array+2, [[REG1]]
- store i8 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 0)
- store i8 2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 1)
- store i8 3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 2)
+ store i8 1, ptr @char.array
+ store i8 2, ptr getelementptr inbounds ([3 x i8], ptr @char.array, i32 0, i64 1)
+ store i8 3, ptr getelementptr inbounds ([3 x i8], ptr @char.array, i32 0, i64 2)
ret void
}
@@ -63,7 +63,7 @@ define i8 @array8_load() {
;
; CHECK-TINY-LABEL: array8_load:
; CHECK-TINY: lds r24, char.array+2
- %result = load i8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 2)
+ %result = load i8, ptr getelementptr inbounds ([3 x i8], ptr @char.array, i32 0, i64 2)
ret i8 %result
}
@@ -77,9 +77,9 @@ define i8 @static8_inc() {
; CHECK-TINY: lds r24, char.static
; CHECK-TINY: inc r24
; CHECK-TINY: sts char.static, r24
- %1 = load i8, i8* @char.static
+ %1 = load i8, ptr @char.static
%inc = add nsw i8 %1, 1
- store i8 %inc, i8* @char.static
+ store i8 %inc, ptr @char.static
ret i8 %inc
}
@@ -89,7 +89,7 @@ define void @global16_store() {
; CHECK: ldi [[REG2:r[0-9]+]], 170
; CHECK: sts int+1, [[REG2]]
; CHECK: sts int, [[REG1]]
- store i16 43707, i16* @int
+ store i16 43707, ptr @int
ret void
}
@@ -97,7 +97,7 @@ define i16 @global16_load() {
; CHECK-LABEL: global16_load:
; CHECK: lds r24, int
; CHECK: lds r25, int+1
- %result = load i16, i16* @int
+ %result = load i16, ptr @int
ret i16 %result
}
@@ -118,9 +118,9 @@ define void @array16_store() {
; CHECK: ldi [[REG2:r[0-9]+]], 170
; CHECK: sts int.array+1, [[REG2]]
; CHECK: sts int.array, [[REG1]]
- store i16 43707, i16* getelementptr inbounds ([3 x i16], [3 x i16]* @int.array, i32 0, i64 0)
- store i16 43724, i16* getelementptr inbounds ([3 x i16], [3 x i16]* @int.array, i32 0, i64 1)
- store i16 43741, i16* getelementptr inbounds ([3 x i16], [3 x i16]* @int.array, i32 0, i64 2)
+ store i16 43707, ptr @int.array
+ store i16 43724, ptr getelementptr inbounds ([3 x i16], ptr @int.array, i32 0, i64 1)
+ store i16 43741, ptr getelementptr inbounds ([3 x i16], ptr @int.array, i32 0, i64 2)
ret void
}
@@ -128,7 +128,7 @@ define i16 @array16_load() {
; CHECK-LABEL: array16_load:
; CHECK: lds r24, int.array+4
; CHECK: lds r25, int.array+5
- %result = load i16, i16* getelementptr inbounds ([3 x i16], [3 x i16]* @int.array, i32 0, i64 2)
+ %result = load i16, ptr getelementptr inbounds ([3 x i16], ptr @int.array, i32 0, i64 2)
ret i16 %result
}
@@ -139,9 +139,9 @@ define i16 @static16_inc() {
; CHECK: adiw r24, 1
; CHECK: sts int.static+1, r25
; CHECK: sts int.static, r24
- %1 = load i16, i16* @int.static
+ %1 = load i16, ptr @int.static
%inc = add nsw i16 %1, 1
- store i16 %inc, i16* @int.static
+ store i16 %inc, ptr @int.static
ret i16 %inc
}
@@ -155,7 +155,7 @@ define void @global32_store() {
; CHECK: ldi [[REG2:r[0-9]+]], 204
; CHECK: sts long+1, [[REG2]]
; CHECK: sts long, [[REG1]]
- store i32 2864434397, i32* @long
+ store i32 2864434397, ptr @long
ret void
}
@@ -165,7 +165,7 @@ define i32 @global32_load() {
; CHECK: lds r23, long+1
; CHECK: lds r24, long+2
; CHECK: lds r25, long+3
- %result = load i32, i32* @long
+ %result = load i32, ptr @long
ret i32 %result
}
@@ -201,9 +201,9 @@ define void @array32_store() {
; CHECK: ldi [[REG2:r[0-9]+]], 13
; CHECK: sts long.array+1, [[REG2]]
; CHECK: sts long.array, [[REG1]]
- store i32 2887454020, i32* getelementptr inbounds ([3 x i32], [3 x i32]* @long.array, i32 0, i64 0)
- store i32 1432778632, i32* getelementptr inbounds ([3 x i32], [3 x i32]* @long.array, i32 0, i64 1)
- store i32 2578103244, i32* getelementptr inbounds ([3 x i32], [3 x i32]* @long.array, i32 0, i64 2)
+ store i32 2887454020, ptr @long.array
+ store i32 1432778632, ptr getelementptr inbounds ([3 x i32], ptr @long.array, i32 0, i64 1)
+ store i32 2578103244, ptr getelementptr inbounds ([3 x i32], ptr @long.array, i32 0, i64 2)
ret void
}
@@ -213,7 +213,7 @@ define i32 @array32_load() {
; CHECK: lds r23, long.array+9
; CHECK: lds r24, long.array+10
; CHECK: lds r25, long.array+11
- %result = load i32, i32* getelementptr inbounds ([3 x i32], [3 x i32]* @long.array, i32 0, i64 2)
+ %result = load i32, ptr getelementptr inbounds ([3 x i32], ptr @long.array, i32 0, i64 2)
ret i32 %result
}
@@ -231,9 +231,9 @@ define i32 @static32_inc() {
; CHECK-DAG: sts long.static+2, r24
; CHECK-DAG: sts long.static+1, r23
; CHECK-DAG: sts long.static, r22
- %1 = load i32, i32* @long.static
+ %1 = load i32, ptr @long.static
%inc = add nsw i32 %1, 1
- store i32 %inc, i32* @long.static
+ store i32 %inc, ptr @long.static
ret i32 %inc
}
@@ -255,7 +255,7 @@ define void @global64_store() {
; CHECK: ldi [[REG2:r[0-9]+]], 119
; CHECK: sts longlong+1, [[REG2]]
; CHECK: sts longlong, [[REG1]]
- store i64 1234605616436508552, i64* @longlong
+ store i64 1234605616436508552, ptr @longlong
ret void
}
@@ -269,7 +269,7 @@ define i64 @global64_load() {
; CHECK: lds r23, longlong+5
; CHECK: lds r24, longlong+6
; CHECK: lds r25, longlong+7
- %result = load i64, i64* @longlong
+ %result = load i64, ptr @longlong
ret i64 %result
}
@@ -291,9 +291,9 @@ define void @array64_store() {
; CHECK: ldi [[REG2:r[0-9]+]], 119
; CHECK: sts longlong.array+1, [[REG2]]
; CHECK: sts longlong.array, [[REG1]]
- store i64 1234605616436508552, i64* getelementptr inbounds ([3 x i64], [3 x i64]* @longlong.array, i64 0, i64 0)
- store i64 81985529216486895, i64* getelementptr inbounds ([3 x i64], [3 x i64]* @longlong.array, i64 0, i64 1)
- store i64 1836475854449306472, i64* getelementptr inbounds ([3 x i64], [3 x i64]* @longlong.array, i64 0, i64 2)
+ store i64 1234605616436508552, ptr @longlong.array
+ store i64 81985529216486895, ptr getelementptr inbounds ([3 x i64], ptr @longlong.array, i64 0, i64 1)
+ store i64 1836475854449306472, ptr getelementptr inbounds ([3 x i64], ptr @longlong.array, i64 0, i64 2)
ret void
}
@@ -307,7 +307,7 @@ define i64 @array64_load() {
; CHECK: lds r23, longlong.array+21
; CHECK: lds r24, longlong.array+22
; CHECK: lds r25, longlong.array+23
- %result = load i64, i64* getelementptr inbounds ([3 x i64], [3 x i64]* @longlong.array, i64 0, i64 2)
+ %result = load i64, ptr getelementptr inbounds ([3 x i64], ptr @longlong.array, i64 0, i64 2)
ret i64 %result
}
@@ -337,16 +337,16 @@ define i64 @static64_inc() {
; CHECK-DAG: sts longlong.static+2, r20
; CHECK-DAG: sts longlong.static+1, r19
; CHECK-DAG: sts longlong.static, r18
- %1 = load i64, i64* @longlong.static
+ %1 = load i64, ptr @longlong.static
%inc = add nsw i64 %1, 1
- store i64 %inc, i64* @longlong.static
+ store i64 %inc, ptr @longlong.static
ret i64 %inc
}
define i8 @constantaddr_read8() {
; CHECK-LABEL: constantaddr_read8:
; CHECK: lds r24, 1234
- %1 = load i8, i8* inttoptr (i16 1234 to i8*)
+ %1 = load i8, ptr inttoptr (i16 1234 to ptr)
ret i8 %1
}
@@ -354,14 +354,14 @@ define i16 @constantaddr_read16() {
; CHECK-LABEL: constantaddr_read16:
; CHECK: lds r24, 1234
; CHECK: lds r25, 1235
- %1 = load i16, i16* inttoptr (i16 1234 to i16*)
+ %1 = load i16, ptr inttoptr (i16 1234 to ptr)
ret i16 %1
}
define void @constantaddr_write8() {
; CHECK-LABEL: constantaddr_write8:
; CHECK: sts 1234
- store i8 22, i8* inttoptr (i16 1234 to i8*)
+ store i8 22, ptr inttoptr (i16 1234 to ptr)
ret void
}
@@ -369,6 +369,6 @@ define void @constantaddr_write16() {
; CHECK-LABEL: constantaddr_write16:
; CHECK: sts 1235
; CHECK: sts 1234
- store i16 2222, i16* inttoptr (i16 1234 to i16*)
+ store i16 2222, ptr inttoptr (i16 1234 to ptr)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/dynalloca.ll b/llvm/test/CodeGen/AVR/dynalloca.ll
index 28c743c5bdc67..79fe8b02885f5 100644
--- a/llvm/test/CodeGen/AVR/dynalloca.ll
+++ b/llvm/test/CodeGen/AVR/dynalloca.ll
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=avr | FileCheck %s
-declare void @foo(i16*, i16*, i8*)
+declare void @foo(ptr, ptr, ptr)
define void @test1(i16 %x) {
; CHECK-LABEL: test1:
@@ -33,18 +33,18 @@ define void @test1(i16 %x) {
%vla = alloca i16, i16 %x
%add = shl nsw i16 %x, 1
%vla1 = alloca i8, i16 %add
- %arrayidx = getelementptr inbounds [8 x i16], [8 x i16]* %a, i16 0, i16 2
- store i16 3, i16* %arrayidx
- %arrayidx2 = getelementptr inbounds i16, i16* %vla, i16 6
- store i16 4, i16* %arrayidx2
- %arrayidx3 = getelementptr inbounds i8, i8* %vla1, i16 7
- store i8 44, i8* %arrayidx3
- %arraydecay = getelementptr inbounds [8 x i16], [8 x i16]* %a, i16 0, i16 0
- call void @foo(i16* %arraydecay, i16* %vla, i8* %vla1)
+ %arrayidx = getelementptr inbounds [8 x i16], ptr %a, i16 0, i16 2
+ store i16 3, ptr %arrayidx
+ %arrayidx2 = getelementptr inbounds i16, ptr %vla, i16 6
+ store i16 4, ptr %arrayidx2
+ %arrayidx3 = getelementptr inbounds i8, ptr %vla1, i16 7
+ store i8 44, ptr %arrayidx3
+ %arraydecay = getelementptr inbounds [8 x i16], ptr %a, i16 0, i16 0
+ call void @foo(ptr %arraydecay, ptr %vla, ptr %vla1)
ret void
}
-declare void @foo2(i16*, i64, i64, i64)
+declare void @foo2(ptr, i64, i64, i64)
; Test that arguments are passed through pushes into the call instead of
; allocating the call frame space in the prologue. Also test that SP is restored
@@ -91,7 +91,7 @@ define void @dynalloca2(i16 %x) {
; CHECK-NEXT: out 63, r0
; CHECK-NEXT: out 61, r28
%vla = alloca i16, i16 %x
- call void @foo2(i16* %vla, i64 0, i64 0, i64 0)
+ call void @foo2(ptr %vla, i64 0, i64 0, i64 0)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/elpm.ll b/llvm/test/CodeGen/AVR/elpm.ll
index 21f956aa2cb9d..1122b1340419b 100644
--- a/llvm/test/CodeGen/AVR/elpm.ll
+++ b/llvm/test/CodeGen/AVR/elpm.ll
@@ -55,10 +55,10 @@ define i16 @foo0(i16 %a, i16 %b) {
; NOX-NEXT: sbc r25, r19
; NOX-NEXT: ret
entry:
- %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %a
- %0 = load i16, i16 addrspace(1)* %arrayidx, align 1
- %arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %b
- %1 = load i16, i16 addrspace(1)* %arrayidx1, align 1
+ %arrayidx = getelementptr inbounds [4 x i16], ptr addrspace(1) @arr0, i16 0, i16 %a
+ %0 = load i16, ptr addrspace(1) %arrayidx, align 1
+ %arrayidx1 = getelementptr inbounds [4 x i16], ptr addrspace(1) @arr0, i16 0, i16 %b
+ %1 = load i16, ptr addrspace(1) %arrayidx1, align 1
%sub = sub nsw i16 %0, %1
ret i16 %sub
}
@@ -114,10 +114,10 @@ define i16 @foo1(i16 %a, i16 %b) {
; NOX-NEXT: sbc r25, r21
; NOX-NEXT: ret
entry:
- %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %a
- %0 = load i16, i16 addrspace(1)* %arrayidx, align 1
- %arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(2)* @arr1, i16 0, i16 %b
- %1 = load i16, i16 addrspace(2)* %arrayidx1, align 1
+ %arrayidx = getelementptr inbounds [4 x i16], ptr addrspace(1) @arr0, i16 0, i16 %a
+ %0 = load i16, ptr addrspace(1) %arrayidx, align 1
+ %arrayidx1 = getelementptr inbounds [4 x i16], ptr addrspace(2) @arr1, i16 0, i16 %b
+ %1 = load i16, ptr addrspace(2) %arrayidx1, align 1
%sub = sub nsw i16 %0, %1
ret i16 %sub
}
@@ -173,10 +173,10 @@ define i16 @foo2(i16 %a, i16 %b) {
; NOX-NEXT: sbc r25, r19
; NOX-NEXT: ret
entry:
- %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(3)* @arr2, i16 0, i16 %a
- %0 = load i16, i16 addrspace(3)* %arrayidx, align 1
- %arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %b
- %1 = load i16, i16 addrspace(1)* %arrayidx1, align 1
+ %arrayidx = getelementptr inbounds [4 x i16], ptr addrspace(3) @arr2, i16 0, i16 %a
+ %0 = load i16, ptr addrspace(3) %arrayidx, align 1
+ %arrayidx1 = getelementptr inbounds [4 x i16], ptr addrspace(1) @arr0, i16 0, i16 %b
+ %1 = load i16, ptr addrspace(1) %arrayidx1, align 1
%sub = sub nsw i16 %0, %1
ret i16 %sub
}
@@ -236,10 +236,10 @@ define i16 @foo3(i16 %a, i16 %b) {
; NOX-NEXT: sbc r25, r21
; NOX-NEXT: ret
entry:
- %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(3)* @arr2, i16 0, i16 %a
- %0 = load i16, i16 addrspace(3)* %arrayidx, align 1
- %arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(2)* @arr1, i16 0, i16 %b
- %1 = load i16, i16 addrspace(2)* %arrayidx1, align 1
+ %arrayidx = getelementptr inbounds [4 x i16], ptr addrspace(3) @arr2, i16 0, i16 %a
+ %0 = load i16, ptr addrspace(3) %arrayidx, align 1
+ %arrayidx1 = getelementptr inbounds [4 x i16], ptr addrspace(2) @arr1, i16 0, i16 %b
+ %1 = load i16, ptr addrspace(2) %arrayidx1, align 1
%sub = sub nsw i16 %0, %1
ret i16 %sub
}
@@ -283,10 +283,10 @@ define signext i8 @foob0(i16 %a, i16 %b) {
; NOX-NEXT: sbc r25, r25
; NOX-NEXT: ret
entry:
- %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %a
- %0 = load i8, i8 addrspace(1)* %arrayidx, align 1
- %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %b
- %1 = load i8, i8 addrspace(1)* %arrayidx1, align 1
+ %arrayidx = getelementptr inbounds [4 x i8], ptr addrspace(1) @arrb1, i16 0, i16 %a
+ %0 = load i8, ptr addrspace(1) %arrayidx, align 1
+ %arrayidx1 = getelementptr inbounds [4 x i8], ptr addrspace(1) @arrb1, i16 0, i16 %b
+ %1 = load i8, ptr addrspace(1) %arrayidx1, align 1
%sub = sub i8 %0, %1
ret i8 %sub
}
@@ -330,10 +330,10 @@ define signext i8 @foob1(i16 %a, i16 %b) {
; NOX-NEXT: sbc r25, r25
; NOX-NEXT: ret
entry:
- %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %a
- %0 = load i8, i8 addrspace(1)* %arrayidx, align 1
- %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %b
- %1 = load i8, i8 addrspace(3)* %arrayidx1, align 1
+ %arrayidx = getelementptr inbounds [4 x i8], ptr addrspace(1) @arrb1, i16 0, i16 %a
+ %0 = load i8, ptr addrspace(1) %arrayidx, align 1
+ %arrayidx1 = getelementptr inbounds [4 x i8], ptr addrspace(3) @arrb3, i16 0, i16 %b
+ %1 = load i8, ptr addrspace(3) %arrayidx1, align 1
%sub = sub i8 %0, %1
ret i8 %sub
}
@@ -377,10 +377,10 @@ define signext i8 @foob2(i16 %a, i16 %b) {
; NOX-NEXT: sbc r25, r25
; NOX-NEXT: ret
entry:
- %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(5)* @arrb5, i16 0, i16 %a
- %0 = load i8, i8 addrspace(5)* %arrayidx, align 1
- %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %b
- %1 = load i8, i8 addrspace(1)* %arrayidx1, align 1
+ %arrayidx = getelementptr inbounds [4 x i8], ptr addrspace(5) @arrb5, i16 0, i16 %a
+ %0 = load i8, ptr addrspace(5) %arrayidx, align 1
+ %arrayidx1 = getelementptr inbounds [4 x i8], ptr addrspace(1) @arrb1, i16 0, i16 %b
+ %1 = load i8, ptr addrspace(1) %arrayidx1, align 1
%sub = sub i8 %0, %1
ret i8 %sub
}
@@ -428,10 +428,10 @@ define signext i8 @foob3(i16 %a, i16 %b) {
; NOX-NEXT: sbc r25, r25
; NOX-NEXT: ret
entry:
- %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %a
- %0 = load i8, i8 addrspace(3)* %arrayidx, align 1
- %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(5)* @arrb5, i16 0, i16 %b
- %1 = load i8, i8 addrspace(5)* %arrayidx1, align 1
+ %arrayidx = getelementptr inbounds [4 x i8], ptr addrspace(3) @arrb3, i16 0, i16 %a
+ %0 = load i8, ptr addrspace(3) %arrayidx, align 1
+ %arrayidx1 = getelementptr inbounds [4 x i8], ptr addrspace(5) @arrb5, i16 0, i16 %b
+ %1 = load i8, ptr addrspace(5) %arrayidx1, align 1
%sub = sub i8 %0, %1
ret i8 %sub
}
@@ -477,10 +477,10 @@ define signext i8 @foob4(i16 %a, i16 %b) {
; NOX-NEXT: sbc r25, r25
; NOX-NEXT: ret
entry:
- %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %a
- %0 = load i8, i8 addrspace(3)* %arrayidx, align 1
- %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %b
- %1 = load i8, i8 addrspace(3)* %arrayidx1, align 1
+ %arrayidx = getelementptr inbounds [4 x i8], ptr addrspace(3) @arrb3, i16 0, i16 %a
+ %0 = load i8, ptr addrspace(3) %arrayidx, align 1
+ %arrayidx1 = getelementptr inbounds [4 x i8], ptr addrspace(3) @arrb3, i16 0, i16 %b
+ %1 = load i8, ptr addrspace(3) %arrayidx1, align 1
%sub = sub i8 %0, %1
ret i8 %sub
}
diff --git a/llvm/test/CodeGen/AVR/features/avr-tiny.ll b/llvm/test/CodeGen/AVR/features/avr-tiny.ll
index a99e2ecc074ef..f21e0433ce598 100644
--- a/llvm/test/CodeGen/AVR/features/avr-tiny.ll
+++ b/llvm/test/CodeGen/AVR/features/avr-tiny.ll
@@ -29,7 +29,7 @@ define i8 @return_zero() {
ret i8 0
}
-define i8 @atomic_load8(i8* %foo) {
+define i8 @atomic_load8(ptr %foo) {
; CHECK-MEGA-LABEL: atomic_load8:
; CHECK-MEGA: ; %bb.0:
; CHECK-MEGA-NEXT: movw r26, r24
@@ -48,7 +48,7 @@ define i8 @atomic_load8(i8* %foo) {
; CHECK-NEXT: ld r24, X
; CHECK-NEXT: out 63, r16
; CHECK-NEXT: ret
- %val = load atomic i8, i8* %foo unordered, align 1
+ %val = load atomic i8, ptr %foo unordered, align 1
ret i8 %val
}
diff --git a/llvm/test/CodeGen/AVR/features/xmega_io.ll b/llvm/test/CodeGen/AVR/features/xmega_io.ll
index 713b2dec346a9..8d0b32b9edbdd 100644
--- a/llvm/test/CodeGen/AVR/features/xmega_io.ll
+++ b/llvm/test/CodeGen/AVR/features/xmega_io.ll
@@ -19,7 +19,7 @@ define i8 @read8_low_io() {
; CHECK-LABEL: read8_low_io
; XMEGA: in r24, 8
; AVR: lds r24, 8
- %1 = load i8, i8* inttoptr (i16 8 to i8*)
+ %1 = load i8, ptr inttoptr (i16 8 to ptr)
ret i8 %1
}
@@ -27,7 +27,7 @@ define i8 @read8_hi_io() {
; CHECK-LABEL: read8_hi_io
; XMEGA: in r24, 40
; AVR: in r24, 8
- %1 = load i8, i8* inttoptr (i16 40 to i8*)
+ %1 = load i8, ptr inttoptr (i16 40 to ptr)
ret i8 %1
}
@@ -35,7 +35,7 @@ define i8 @read8_maybe_io() {
; CHECK-LABEL: read8_maybe_io
; XMEGA: lds r24, 80
; AVR: in r24, 48
- %1 = load i8, i8* inttoptr (i16 80 to i8*)
+ %1 = load i8, ptr inttoptr (i16 80 to ptr)
ret i8 %1
}
@@ -43,6 +43,6 @@ define i8 @read8_not_io(){
; CHECK-LABEL: read8_not_io
; XMEGA: lds r24, 160
; AVR: lds r24, 160
- %1 = load i8, i8* inttoptr (i16 160 to i8*)
+ %1 = load i8, ptr inttoptr (i16 160 to ptr)
ret i8 %1
}
diff --git a/llvm/test/CodeGen/AVR/frmidx-iterator-bug.ll b/llvm/test/CodeGen/AVR/frmidx-iterator-bug.ll
index f9e2f0688fafb..3dfcfc9b99882 100644
--- a/llvm/test/CodeGen/AVR/frmidx-iterator-bug.ll
+++ b/llvm/test/CodeGen/AVR/frmidx-iterator-bug.ll
@@ -1,10 +1,10 @@
; RUN: llc < %s -march=avr -mattr=avr6 | FileCheck %s
-%str_slice = type { i8*, i16 }
+%str_slice = type { ptr, i16 }
%Machine = type { i16, [0 x i8], i16, [0 x i8], [16 x i8], [0 x i8] }
; CHECK-LABEL: step
-define void @step(%Machine*) {
+define void @step(ptr) {
ret void
}
@@ -12,22 +12,22 @@ define void @step(%Machine*) {
define void @main() {
start:
%machine = alloca %Machine, align 8
- %v0 = bitcast %Machine* %machine to i8*
- %v1 = getelementptr inbounds %Machine, %Machine* %machine, i16 0, i32 2
- %v2 = load i16, i16* %v1, align 2
+ %v0 = bitcast ptr %machine to ptr
+ %v1 = getelementptr inbounds %Machine, ptr %machine, i16 0, i32 2
+ %v2 = load i16, ptr %v1, align 2
br label %bb2.i5
bb2.i5:
- %v18 = load volatile i8, i8* inttoptr (i16 77 to i8*), align 1
+ %v18 = load volatile i8, ptr inttoptr (i16 77 to ptr), align 1
%v19 = icmp sgt i8 %v18, -1
br i1 %v19, label %bb2.i5, label %bb.exit6
bb.exit6:
- %v20 = load volatile i8, i8* inttoptr (i16 78 to i8*), align 2
+ %v20 = load volatile i8, ptr inttoptr (i16 78 to ptr), align 2
br label %bb7
bb7:
- call void @step(%Machine* %machine)
+ call void @step(ptr %machine)
br label %bb7
}
diff --git a/llvm/test/CodeGen/AVR/high-pressure-on-ptrregs.ll b/llvm/test/CodeGen/AVR/high-pressure-on-ptrregs.ll
index 9330ce1eb2ac1..fcc13da8e1e52 100644
--- a/llvm/test/CodeGen/AVR/high-pressure-on-ptrregs.ll
+++ b/llvm/test/CodeGen/AVR/high-pressure-on-ptrregs.ll
@@ -34,42 +34,42 @@
%struct.ss = type { i16, i16, i16 }
; CHECK-LABEL: loop
-define void @loop(%struct.ss* %x, %struct.ss** %y, i16 %z) #0 {
+define void @loop(ptr %x, ptr %y, i16 %z) #0 {
entry:
- %x.addr = alloca %struct.ss*, align 2
- %y.addr = alloca %struct.ss**, align 2
+ %x.addr = alloca ptr, align 2
+ %y.addr = alloca ptr, align 2
%z.addr = alloca i16, align 2
%i = alloca i16, align 2
- store %struct.ss* %x, %struct.ss** %x.addr, align 2
- store %struct.ss** %y, %struct.ss*** %y.addr, align 2
- store i16 %z, i16* %z.addr, align 2
- store i16 0, i16* %i, align 2
+ store ptr %x, ptr %x.addr, align 2
+ store ptr %y, ptr %y.addr, align 2
+ store i16 %z, ptr %z.addr, align 2
+ store i16 0, ptr %i, align 2
br label %for.cond
for.cond: ; preds = %for.inc, %entry
- %tmp = load i16, i16* %i, align 2
- %tmp1 = load i16, i16* %z.addr, align 2
+ %tmp = load i16, ptr %i, align 2
+ %tmp1 = load i16, ptr %z.addr, align 2
%cmp = icmp slt i16 %tmp, %tmp1
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
- %tmp2 = load %struct.ss**, %struct.ss*** %y.addr, align 2
- %tmp3 = load i16, i16* %i, align 2
- %arrayidx = getelementptr inbounds %struct.ss*, %struct.ss** %tmp2, i16 %tmp3
- %tmp4 = load %struct.ss*, %struct.ss** %arrayidx, align 2
- %b = getelementptr inbounds %struct.ss, %struct.ss* %tmp4, i32 0, i32 1
- %tmp5 = load i16, i16* %b, align 2
- %tmp6 = load %struct.ss*, %struct.ss** %x.addr, align 2
- %c = getelementptr inbounds %struct.ss, %struct.ss* %tmp6, i32 0, i32 2
- %tmp7 = load i16, i16* %c, align 2
+ %tmp2 = load ptr, ptr %y.addr, align 2
+ %tmp3 = load i16, ptr %i, align 2
+ %arrayidx = getelementptr inbounds ptr, ptr %tmp2, i16 %tmp3
+ %tmp4 = load ptr, ptr %arrayidx, align 2
+ %b = getelementptr inbounds %struct.ss, ptr %tmp4, i32 0, i32 1
+ %tmp5 = load i16, ptr %b, align 2
+ %tmp6 = load ptr, ptr %x.addr, align 2
+ %c = getelementptr inbounds %struct.ss, ptr %tmp6, i32 0, i32 2
+ %tmp7 = load i16, ptr %c, align 2
%add = add nsw i16 %tmp7, %tmp5
- store i16 %add, i16* %c, align 2
+ store i16 %add, ptr %c, align 2
br label %for.inc
for.inc: ; preds = %for.body
- %tmp8 = load i16, i16* %i, align 2
+ %tmp8 = load i16, ptr %i, align 2
%inc = add nsw i16 %tmp8, 1
- store i16 %inc, i16* %i, align 2
+ store i16 %inc, ptr %i, align 2
br label %for.cond
for.end: ; preds = %for.cond
diff --git a/llvm/test/CodeGen/AVR/icall-func-pointer-correct-addr-space.ll b/llvm/test/CodeGen/AVR/icall-func-pointer-correct-addr-space.ll
index a66ab6eaeca57..51b8f219a26d5 100644
--- a/llvm/test/CodeGen/AVR/icall-func-pointer-correct-addr-space.ll
+++ b/llvm/test/CodeGen/AVR/icall-func-pointer-correct-addr-space.ll
@@ -1,19 +1,19 @@
; RUN: llc -mattr=lpm,lpmw < %s -march=avr | FileCheck %s
- at callbackPtr = common global void (i16) addrspace(1)* null, align 8
- at myValuePtr = common global i16* null, align 8
+ at callbackPtr = common global ptr addrspace(1) null, align 8
+ at myValuePtr = common global ptr null, align 8
@externalConstant = external global i16, align 2
declare void @externalFunction(i16 signext)
-declare void @bar(i8 signext, void (i16)*, i16*)
+declare void @bar(i8 signext, ptr, ptr)
; CHECK-LABEL: loadCallbackPtr
define void @loadCallbackPtr() {
entry:
; CHECK: ldi r{{[0-9]+}}, pm_lo8(externalFunction)
; CHECK-NEXT: ldi r{{[0-9]+}}, pm_hi8(externalFunction)
- store void (i16) addrspace(1)* @externalFunction, void (i16) addrspace(1)** @callbackPtr, align 8
+ store ptr addrspace(1) @externalFunction, ptr @callbackPtr, align 8
ret void
}
@@ -22,6 +22,6 @@ define void @loadValuePtr() {
entry:
; CHECK: ldi r{{[0-9]+}}, lo8(externalConstant)
; CHECK-NEXT: ldi r{{[0-9]+}}, hi8(externalConstant)
- store i16* @externalConstant, i16** @myValuePtr, align 8
+ store ptr @externalConstant, ptr @myValuePtr, align 8
ret void
}
diff --git a/llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll b/llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll
index 6e8260fb4dcb4..416eb19c29db9 100644
--- a/llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll
+++ b/llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll
@@ -5,7 +5,7 @@
define void @foo(i16 %a) {
; CHECK: error: invalid operand in inline asm: 'jl ${0:l}'
%i.addr = alloca i32, align 4
- call void asm sideeffect "jl ${0:l}", "*m"(i32* elementtype(i32) %i.addr)
+ call void asm sideeffect "jl ${0:l}", "*m"(ptr elementtype(i32) %i.addr)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/inline-asm/inline-asm.ll b/llvm/test/CodeGen/AVR/inline-asm/inline-asm.ll
index 26f90806781ea..5c5588b73da47 100644
--- a/llvm/test/CodeGen/AVR/inline-asm/inline-asm.ll
+++ b/llvm/test/CodeGen/AVR/inline-asm/inline-asm.ll
@@ -164,14 +164,14 @@ define void @float_0_0() {
; CHECK-LABEL: mem_global:
define void @mem_global() {
; CHECK: some_instr {{X|Y|Z}}, {{X|Y|Z}}
- call void asm "some_instr $0, $1", "=*Q,=*Q"(i16* @a, i16* @b)
+ call void asm "some_instr $0, $1", "=*Q,=*Q"(ptr @a, ptr @b)
ret void
}
; CHECK-LABEL: mem_params:
-define void @mem_params(i16* %a, i16* %b) {
+define void @mem_params(ptr %a, ptr %b) {
; CHECK: some_instr {{X|Y|Z}}, {{X|Y|Z}}
- call void asm "some_instr $0, $1", "=*Q,=*Q"(i16* %a, i16* %b)
+ call void asm "some_instr $0, $1", "=*Q,=*Q"(ptr %a, ptr %b)
ret void
}
@@ -180,7 +180,7 @@ define void @mem_local() {
%a = alloca i16
%b = alloca i16
; CHECK: some_instr {{X|Y|Z}}+3, {{X|Y|Z}}+1
- call void asm "some_instr $0, $1", "=*Q,=*Q"(i16* %a, i16* %b)
+ call void asm "some_instr $0, $1", "=*Q,=*Q"(ptr %a, ptr %b)
ret void
}
@@ -189,16 +189,16 @@ define void @mem_mixed() {
%a = alloca i16
%b = alloca i16
; CHECK: some_instr {{X|Y|Z}}, {{X|Y|Z}}+3, {{X|Y|Z}}+1
- call void asm "some_instr $0, $1, $2", "=*Q,=*Q,=*Q"(i16* @a, i16* %a, i16* %b)
+ call void asm "some_instr $0, $1, $2", "=*Q,=*Q,=*Q"(ptr @a, ptr %a, ptr %b)
ret void
}
; CHECK-LABEL: mem_gep:
-define i8 @mem_gep(i8* %p) {
+define i8 @mem_gep(ptr %p) {
entry:
; CHECK: movw {{r[0-9]+}}, [[REG:r[0-9]+]]
- %arrayidx = getelementptr inbounds i8, i8* %p, i16 1
+ %arrayidx = getelementptr inbounds i8, ptr %p, i16 1
; CHECK: ld [[REG]], {{X|Y|Z}}+1
- %0 = tail call i8 asm sideeffect "ld $0, $1\0A\09", "=r,*Q"(i8* %arrayidx)
+ %0 = tail call i8 asm sideeffect "ld $0, $1\0A\09", "=r,*Q"(ptr %arrayidx)
ret i8 %0
}
diff --git a/llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll b/llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll
index bf25c74cbf38f..07839a43331f0 100644
--- a/llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll
+++ b/llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll
@@ -383,7 +383,7 @@ define void @add_xyz_i16(i16 signext %0, i16 signext %1) {
@gvar = global i16 0
-define i16* @ldi_dreg_symbol() {
+define ptr @ldi_dreg_symbol() {
; CHECK-LABEL: ldi_dreg_symbol:
; CHECK: ; %bb.0:
; CHECK-NEXT: ;APP
@@ -391,11 +391,11 @@ define i16* @ldi_dreg_symbol() {
; CHECK-NEXT: ldi r24, lo8(gvar)
; CHECK-NEXT: ;NO_APP
; CHECK-NEXT: ret
- %1 = tail call i16* asm sideeffect "ldi ${0:B}, hi8($1)\0A\09ldi ${0:A}, lo8($1)", "=d,i"(i16* @gvar)
- ret i16* %1
+ %1 = tail call ptr asm sideeffect "ldi ${0:B}, hi8($1)\0A\09ldi ${0:A}, lo8($1)", "=d,i"(ptr @gvar)
+ ret ptr %1
}
-define i16* @ldi_dreg_imm() {
+define ptr @ldi_dreg_imm() {
; CHECK-LABEL: ldi_dreg_imm:
; CHECK: ; %bb.0:
; CHECK-NEXT: ;APP
@@ -403,6 +403,6 @@ define i16* @ldi_dreg_imm() {
; CHECK-NEXT: ldi r24, lo8(2345)
; CHECK-NEXT: ;NO_APP
; CHECK-NEXT: ret
- %1 = tail call i16* asm sideeffect "ldi ${0:B}, hi8($1)\0A\09ldi ${0:A}, lo8($1)", "=d,i"(i16 2345)
- ret i16* %1
+ %1 = tail call ptr asm sideeffect "ldi ${0:B}, hi8($1)\0A\09ldi ${0:A}, lo8($1)", "=d,i"(i16 2345)
+ ret ptr %1
}
diff --git a/llvm/test/CodeGen/AVR/inline-asm/loadstore.ll b/llvm/test/CodeGen/AVR/inline-asm/loadstore.ll
index 9ec0906826c60..524fef28382fb 100644
--- a/llvm/test/CodeGen/AVR/inline-asm/loadstore.ll
+++ b/llvm/test/CodeGen/AVR/inline-asm/loadstore.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=avr | FileCheck %s
-define i8 @loadx(i8* %0) {
+define i8 @loadx(ptr %0) {
; CHECK-LABEL: loadx:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov r26, r24
@@ -10,11 +10,11 @@ define i8 @loadx(i8* %0) {
; CHECK-NEXT: ld r24, X
; CHECK-NEXT: ;NO_APP
; CHECK-NEXT: ret
- %2 = tail call i8 asm sideeffect "ld $0, ${1:a}", "=r,x"(i8* %0)
+ %2 = tail call i8 asm sideeffect "ld $0, ${1:a}", "=r,x"(ptr %0)
ret i8 %2
}
-define i8 @loady(i8* %0) {
+define i8 @loady(ptr %0) {
; CHECK-LABEL: loady:
; CHECK: ; %bb.0:
; CHECK-NEXT: push r28
@@ -27,11 +27,11 @@ define i8 @loady(i8* %0) {
; CHECK-NEXT: pop r29
; CHECK-NEXT: pop r28
; CHECK-NEXT: ret
- %2 = tail call i8 asm sideeffect "ld $0, ${1:a}", "=r,y"(i8* %0)
+ %2 = tail call i8 asm sideeffect "ld $0, ${1:a}", "=r,y"(ptr %0)
ret i8 %2
}
-define i8 @loadz(i8* %0) {
+define i8 @loadz(ptr %0) {
; CHECK-LABEL: loadz:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov r30, r24
@@ -40,11 +40,11 @@ define i8 @loadz(i8* %0) {
; CHECK-NEXT: ld r24, Z
; CHECK-NEXT: ;NO_APP
; CHECK-NEXT: ret
- %2 = tail call i8 asm sideeffect "ld $0, ${1:a}", "=r,z"(i8* %0)
+ %2 = tail call i8 asm sideeffect "ld $0, ${1:a}", "=r,z"(ptr %0)
ret i8 %2
}
-define void @storex(i8* %0, i8 %1) {
+define void @storex(ptr %0, i8 %1) {
; CHECK-LABEL: storex:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov r26, r24
@@ -53,11 +53,11 @@ define void @storex(i8* %0, i8 %1) {
; CHECK-NEXT: st X, r22
; CHECK-NEXT: ;NO_APP
; CHECK-NEXT: ret
- tail call void asm sideeffect "st ${0:a}, $1", "x,r"(i8* %0, i8 %1)
+ tail call void asm sideeffect "st ${0:a}, $1", "x,r"(ptr %0, i8 %1)
ret void
}
-define void @storey(i8* %0, i8 %1) {
+define void @storey(ptr %0, i8 %1) {
; CHECK-LABEL: storey:
; CHECK: ; %bb.0:
; CHECK-NEXT: push r28
@@ -70,11 +70,11 @@ define void @storey(i8* %0, i8 %1) {
; CHECK-NEXT: pop r29
; CHECK-NEXT: pop r28
; CHECK-NEXT: ret
- tail call void asm sideeffect "st ${0:a}, $1", "y,r"(i8* %0, i8 %1)
+ tail call void asm sideeffect "st ${0:a}, $1", "y,r"(ptr %0, i8 %1)
ret void
}
-define void @storez(i8* %0, i8 %1) {
+define void @storez(ptr %0, i8 %1) {
; CHECK-LABEL: storez:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov r30, r24
@@ -83,6 +83,6 @@ define void @storez(i8* %0, i8 %1) {
; CHECK-NEXT: st Z, r22
; CHECK-NEXT: ;NO_APP
; CHECK-NEXT: ret
- tail call void asm sideeffect "st ${0:a}, $1", "z,r"(i8* %0, i8 %1)
+ tail call void asm sideeffect "st ${0:a}, $1", "z,r"(ptr %0, i8 %1)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/integration/blink.ll b/llvm/test/CodeGen/AVR/integration/blink.ll
index 76d3d9ff75b97..6456ffa857d01 100644
--- a/llvm/test/CodeGen/AVR/integration/blink.ll
+++ b/llvm/test/CodeGen/AVR/integration/blink.ll
@@ -38,11 +38,11 @@ entry:
; CHECK: sbi 4, 5
; CHECK-NEXT: ret
- %0 = load volatile i8, i8* inttoptr (i16 36 to i8*), align 1
+ %0 = load volatile i8, ptr inttoptr (i16 36 to ptr), align 1
%conv = zext i8 %0 to i16
%or = or i16 %conv, 32
%conv1 = trunc i16 %or to i8
- store volatile i8 %conv1, i8* inttoptr (i16 36 to i8*), align 1
+ store volatile i8 %conv1, ptr inttoptr (i16 36 to ptr), align 1
ret void
}
@@ -55,11 +55,11 @@ entry:
; CHECK: sbi 5, 5
; CHECK-NEXT: ret
- %0 = load volatile i8, i8* inttoptr (i16 37 to i8*), align 1
+ %0 = load volatile i8, ptr inttoptr (i16 37 to ptr), align 1
%conv = zext i8 %0 to i16
%or = or i16 %conv, 32
%conv1 = trunc i16 %or to i8
- store volatile i8 %conv1, i8* inttoptr (i16 37 to i8*), align 1
+ store volatile i8 %conv1, ptr inttoptr (i16 37 to ptr), align 1
ret void
}
@@ -72,11 +72,11 @@ entry:
; CHECK: cbi 5, 5
; CHECK-NEXT: ret
- %0 = load volatile i8, i8* inttoptr (i16 37 to i8*), align 1
+ %0 = load volatile i8, ptr inttoptr (i16 37 to ptr), align 1
%conv = zext i8 %0 to i16
%and = and i16 %conv, -33
%conv1 = trunc i16 %and to i8
- store volatile i8 %conv1, i8* inttoptr (i16 37 to i8*), align 1
+ store volatile i8 %conv1, ptr inttoptr (i16 37 to ptr), align 1
ret void
}
diff --git a/llvm/test/CodeGen/AVR/interrupts.ll b/llvm/test/CodeGen/AVR/interrupts.ll
index f85acbf63d6b0..d344561f86814 100644
--- a/llvm/test/CodeGen/AVR/interrupts.ll
+++ b/llvm/test/CodeGen/AVR/interrupts.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=avr | FileCheck %s
@count = global i8 0
- at funcptr = global void () addrspace(1)* null
+ at funcptr = global ptr addrspace(1) null
define avr_intrcc void @interrupt_handler() {
; CHECK-LABEL: interrupt_handler:
@@ -101,9 +101,9 @@ define void @signal_handler_with_increment() #1 {
; CHECK-NEXT: out 63, r0
; CHECK-NEXT: pop r0
; CHECK-NEXT: reti
- %old = load volatile i8, i8* @count
+ %old = load volatile i8, ptr @count
%new = add i8 %old, 1
- store volatile i8 %new, i8* @count
+ store volatile i8 %new, ptr @count
ret void
}
@@ -214,7 +214,7 @@ define void @signal_handler_with_icall() #1 {
; CHECK-NEXT: out 63, r0
; CHECK-NEXT: pop r0
; CHECK-NEXT: reti
- %ptr = load volatile void() addrspace(1)*, void() addrspace(1)** @funcptr
+ %ptr = load volatile ptr addrspace(1), ptr @funcptr
call void %ptr()
ret void
}
diff --git a/llvm/test/CodeGen/AVR/intrinsics/stacksave-restore.ll b/llvm/test/CodeGen/AVR/intrinsics/stacksave-restore.ll
index 3985f49b92f59..5a86831416d7b 100644
--- a/llvm/test/CodeGen/AVR/intrinsics/stacksave-restore.ll
+++ b/llvm/test/CodeGen/AVR/intrinsics/stacksave-restore.ll
@@ -9,7 +9,7 @@ entry:
; CHECK: in [[SREG1:r[0-9]+]], 61
; CHECK-NEXT: in [[SREG2:r[0-9]+]], 62
save:
- %saved = call i8* @llvm.stacksave()
+ %saved = call ptr @llvm.stacksave()
br label %restore
; CHECK-LABEL: restore
@@ -19,9 +19,9 @@ save:
; CHECK-NEXT: out 63, r0
; CHECK-NEXT: out 61, [[SREG1]]
restore:
- call void @llvm.stackrestore(i8* %saved)
+ call void @llvm.stackrestore(ptr %saved)
ret void
}
-declare i8* @llvm.stacksave()
-declare void @llvm.stackrestore(i8* %ptr)
+declare ptr @llvm.stacksave()
+declare void @llvm.stackrestore(ptr %ptr)
diff --git a/llvm/test/CodeGen/AVR/io.ll b/llvm/test/CodeGen/AVR/io.ll
index b8b04a0e02464..ba8dd58f9bbef 100644
--- a/llvm/test/CodeGen/AVR/io.ll
+++ b/llvm/test/CodeGen/AVR/io.ll
@@ -3,7 +3,7 @@
define i8 @read8() {
; CHECK-LABEL: read8
; CHECK: in r24, 8
- %1 = load i8, i8* inttoptr (i16 40 to i8*)
+ %1 = load i8, ptr inttoptr (i16 40 to ptr)
ret i8 %1
}
@@ -11,7 +11,7 @@ define i16 @read16() {
; CHECK-LABEL: read16
; CHECK: in r24, 8
; CHECK: in r25, 9
- %1 = load i16, i16* inttoptr (i16 40 to i16*)
+ %1 = load i16, ptr inttoptr (i16 40 to ptr)
ret i16 %1
}
@@ -21,7 +21,7 @@ define i32 @read32() {
; CHECK: in r23, 9
; CHECK: in r24, 10
; CHECK: in r25, 11
- %1 = load i32, i32* inttoptr (i16 40 to i32*)
+ %1 = load i32, ptr inttoptr (i16 40 to ptr)
ret i32 %1
}
@@ -35,14 +35,14 @@ define i64 @read64() {
; CHECK: in r23, 13
; CHECK: in r24, 14
; CHECK: in r25, 15
- %1 = load i64, i64* inttoptr (i16 40 to i64*)
+ %1 = load i64, ptr inttoptr (i16 40 to ptr)
ret i64 %1
}
define void @write8() {
; CHECK-LABEL: write8
; CHECK: out 8
- store i8 22, i8* inttoptr (i16 40 to i8*)
+ store i8 22, ptr inttoptr (i16 40 to ptr)
ret void
}
@@ -50,7 +50,7 @@ define void @write16() {
; CHECK-LABEL: write16
; CHECK: out 9
; CHECK: out 8
- store i16 1234, i16* inttoptr (i16 40 to i16*)
+ store i16 1234, ptr inttoptr (i16 40 to ptr)
ret void
}
@@ -60,7 +60,7 @@ define void @write32() {
; CHECK: out 10
; CHECK: out 9
; CHECK: out 8
- store i32 12345678, i32* inttoptr (i16 40 to i32*)
+ store i32 12345678, ptr inttoptr (i16 40 to ptr)
ret void
}
@@ -74,24 +74,24 @@ define void @write64() {
; CHECK: out 10
; CHECK: out 9
; CHECK: out 8
- store i64 1234567891234567, i64* inttoptr (i16 40 to i64*)
+ store i64 1234567891234567, ptr inttoptr (i16 40 to ptr)
ret void
}
define void @sbi8() {
; CHECK-LABEL: sbi8
; CHECK: sbi 8, 5
- %1 = load i8, i8* inttoptr (i16 40 to i8*)
+ %1 = load i8, ptr inttoptr (i16 40 to ptr)
%or = or i8 %1, 32
- store i8 %or, i8* inttoptr (i16 40 to i8*)
+ store i8 %or, ptr inttoptr (i16 40 to ptr)
ret void
}
define void @cbi8() {
; CHECK-LABEL: cbi8
; CHECK: cbi 8, 5
- %1 = load volatile i8, i8* inttoptr (i16 40 to i8*)
+ %1 = load volatile i8, ptr inttoptr (i16 40 to ptr)
%and = and i8 %1, -33
- store volatile i8 %and, i8* inttoptr (i16 40 to i8*)
+ store volatile i8 %and, ptr inttoptr (i16 40 to ptr)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/issue-regalloc-stackframe-folding-earlyclobber.ll b/llvm/test/CodeGen/AVR/issue-regalloc-stackframe-folding-earlyclobber.ll
index 3800a5f373117..9064d62f8995e 100644
--- a/llvm/test/CodeGen/AVR/issue-regalloc-stackframe-folding-earlyclobber.ll
+++ b/llvm/test/CodeGen/AVR/issue-regalloc-stackframe-folding-earlyclobber.ll
@@ -16,7 +16,7 @@
@POW10TO128 = external constant [14 x i32], align 4
; CHECK: core_num_flt2dec_strategy_dragon
-define nonnull dereferenceable(164) %values* @core_num_flt2dec_strategy_dragon(%values* returned dereferenceable(164) %arg, i16 %arg1) unnamed_addr {
+define nonnull dereferenceable(164) ptr @core_num_flt2dec_strategy_dragon(ptr returned dereferenceable(164) %arg, i16 %arg1) unnamed_addr {
start:
%ret.i = alloca [40 x i32], align 4
%tmp = icmp eq i16 undef, 0
@@ -32,17 +32,17 @@ bb11:
unreachable
bb14:
- %tmp2 = bitcast [40 x i32]* %ret.i to i8*
- call void @llvm.memset.p0i8.i16(i8* align 4 %tmp2, i8 0, i16 160, i1 false)
- %tmp3 = getelementptr inbounds %values, %values* %arg, i16 0, i32 0
- %tmp4 = load i16, i16* %tmp3, align 2
+ %tmp2 = bitcast ptr %ret.i to ptr
+ call void @llvm.memset.p0.i16(ptr align 4 %tmp2, i8 0, i16 160, i1 false)
+ %tmp3 = getelementptr inbounds %values, ptr %arg, i16 0, i32 0
+ %tmp4 = load i16, ptr %tmp3, align 2
%tmp5 = icmp ult i16 %tmp4, 14
- %tmp6 = getelementptr inbounds %values, %values* %arg, i16 0, i32 2, i16 0
+ %tmp6 = getelementptr inbounds %values, ptr %arg, i16 0, i32 2, i16 0
br i1 %tmp5, label %bb2.i38, label %bb3.i39
bb2.i38:
- %tmp7 = getelementptr inbounds %values, %values* %arg, i16 0, i32 2, i16 %tmp4
- %tmp8 = ptrtoint i32* %tmp6 to i16
+ %tmp7 = getelementptr inbounds %values, ptr %arg, i16 0, i32 2, i16 %tmp4
+ %tmp8 = ptrtoint ptr %tmp6 to i16
br label %bb4.outer.i122
bb4.outer.i122:
@@ -52,14 +52,14 @@ bb4.outer.i122:
bb4.i125:
%iter.sroa.0.0.i123 = phi i16 [ %tmp12, %core.iter.Enumerate.ALPHA ], [ %iter.sroa.0.0.ph.i119, %bb4.outer.i122 ]
- %tmp9 = inttoptr i16 %iter.sroa.0.0.i123 to i32*
- %tmp10 = icmp eq i32* %tmp9, %tmp7
+ %tmp9 = inttoptr i16 %iter.sroa.0.0.i123 to ptr
+ %tmp10 = icmp eq ptr %tmp9, %tmp7
br i1 %tmp10, label %core.num.bignum.Big32x40.exit44, label %core.iter.Enumerate.ALPHA
core.iter.Enumerate.ALPHA:
- %tmp11 = getelementptr inbounds i32, i32* %tmp9, i16 1
- %tmp12 = ptrtoint i32* %tmp11 to i16
- %tmp13 = load i32, i32* %tmp9, align 4
+ %tmp11 = getelementptr inbounds i32, ptr %tmp9, i16 1
+ %tmp12 = ptrtoint ptr %tmp11 to i16
+ %tmp13 = load i32, ptr %tmp9, align 4
%tmp14 = icmp eq i32 %tmp13, 0
br i1 %tmp14, label %bb4.i125, label %core..iter..Enumerate.exit17
@@ -80,9 +80,9 @@ panic.i.i14.i134:
unreachable
core_slice_IndexMut.exit13:
- %tmp18 = load i32, i32* null, align 4
- %tmp19 = getelementptr inbounds [40 x i32], [40 x i32]* %ret.i, i16 0, i16 undef
- %tmp20 = load i32, i32* %tmp19, align 4
+ %tmp18 = load i32, ptr null, align 4
+ %tmp19 = getelementptr inbounds [40 x i32], ptr %ret.i, i16 0, i16 undef
+ %tmp20 = load i32, ptr %tmp19, align 4
%tmp21 = zext i32 %tmp18 to i64
%tmp22 = mul nuw i64 %tmp21, %tmp15
%tmp23 = zext i32 %tmp20 to i64
@@ -91,7 +91,7 @@ core_slice_IndexMut.exit13:
%tmp26 = add i64 %tmp25, %tmp22
%tmp27 = lshr i64 %tmp26, 32
%tmp28 = trunc i64 %tmp27 to i32
- %tmp29 = icmp eq i32* undef, getelementptr inbounds ([14 x i32], [14 x i32]* @POW10TO128, i16 1, i16 0)
+ %tmp29 = icmp eq ptr undef, getelementptr inbounds ([14 x i32], ptr @POW10TO128, i16 1, i16 0)
br i1 %tmp29, label %bb16.i133, label %core..iter..Enumerate.exit17.i132
bb21.i136:
@@ -102,7 +102,7 @@ panic.i.i.i137:
unreachable
"_ZN4core5slice70_$LT$impl$u20$core..ops..IndexMut$LT$I$GT$$u20$for$u20$$u5b$T$u5d$$GT$9index_mut17h8eccc0af1ec6f971E.exit.i138":
- store i32 %tmp28, i32* undef, align 4
+ store i32 %tmp28, ptr undef, align 4
br label %bb24.i141
bb24.i141:
@@ -113,13 +113,13 @@ bb24.i141:
br label %bb4.outer.i122
bb3.i39:
- %tmp33 = call fastcc i16 @_ZN4core3num6bignum8Big32x4010mul_digits9mul_inner17h5d3461bce04d16ccE([40 x i32]* nonnull dereferenceable(160) %ret.i, i32* noalias nonnull readonly getelementptr inbounds ([14 x i32], [14 x i32]* @POW10TO128, i16 0, i16 0), i16 14, i32* noalias nonnull readonly %tmp6, i16 %tmp4)
+ %tmp33 = call fastcc i16 @_ZN4core3num6bignum8Big32x4010mul_digits9mul_inner17h5d3461bce04d16ccE(ptr nonnull dereferenceable(160) %ret.i, ptr noalias nonnull readonly @POW10TO128, i16 14, ptr noalias nonnull readonly %tmp6, i16 %tmp4)
br label %core.num.bignum.Big32x40.exit44
core.num.bignum.Big32x40.exit44:
%retsz.0.i40 = phi i16 [ %tmp33, %bb3.i39 ], [ %retsz.0.ph.i121, %bb4.i125 ]
- call void @llvm.memcpy.p0i8.p0i8.i16(i8* align 4 undef, i8* align 4 %tmp2, i16 160, i1 false)
- store i16 %retsz.0.i40, i16* %tmp3, align 2
+ call void @llvm.memcpy.p0.p0.i16(ptr align 4 undef, ptr align 4 %tmp2, i16 160, i1 false)
+ store i16 %retsz.0.i40, ptr %tmp3, align 2
%tmp34 = and i16 %arg1, 256
%tmp35 = icmp eq i16 %tmp34, 0
br i1 %tmp35, label %bb30, label %bb27
@@ -128,12 +128,12 @@ bb27:
unreachable
bb30:
- ret %values* %arg
+ ret ptr %arg
}
-declare fastcc i16 @_ZN4core3num6bignum8Big32x4010mul_digits9mul_inner17h5d3461bce04d16ccE([40 x i32]* nocapture dereferenceable(160), i32* noalias nonnull readonly, i16, i32* noalias nonnull readonly, i16)
+declare fastcc i16 @_ZN4core3num6bignum8Big32x4010mul_digits9mul_inner17h5d3461bce04d16ccE(ptr nocapture dereferenceable(160), ptr noalias nonnull readonly, i16, ptr noalias nonnull readonly, i16)
-declare void @llvm.memset.p0i8.i16(i8* nocapture writeonly, i8, i16, i1)
+declare void @llvm.memset.p0.i16(ptr nocapture writeonly, i8, i16, i1)
-declare void @llvm.memcpy.p0i8.p0i8.i16(i8* nocapture writeonly, i8* nocapture readonly, i16, i1)
+declare void @llvm.memcpy.p0.p0.i16(ptr nocapture writeonly, ptr nocapture readonly, i16, i1)
diff --git a/llvm/test/CodeGen/AVR/load.ll b/llvm/test/CodeGen/AVR/load.ll
index efc7549adb651..320ffb34a2c0e 100644
--- a/llvm/test/CodeGen/AVR/load.ll
+++ b/llvm/test/CodeGen/AVR/load.ll
@@ -1,61 +1,61 @@
; RUN: llc -mattr=avr6,sram < %s -march=avr -verify-machineinstrs | FileCheck %s
-define i8 @load8(i8* %x) {
+define i8 @load8(ptr %x) {
; CHECK-LABEL: load8:
; CHECK: ld r24, {{[XYZ]}}
- %1 = load i8, i8* %x
+ %1 = load i8, ptr %x
ret i8 %1
}
-define i16 @load16(i16* %x) {
+define i16 @load16(ptr %x) {
; CHECK-LABEL: load16:
; CHECK: ld r24, [[PTR:[YZ]]]
; CHECK: ldd r25, [[PTR]]+1
- %1 = load i16, i16* %x
+ %1 = load i16, ptr %x
ret i16 %1
}
-define i8 @load8disp(i8* %x) {
+define i8 @load8disp(ptr %x) {
; CHECK-LABEL: load8disp:
; CHECK: ldd r24, {{[YZ]}}+63
- %1 = getelementptr inbounds i8, i8* %x, i64 63
- %2 = load i8, i8* %1
+ %1 = getelementptr inbounds i8, ptr %x, i64 63
+ %2 = load i8, ptr %1
ret i8 %2
}
-define i8 @load8nodisp(i8* %x) {
+define i8 @load8nodisp(ptr %x) {
; CHECK-LABEL: load8nodisp:
; CHECK: movw r26, r24
; CHECK: subi r26, 192
; CHECK: sbci r27, 255
; CHECK: ld r24, {{[XYZ]}}
- %1 = getelementptr inbounds i8, i8* %x, i64 64
- %2 = load i8, i8* %1
+ %1 = getelementptr inbounds i8, ptr %x, i64 64
+ %2 = load i8, ptr %1
ret i8 %2
}
-define i16 @load16disp(i16* %x) {
+define i16 @load16disp(ptr %x) {
; CHECK-LABEL: load16disp:
; CHECK: ldd r24, [[PTR:[YZ]]]+62
; CHECK: ldd r25, [[PTR]]+63
- %1 = getelementptr inbounds i16, i16* %x, i64 31
- %2 = load i16, i16* %1
+ %1 = getelementptr inbounds i16, ptr %x, i64 31
+ %2 = load i16, ptr %1
ret i16 %2
}
-define i16 @load16nodisp(i16* %x) {
+define i16 @load16nodisp(ptr %x) {
; CHECK-LABEL: load16nodisp:
; CHECK: subi r24, 192
; CHECK: sbci r25, 255
; CHECK: movw r30, r24
; CHECK: ld r24, [[PTR:[YZ]]]
; CHECK: ldd r25, [[PTR]]+1
- %1 = getelementptr inbounds i16, i16* %x, i64 32
- %2 = load i16, i16* %1
+ %1 = getelementptr inbounds i16, ptr %x, i64 32
+ %2 = load i16, ptr %1
ret i16 %2
}
-define i8 @load8postinc(i8* %x, i8 %y) {
+define i8 @load8postinc(ptr %x, i8 %y) {
; CHECK-LABEL: load8postinc:
; CHECK: ld {{.*}}, {{[XYZ]}}+
entry:
@@ -64,10 +64,10 @@ entry:
while.body: ; preds = %entry, %while.body
%r.09 = phi i8 [ %add, %while.body ], [ 0, %entry ]
%y.addr.08 = phi i8 [ %dec, %while.body ], [ %y, %entry ]
- %x.addr.07 = phi i8* [ %incdec.ptr, %while.body ], [ %x, %entry ]
+ %x.addr.07 = phi ptr [ %incdec.ptr, %while.body ], [ %x, %entry ]
%dec = add i8 %y.addr.08, -1
- %incdec.ptr = getelementptr inbounds i8, i8* %x.addr.07, i16 1
- %0 = load i8, i8* %x.addr.07
+ %incdec.ptr = getelementptr inbounds i8, ptr %x.addr.07, i16 1
+ %0 = load i8, ptr %x.addr.07
%add = add i8 %0, %r.09
%tobool = icmp eq i8 %dec, 0
br i1 %tobool, label %while.end, label %while.body
@@ -76,7 +76,7 @@ while.end: ; preds = %while.body, %entry
ret i8 %r.0.lcssa
}
-define i16 @load16postinc(i16* %x, i16 %y) {
+define i16 @load16postinc(ptr %x, i16 %y) {
; CHECK-LABEL: load16postinc:
; CHECK: ld {{.*}}, {{[XYZ]}}+
; CHECK: ld {{.*}}, {{[XYZ]}}+
@@ -86,10 +86,10 @@ entry:
while.body: ; preds = %entry, %while.body
%r.05 = phi i16 [ %add, %while.body ], [ 0, %entry ]
%y.addr.04 = phi i16 [ %dec, %while.body ], [ %y, %entry ]
- %x.addr.03 = phi i16* [ %incdec.ptr, %while.body ], [ %x, %entry ]
+ %x.addr.03 = phi ptr [ %incdec.ptr, %while.body ], [ %x, %entry ]
%dec = add nsw i16 %y.addr.04, -1
- %incdec.ptr = getelementptr inbounds i16, i16* %x.addr.03, i16 1
- %0 = load i16, i16* %x.addr.03
+ %incdec.ptr = getelementptr inbounds i16, ptr %x.addr.03, i16 1
+ %0 = load i16, ptr %x.addr.03
%add = add nsw i16 %0, %r.05
%tobool = icmp eq i16 %dec, 0
br i1 %tobool, label %while.end, label %while.body
@@ -98,7 +98,7 @@ while.end: ; preds = %while.body, %entry
ret i16 %r.0.lcssa
}
-define i8 @load8predec(i8* %x, i8 %y) {
+define i8 @load8predec(ptr %x, i8 %y) {
; CHECK-LABEL: load8predec:
; CHECK: ld {{.*}}, -{{[XYZ]}}
entry:
@@ -107,10 +107,10 @@ entry:
while.body: ; preds = %entry, %while.body
%r.09 = phi i8 [ %add, %while.body ], [ 0, %entry ]
%y.addr.08 = phi i8 [ %dec, %while.body ], [ %y, %entry ]
- %x.addr.07 = phi i8* [ %incdec.ptr, %while.body ], [ %x, %entry ]
+ %x.addr.07 = phi ptr [ %incdec.ptr, %while.body ], [ %x, %entry ]
%dec = add i8 %y.addr.08, -1
- %incdec.ptr = getelementptr inbounds i8, i8* %x.addr.07, i16 -1
- %0 = load i8, i8* %incdec.ptr
+ %incdec.ptr = getelementptr inbounds i8, ptr %x.addr.07, i16 -1
+ %0 = load i8, ptr %incdec.ptr
%add = add i8 %0, %r.09
%tobool = icmp eq i8 %dec, 0
br i1 %tobool, label %while.end, label %while.body
@@ -119,7 +119,7 @@ while.end: ; preds = %while.body, %entry
ret i8 %r.0.lcssa
}
-define i16 @load16predec(i16* %x, i16 %y) {
+define i16 @load16predec(ptr %x, i16 %y) {
; CHECK-LABEL: load16predec:
; CHECK: ld {{.*}}, -{{[XYZ]}}
; CHECK: ld {{.*}}, -{{[XYZ]}}
@@ -129,10 +129,10 @@ entry:
while.body: ; preds = %entry, %while.body
%r.05 = phi i16 [ %add, %while.body ], [ 0, %entry ]
%y.addr.04 = phi i16 [ %dec, %while.body ], [ %y, %entry ]
- %x.addr.03 = phi i16* [ %incdec.ptr, %while.body ], [ %x, %entry ]
+ %x.addr.03 = phi ptr [ %incdec.ptr, %while.body ], [ %x, %entry ]
%dec = add nsw i16 %y.addr.04, -1
- %incdec.ptr = getelementptr inbounds i16, i16* %x.addr.03, i16 -1
- %0 = load i16, i16* %incdec.ptr
+ %incdec.ptr = getelementptr inbounds i16, ptr %x.addr.03, i16 -1
+ %0 = load i16, ptr %incdec.ptr
%add = add nsw i16 %0, %r.05
%tobool = icmp eq i16 %dec, 0
br i1 %tobool, label %while.end, label %while.body
diff --git a/llvm/test/CodeGen/AVR/lpmx.ll b/llvm/test/CodeGen/AVR/lpmx.ll
index db8fdb458d01c..135bcb756754b 100644
--- a/llvm/test/CodeGen/AVR/lpmx.ll
+++ b/llvm/test/CodeGen/AVR/lpmx.ll
@@ -72,10 +72,10 @@ define i16 @foo0(i16 %a) addrspace(1) {
; CHECK-O3-NEXT: ret
entry:
%a.addr = alloca i16, align 1
- store i16 %a, i16* %a.addr, align 1
- %0 = load i16, i16* %a.addr, align 1
- %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %0
- %1 = load i16, i16 addrspace(1)* %arrayidx, align 1
+ store i16 %a, ptr %a.addr, align 1
+ %0 = load i16, ptr %a.addr, align 1
+ %arrayidx = getelementptr inbounds [4 x i16], ptr addrspace(1) @arr0, i16 0, i16 %0
+ %1 = load i16, ptr addrspace(1) %arrayidx, align 1
ret i16 %1
}
@@ -138,9 +138,9 @@ define i8 @foo1(i16 %a) addrspace(1) {
; CHECK-O3-NEXT: ret
entry:
%a.addr = alloca i16, align 1
- store i16 %a, i16* %a.addr, align 1
- %0 = load i16, i16* %a.addr, align 1
- %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arr1, i16 0, i16 %0
- %1 = load i8, i8 addrspace(1)* %arrayidx, align 1
+ store i16 %a, ptr %a.addr, align 1
+ %0 = load i16, ptr %a.addr, align 1
+ %arrayidx = getelementptr inbounds [4 x i8], ptr addrspace(1) @arr1, i16 0, i16 %0
+ %1 = load i8, ptr addrspace(1) %arrayidx, align 1
ret i8 %1
}
diff --git a/llvm/test/CodeGen/AVR/pr43443-ctor-alias.ll b/llvm/test/CodeGen/AVR/pr43443-ctor-alias.ll
index 9175e8c73fe78..71c3ca662e158 100644
--- a/llvm/test/CodeGen/AVR/pr43443-ctor-alias.ll
+++ b/llvm/test/CodeGen/AVR/pr43443-ctor-alias.ll
@@ -13,11 +13,11 @@
@f2 = global %struct.foo zeroinitializer
- at llvm.global_ctors = appending global [1 x { i32, void () addrspace(1)*, i8* }] [{ i32, void () addrspace(1)*, i8* } { i32 65535, void () addrspace(1)* @_GLOBAL__sub_I_failed.cc, i8* null }]
+ at llvm.global_ctors = appending global [1 x { i32, ptr addrspace(1), ptr }] [{ i32, ptr addrspace(1), ptr } { i32 65535, ptr addrspace(1) @_GLOBAL__sub_I_failed.cc, ptr null }]
- at _ZN3fooC1Ev = alias void (%struct.foo*), void (%struct.foo*) addrspace(1)* @_ZN3fooC2Ev
+ at _ZN3fooC1Ev = alias void (ptr), ptr addrspace(1) @_ZN3fooC2Ev
-define void @_ZN3fooC2Ev(%struct.foo* dereferenceable(1) %this) {
+define void @_ZN3fooC2Ev(ptr dereferenceable(1) %this) {
; CHECK-LABEL: _ZN3fooC2Ev:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: push r28
@@ -42,9 +42,9 @@ define void @_ZN3fooC2Ev(%struct.foo* dereferenceable(1) %this) {
; CHECK-NEXT: pop r28
; CHECK-NEXT: ret
entry:
- %this.addr = alloca %struct.foo*
- store %struct.foo* %this, %struct.foo** %this.addr
- %this1 = load %struct.foo*, %struct.foo** %this.addr
+ %this.addr = alloca ptr
+ store ptr %this, ptr %this.addr
+ %this1 = load ptr, ptr %this.addr
ret void
}
@@ -56,7 +56,7 @@ define internal void @__cxx_global_var_init() addrspace(1) {
; CHECK-NEXT: call _ZN3fooC1Ev
; CHECK-NEXT: ret
entry:
- call addrspace(1) void @_ZN3fooC1Ev(%struct.foo* dereferenceable(1) @f2)
+ call addrspace(1) void @_ZN3fooC1Ev(ptr dereferenceable(1) @f2)
ret void
}
diff --git a/llvm/test/CodeGen/AVR/progmem-extended.ll b/llvm/test/CodeGen/AVR/progmem-extended.ll
index c4c474e366c7d..ce2bcc80cc3a9 100644
--- a/llvm/test/CodeGen/AVR/progmem-extended.ll
+++ b/llvm/test/CodeGen/AVR/progmem-extended.ll
@@ -5,23 +5,23 @@
; Tests the extended LPM instructions (LPMW, LPM Rd, Z+).
-define i8 @test8(i8 addrspace(1)* %p) {
+define i8 @test8(ptr addrspace(1) %p) {
; CHECK-LABEL: test8:
; CHECK: movw r30, r24
; CHECK: lpm r24, Z
- %1 = load i8, i8 addrspace(1)* %p
+ %1 = load i8, ptr addrspace(1) %p
ret i8 %1
}
-define i16 @test16(i16 addrspace(1)* %p) {
+define i16 @test16(ptr addrspace(1) %p) {
; CHECK-LABEL: test16:
; CHECK: movw r30, r24
; CHECK: lpmw r24, Z
- %1 = load i16, i16 addrspace(1)* %p
+ %1 = load i16, ptr addrspace(1) %p
ret i16 %1
}
-define i8 @test8postinc(i8 addrspace(1)* %x, i8 %y) {
+define i8 @test8postinc(ptr addrspace(1) %x, i8 %y) {
; CHECK-LABEL: test8postinc:
; CHECK: movw r30, r24
; CHECK: lpm {{.*}}, Z+
@@ -32,9 +32,9 @@ entry:
for.body: ; preds = %entry, %for.body
%ret.013 = phi i8 [ %add, %for.body ], [ 0, %entry ]
%i.012 = phi i8 [ %inc, %for.body ], [ 0, %entry ]
- %x.addr.011 = phi i8 addrspace(1)* [ %incdec.ptr, %for.body ], [ %x, %entry ]
- %incdec.ptr = getelementptr inbounds i8, i8 addrspace(1)* %x.addr.011, i16 1
- %0 = load i8, i8 addrspace(1)* %x.addr.011
+ %x.addr.011 = phi ptr addrspace(1) [ %incdec.ptr, %for.body ], [ %x, %entry ]
+ %incdec.ptr = getelementptr inbounds i8, ptr addrspace(1) %x.addr.011, i16 1
+ %0 = load i8, ptr addrspace(1) %x.addr.011
%add = add i8 %0, %ret.013
%inc = add i8 %i.012, 1
%exitcond = icmp eq i8 %inc, %y
@@ -45,7 +45,7 @@ for.end: ; preds = %for.body, %entry
ret i8 %ret.0.lcssa
}
-define i16 @test16postinc(i16 addrspace(1)* %x, i8 %y) {
+define i16 @test16postinc(ptr addrspace(1) %x, i8 %y) {
; CHECK-LABEL: test16postinc:
; CHECK: movw r30, r24
; CHECK: lpmw {{.*}}, Z+
@@ -56,9 +56,9 @@ entry:
for.body: ; preds = %entry, %for.body
%ret.08 = phi i16 [ %add, %for.body ], [ 0, %entry ]
%i.07 = phi i8 [ %inc, %for.body ], [ 0, %entry ]
- %x.addr.06 = phi i16 addrspace(1)* [ %incdec.ptr, %for.body ], [ %x, %entry ]
- %incdec.ptr = getelementptr inbounds i16, i16 addrspace(1)* %x.addr.06, i16 1
- %0 = load i16, i16 addrspace(1)* %x.addr.06
+ %x.addr.06 = phi ptr addrspace(1) [ %incdec.ptr, %for.body ], [ %x, %entry ]
+ %incdec.ptr = getelementptr inbounds i16, ptr addrspace(1) %x.addr.06, i16 1
+ %0 = load i16, ptr addrspace(1) %x.addr.06
%add = add nsw i16 %0, %ret.08
%inc = add i8 %i.07, 1
%exitcond = icmp eq i8 %inc, %y
diff --git a/llvm/test/CodeGen/AVR/progmem.ll b/llvm/test/CodeGen/AVR/progmem.ll
index 07d21834f1eef..40edc1aa6f0d9 100644
--- a/llvm/test/CodeGen/AVR/progmem.ll
+++ b/llvm/test/CodeGen/AVR/progmem.ll
@@ -3,24 +3,24 @@
; Tests the standard LPM instruction
-define i8 @test8(i8 addrspace(1)* %p) {
+define i8 @test8(ptr addrspace(1) %p) {
; CHECK-LABEL: test8:
; CHECK: movw r30, r24
; CHECK: lpm r24, Z
- %1 = load i8, i8 addrspace(1)* %p
+ %1 = load i8, ptr addrspace(1) %p
ret i8 %1
}
-define i16 @test16(i16 addrspace(1)* %p) {
+define i16 @test16(ptr addrspace(1) %p) {
; CHECK-LABEL: test16:
; CHECK: movw r30, r24
; CHECK: lpm r24, Z+
; CHECK: lpm r25, Z+
- %1 = load i16, i16 addrspace(1)* %p
+ %1 = load i16, ptr addrspace(1) %p
ret i16 %1
}
-define i8 @test8postinc(i8 addrspace(1)* %x, i8 %y) {
+define i8 @test8postinc(ptr addrspace(1) %x, i8 %y) {
; CHECK-LABEL: test8postinc:
; CHECK: movw r30, r24
; CHECK: lpm {{.*}}, Z+
@@ -31,9 +31,9 @@ entry:
for.body: ; preds = %entry, %for.body
%ret.013 = phi i8 [ %add, %for.body ], [ 0, %entry ]
%i.012 = phi i8 [ %inc, %for.body ], [ 0, %entry ]
- %x.addr.011 = phi i8 addrspace(1)* [ %incdec.ptr, %for.body ], [ %x, %entry ]
- %incdec.ptr = getelementptr inbounds i8, i8 addrspace(1)* %x.addr.011, i16 1
- %0 = load i8, i8 addrspace(1)* %x.addr.011
+ %x.addr.011 = phi ptr addrspace(1) [ %incdec.ptr, %for.body ], [ %x, %entry ]
+ %incdec.ptr = getelementptr inbounds i8, ptr addrspace(1) %x.addr.011, i16 1
+ %0 = load i8, ptr addrspace(1) %x.addr.011
%add = add i8 %0, %ret.013
%inc = add i8 %i.012, 1
%exitcond = icmp eq i8 %inc, %y
@@ -44,7 +44,7 @@ for.end: ; preds = %for.body, %entry
ret i8 %ret.0.lcssa
}
-define i16 @test16postinc(i16 addrspace(1)* %x, i8 %y) {
+define i16 @test16postinc(ptr addrspace(1) %x, i8 %y) {
; CHECK-LABEL: test16postinc:
; CHECK: movw r30, r24
; CHECK: lpm {{.*}}, Z+
@@ -56,9 +56,9 @@ entry:
for.body: ; preds = %entry, %for.body
%ret.08 = phi i16 [ %add, %for.body ], [ 0, %entry ]
%i.07 = phi i8 [ %inc, %for.body ], [ 0, %entry ]
- %x.addr.06 = phi i16 addrspace(1)* [ %incdec.ptr, %for.body ], [ %x, %entry ]
- %incdec.ptr = getelementptr inbounds i16, i16 addrspace(1)* %x.addr.06, i16 1
- %0 = load i16, i16 addrspace(1)* %x.addr.06
+ %x.addr.06 = phi ptr addrspace(1) [ %incdec.ptr, %for.body ], [ %x, %entry ]
+ %incdec.ptr = getelementptr inbounds i16, ptr addrspace(1) %x.addr.06, i16 1
+ %0 = load i16, ptr addrspace(1) %x.addr.06
%add = add nsw i16 %0, %ret.08
%inc = add i8 %i.07, 1
%exitcond = icmp eq i8 %inc, %y
diff --git a/llvm/test/CodeGen/AVR/rust-avr-bug-112.ll b/llvm/test/CodeGen/AVR/rust-avr-bug-112.ll
index 7cf14330cdc1e..033ee88d7d9e8 100644
--- a/llvm/test/CodeGen/AVR/rust-avr-bug-112.ll
+++ b/llvm/test/CodeGen/AVR/rust-avr-bug-112.ll
@@ -21,7 +21,7 @@
; The logic has since been fixed.
; CHECK-LABEL: "core::str::slice_error_fail"
-define void @"core::str::slice_error_fail"(i16 %arg) personality i32 (...) addrspace(1)* @rust_eh_personality {
+define void @"core::str::slice_error_fail"(i16 %arg) personality ptr addrspace(1) @rust_eh_personality {
start:
%char_range = alloca { i16, i16 }, align 1
br i1 undef, label %"<core::option::Option<T>>::unwrap.exit.thread", label %bb11.i.i
@@ -30,17 +30,17 @@ start:
br label %"core::char::methods::<impl char>::len_utf8.exit"
bb11.i.i:
- %tmp = bitcast { i16, i16 }* %char_range to i8*
+ %tmp = bitcast ptr %char_range to ptr
%tmp1 = icmp ult i32 undef, 65536
%..i = select i1 %tmp1, i16 3, i16 4
br label %"core::char::methods::<impl char>::len_utf8.exit"
"core::char::methods::<impl char>::len_utf8.exit":
- %tmp2 = phi i8* [ %tmp, %bb11.i.i ], [ undef, %"<core::option::Option<T>>::unwrap.exit.thread" ]
+ %tmp2 = phi ptr [ %tmp, %bb11.i.i ], [ undef, %"<core::option::Option<T>>::unwrap.exit.thread" ]
%_0.0.i12 = phi i16 [ %..i, %bb11.i.i ], [ 1, %"<core::option::Option<T>>::unwrap.exit.thread" ]
%tmp3 = add i16 %_0.0.i12, %arg
- store i16 %tmp3, i16* undef, align 1
- store i8* %tmp2, i8** undef, align 1
+ store i16 %tmp3, ptr undef, align 1
+ store ptr %tmp2, ptr undef, align 1
unreachable
}
diff --git a/llvm/test/CodeGen/AVR/rust-avr-bug-37.ll b/llvm/test/CodeGen/AVR/rust-avr-bug-37.ll
index 1229bbdf57344..bb9597f9cabff 100644
--- a/llvm/test/CodeGen/AVR/rust-avr-bug-37.ll
+++ b/llvm/test/CodeGen/AVR/rust-avr-bug-37.ll
@@ -1,22 +1,22 @@
; RUN: llc < %s -march=avr | FileCheck %s
-%"fmt::Formatter" = type { i32, { i8*, void (i8*)** } }
+%"fmt::Formatter" = type { i32, { ptr, ptr } }
@str.1b = external constant [0 x i8]
-define void @"TryFromIntError::Debug"(%"fmt::Formatter"* dereferenceable(32)) unnamed_addr #0 personality i32 (...) addrspace(1)* @rust_eh_personality {
+define void @"TryFromIntError::Debug"(ptr dereferenceable(32)) unnamed_addr #0 personality ptr addrspace(1) @rust_eh_personality {
; CHECK-LABEL: "TryFromIntError::Debug"
start:
%builder = alloca i8, align 8
- %1 = getelementptr inbounds %"fmt::Formatter", %"fmt::Formatter"* %0, i16 0, i32 1
- %2 = bitcast { i8*, void (i8*)** }* %1 to {}**
- %3 = load {}*, {}** %2, align 2
- %4 = getelementptr inbounds %"fmt::Formatter", %"fmt::Formatter"* %0, i16 0, i32 1, i32 1
- %5 = load void (i8*)**, void (i8*)*** %4, align 2
- %6 = getelementptr inbounds void (i8*)*, void (i8*)** %5, i16 3
- %7 = bitcast void (i8*)** %6 to i8 ({}*, i8*, i16) addrspace(1)**
- %8 = load i8 ({}*, i8*, i16) addrspace(1)*, i8 ({}*, i8*, i16) addrspace(1)** %7, align 2
- %9 = tail call i8 %8({}* nonnull %3, i8* noalias nonnull readonly getelementptr inbounds ([0 x i8], [0 x i8]* @str.1b, i16 0, i16 0), i16 15)
+ %1 = getelementptr inbounds %"fmt::Formatter", ptr %0, i16 0, i32 1
+ %2 = bitcast ptr %1 to ptr
+ %3 = load ptr, ptr %2, align 2
+ %4 = getelementptr inbounds %"fmt::Formatter", ptr %0, i16 0, i32 1, i32 1
+ %5 = load ptr, ptr %4, align 2
+ %6 = getelementptr inbounds ptr, ptr %5, i16 3
+ %7 = bitcast ptr %6 to ptr
+ %8 = load ptr addrspace(1), ptr %7, align 2
+ %9 = tail call i8 %8(ptr nonnull %3, ptr noalias nonnull readonly @str.1b, i16 15)
unreachable
}
diff --git a/llvm/test/CodeGen/AVR/rust-avr-bug-95.ll b/llvm/test/CodeGen/AVR/rust-avr-bug-95.ll
index 1ada7daa8ddb3..0b9924b02feda 100644
--- a/llvm/test/CodeGen/AVR/rust-avr-bug-95.ll
+++ b/llvm/test/CodeGen/AVR/rust-avr-bug-95.ll
@@ -1,22 +1,22 @@
; RUN: llc < %s -march=avr | FileCheck %s
-%"fmt::Formatter.1.77.153.229.305.381.1673" = type { [0 x i8], i32, [0 x i8], i32, [0 x i8], i8, [0 x i8], %"option::Option<usize>.0.76.152.228.304.380.1672", [0 x i8], %"option::Option<usize>.0.76.152.228.304.380.1672", [0 x i8], { {}*, {}* }, [0 x i8], { i8*, i8* }, [0 x i8], { [0 x { i8*, i8* }]*, i16 }, [0 x i8] }
+%"fmt::Formatter.1.77.153.229.305.381.1673" = type { [0 x i8], i32, [0 x i8], i32, [0 x i8], i8, [0 x i8], %"option::Option<usize>.0.76.152.228.304.380.1672", [0 x i8], %"option::Option<usize>.0.76.152.228.304.380.1672", [0 x i8], { ptr, ptr }, [0 x i8], { ptr, ptr }, [0 x i8], { ptr, i16 }, [0 x i8] }
%"option::Option<usize>.0.76.152.228.304.380.1672" = type { [0 x i8], i8, [2 x i8] }
@str.4S = external constant [5 x i8]
; Function Attrs: uwtable
-define void @"_ZN65_$LT$lib..str..Chars$LT$$u27$a$GT$$u20$as$u20$lib..fmt..Debug$GT$3fmt17h76a537e22649f739E"(%"fmt::Formatter.1.77.153.229.305.381.1673"* dereferenceable(27) %__arg_0) unnamed_addr #0 personality i32 (...) addrspace(1)* @rust_eh_personality {
+define void @"_ZN65_$LT$lib..str..Chars$LT$$u27$a$GT$$u20$as$u20$lib..fmt..Debug$GT$3fmt17h76a537e22649f739E"(ptr dereferenceable(27) %__arg_0) unnamed_addr #0 personality ptr addrspace(1) @rust_eh_personality {
; CHECK-LABEL: "_ZN65_$LT$lib..str..Chars$LT$$u27$a$GT$$u20$as$u20$lib..fmt..Debug$GT$3fmt17h76a537e22649f739E"
start:
- %0 = getelementptr inbounds %"fmt::Formatter.1.77.153.229.305.381.1673", %"fmt::Formatter.1.77.153.229.305.381.1673"* %__arg_0, i16 0, i32 11, i32 0
- %1 = load {}*, {}** %0, align 1, !noalias !0, !nonnull !9
- %2 = getelementptr inbounds %"fmt::Formatter.1.77.153.229.305.381.1673", %"fmt::Formatter.1.77.153.229.305.381.1673"* %__arg_0, i16 0, i32 11, i32 1
- %3 = bitcast {}** %2 to i1 ({}*, [0 x i8]*, i16) addrspace(1)***
- %4 = load i1 ({}*, [0 x i8]*, i16) addrspace(1)**, i1 ({}*, [0 x i8]*, i16) addrspace(1)*** %3, align 1, !noalias !0, !nonnull !9
- %5 = getelementptr inbounds i1 ({}*, [0 x i8]*, i16) addrspace(1)*, i1 ({}*, [0 x i8]*, i16) addrspace(1)** %4, i16 3
- %6 = load i1 ({}*, [0 x i8]*, i16) addrspace(1)*, i1 ({}*, [0 x i8]*, i16) addrspace(1)** %5, align 1, !invariant.load !9, !noalias !0, !nonnull !9
- %7 = tail call zeroext i1 %6({}* nonnull %1, [0 x i8]* noalias nonnull readonly bitcast ([5 x i8]* @str.4S to [0 x i8]*), i16 5), !noalias !10
+ %0 = getelementptr inbounds %"fmt::Formatter.1.77.153.229.305.381.1673", ptr %__arg_0, i16 0, i32 11, i32 0
+ %1 = load ptr, ptr %0, align 1, !noalias !0, !nonnull !9
+ %2 = getelementptr inbounds %"fmt::Formatter.1.77.153.229.305.381.1673", ptr %__arg_0, i16 0, i32 11, i32 1
+ %3 = bitcast ptr %2 to ptr
+ %4 = load ptr, ptr %3, align 1, !noalias !0, !nonnull !9
+ %5 = getelementptr inbounds ptr addrspace(1), ptr %4, i16 3
+ %6 = load ptr addrspace(1), ptr %5, align 1, !invariant.load !9, !noalias !0, !nonnull !9
+ %7 = tail call zeroext i1 %6(ptr nonnull %1, ptr noalias nonnull readonly @str.4S, i16 5), !noalias !10
unreachable
}
diff --git a/llvm/test/CodeGen/AVR/rust-avr-bug-99.ll b/llvm/test/CodeGen/AVR/rust-avr-bug-99.ll
index 640b2cc97c45d..8620ab3b442bc 100644
--- a/llvm/test/CodeGen/AVR/rust-avr-bug-99.ll
+++ b/llvm/test/CodeGen/AVR/rust-avr-bug-99.ll
@@ -13,17 +13,17 @@
%struct.quux.1 = type { [0 x i8], %struct.wombat, [0 x i8], i64, [0 x i8], i64, [0 x i8], i16, [0 x i8], %struct.quux, [0 x i8], i64, [0 x i8], i16, [0 x i8] }
%struct.wombat = type {}
-declare zeroext i1 @zot(%struct.quux*, %struct.foo*)
+declare zeroext i1 @zot(ptr, ptr)
declare void @wibble(i16, i16)
; CHECK-LABEL: main
-define zeroext i1 @main(%struct.quux.1* %arg, %struct.foo* %arg62) {
+define zeroext i1 @main(ptr %arg, ptr %arg62) {
bb:
%tmp63 = alloca [128 x i8], align 1
- %tmp = getelementptr inbounds %struct.quux.1, %struct.quux.1* %arg, i16 0, i32 5
- %tmp64 = getelementptr inbounds %struct.quux.1, %struct.quux.1* %arg, i16 0, i32 13
- %tmp65 = bitcast %struct.foo* %arg62 to i32*
+ %tmp = getelementptr inbounds %struct.quux.1, ptr %arg, i16 0, i32 5
+ %tmp64 = getelementptr inbounds %struct.quux.1, ptr %arg, i16 0, i32 13
+ %tmp65 = bitcast ptr %arg62 to ptr
%tmp66 = icmp eq i32 undef, 0
br i1 undef, label %bb92, label %bb67
@@ -31,21 +31,21 @@ bb67:
br i1 %tmp66, label %bb83, label %bb68
bb68:
- %tmp69 = load i64, i64* null, align 1
+ %tmp69 = load i64, ptr null, align 1
br label %bb70
bb70:
%tmp71 = phi i16 [ 128, %bb68 ], [ %tmp79, %bb70 ]
%tmp72 = phi i64 [ %tmp69, %bb68 ], [ %tmp74, %bb70 ]
- %tmp73 = getelementptr inbounds i8, i8* null, i16 -1
+ %tmp73 = getelementptr inbounds i8, ptr null, i16 -1
%tmp74 = lshr i64 %tmp72, 4
%tmp75 = trunc i64 %tmp72 to i8
%tmp76 = and i8 %tmp75, 15
%tmp77 = add nuw nsw i8 %tmp76, 87
%tmp78 = select i1 undef, i8 undef, i8 %tmp77
- store i8 %tmp78, i8* %tmp73, align 1
+ store i8 %tmp78, ptr %tmp73, align 1
%tmp79 = add nsw i16 %tmp71, -1
- %tmp80 = icmp eq i8* %tmp73, null
+ %tmp80 = icmp eq ptr %tmp73, null
%tmp81 = or i1 undef, %tmp80
br i1 %tmp81, label %bb82, label %bb70
@@ -55,7 +55,7 @@ bb82:
bb83:
%tmp84 = icmp eq i32 undef, 0
- %tmp85 = load i64, i64* null, align 1
+ %tmp85 = load i64, ptr null, align 1
br i1 %tmp84, label %bb87, label %bb86
bb86:
@@ -105,12 +105,12 @@ bb105:
bb106:
%tmp107 = phi i16 [ 128, %bb105 ], [ %tmp113, %bb106 ]
%tmp108 = phi i64 [ undef, %bb105 ], [ %tmp111, %bb106 ]
- %tmp109 = phi i8* [ undef, %bb105 ], [ %tmp110, %bb106 ]
- %tmp110 = getelementptr inbounds i8, i8* %tmp109, i16 -1
+ %tmp109 = phi ptr [ undef, %bb105 ], [ %tmp110, %bb106 ]
+ %tmp110 = getelementptr inbounds i8, ptr %tmp109, i16 -1
%tmp111 = lshr i64 %tmp108, 4
%tmp112 = trunc i64 %tmp108 to i8
%tmp113 = add nsw i16 %tmp107, -1
- %tmp114 = icmp eq i8* %tmp110, null
+ %tmp114 = icmp eq ptr %tmp110, null
%tmp115 = or i1 undef, %tmp114
br i1 %tmp115, label %bb116, label %bb106
@@ -119,7 +119,7 @@ bb116:
unreachable
bb117:
- %tmp118 = load i64, i64* %tmp, align 1
+ %tmp118 = load i64, ptr %tmp, align 1
br i1 undef, label %bb120, label %bb119
bb119:
@@ -139,7 +139,7 @@ bb123:
br label %bb123
bb127:
- %tmp128 = load i32, i32* %tmp65, align 1
+ %tmp128 = load i32, ptr %tmp65, align 1
%tmp129 = icmp eq i32 undef, 0
br label %bb162
@@ -156,8 +156,8 @@ bb132:
%tmp136 = and i8 %tmp135, 15
%tmp137 = add nuw nsw i8 %tmp136, 87
%tmp138 = select i1 undef, i8 undef, i8 %tmp137
- store i8 %tmp138, i8* undef, align 1
- %tmp139 = icmp eq i8* undef, null
+ store i8 %tmp138, ptr undef, align 1
+ %tmp139 = icmp eq ptr undef, null
%tmp140 = or i1 undef, %tmp139
br i1 %tmp140, label %bb141, label %bb132
@@ -166,7 +166,7 @@ bb141:
bb142:
%tmp143 = icmp eq i32 undef, 0
- %tmp144 = load i64, i64* %tmp, align 1
+ %tmp144 = load i64, ptr %tmp, align 1
br i1 %tmp143, label %bb156, label %bb145
bb145:
@@ -175,11 +175,11 @@ bb145:
bb146:
%tmp147 = phi i16 [ 128, %bb145 ], [ %tmp151, %bb146 ]
%tmp148 = phi i64 [ %tmp144, %bb145 ], [ %tmp150, %bb146 ]
- %tmp149 = getelementptr inbounds i8, i8* null, i16 -1
+ %tmp149 = getelementptr inbounds i8, ptr null, i16 -1
%tmp150 = lshr i64 %tmp148, 4
%tmp151 = add nsw i16 %tmp147, -1
%tmp152 = icmp eq i64 %tmp150, 0
- %tmp153 = icmp eq i8* %tmp149, null
+ %tmp153 = icmp eq ptr %tmp149, null
%tmp154 = or i1 %tmp152, %tmp153
br i1 %tmp154, label %bb155, label %bb146
@@ -223,17 +223,17 @@ bb170:
br i1 undef, label %bb172, label %bb171
bb171:
- store i32 0, i32* undef, align 1
- call void @llvm.memcpy.p0i8.p0i8.i16(i8* align 1 undef, i8* align 1 null, i16 3, i1 false)
- call void @llvm.memcpy.p0i8.p0i8.i16(i8* align 1 undef, i8* align 1 null, i16 3, i1 false)
+ store i32 0, ptr undef, align 1
+ call void @llvm.memcpy.p0.p0.i16(ptr align 1 undef, ptr align 1 null, i16 3, i1 false)
+ call void @llvm.memcpy.p0.p0.i16(ptr align 1 undef, ptr align 1 null, i16 3, i1 false)
br label %bb214
bb172:
- %tmp173 = call zeroext i1 @zot(%struct.quux* noalias nonnull readonly dereferenceable(32) undef, %struct.foo* nonnull dereferenceable(15) %arg62)
+ %tmp173 = call zeroext i1 @zot(ptr noalias nonnull readonly dereferenceable(32) undef, ptr nonnull dereferenceable(15) %arg62)
br i1 %tmp173, label %bb214, label %bb174
bb174:
- %tmp175 = load i32, i32* %tmp65, align 1
+ %tmp175 = load i32, ptr %tmp65, align 1
%tmp176 = icmp eq i32 undef, 0
br label %bb177
@@ -241,7 +241,7 @@ bb177:
br i1 %tmp176, label %bb190, label %bb178
bb178:
- %tmp179 = getelementptr inbounds [128 x i8], [128 x i8]* %tmp63, i16 0, i16 0
+ %tmp179 = getelementptr inbounds [128 x i8], ptr %tmp63, i16 0, i16 0
br label %bb180
bb180:
@@ -251,8 +251,8 @@ bb180:
%tmp184 = and i8 %tmp183, 15
%tmp185 = add nuw nsw i8 %tmp184, 87
%tmp186 = select i1 false, i8 0, i8 %tmp185
- store i8 %tmp186, i8* null, align 1
- %tmp187 = icmp eq i8* null, %tmp179
+ store i8 %tmp186, ptr null, align 1
+ %tmp187 = icmp eq ptr null, %tmp179
%tmp188 = or i1 undef, %tmp187
br i1 %tmp188, label %bb189, label %bb180
@@ -296,8 +296,8 @@ bb207:
br label %bb208
bb208:
- store i16* %tmp64, i16** undef, align 1
- %tmp209 = load i32, i32* %tmp65, align 1
+ store ptr %tmp64, ptr undef, align 1
+ %tmp209 = load i32, ptr %tmp65, align 1
%tmp210 = icmp eq i32 undef, 0
%tmp211 = and i32 %tmp209, 16
%tmp212 = icmp eq i32 %tmp211, 0
@@ -328,9 +328,9 @@ bb220:
unreachable
bb221:
- store %struct.quux.1* %arg, %struct.quux.1** undef, align 1
+ store ptr %arg, ptr undef, align 1
ret i1 undef
}
-declare void @llvm.memcpy.p0i8.p0i8.i16(i8* nocapture writeonly, i8* nocapture readonly, i16, i1)
+declare void @llvm.memcpy.p0.p0.i16(ptr nocapture writeonly, ptr nocapture readonly, i16, i1)
diff --git a/llvm/test/CodeGen/AVR/rust-trait-object.ll b/llvm/test/CodeGen/AVR/rust-trait-object.ll
index 87142cb11d841..48e3cbf9208d3 100644
--- a/llvm/test/CodeGen/AVR/rust-trait-object.ll
+++ b/llvm/test/CodeGen/AVR/rust-trait-object.ll
@@ -19,16 +19,16 @@
; CHECK-OBJ-NEXT: 01 00 00 00
; CHECK-OBJ-NEXT: R_AVR_16_PM .text
@vtable.0 = private constant {
- void (%TraitObjectA*) addrspace(1)*,
+ ptr addrspace(1),
i16,
i16,
- i8 (%TraitObjectA*) addrspace(1)*
+ ptr addrspace(1)
} {
- void (%TraitObjectA*) addrspace(1)*
+ ptr addrspace(1)
@drop_in_place2,
i16 0,
i16 1,
- i8 (%TraitObjectA*) addrspace(1)*
+ ptr addrspace(1)
@trait_fn2
}, align 1
@@ -45,16 +45,16 @@
; CHECK-OBJ-NEXT: 01 00 00 00
; CHECK-OBJ-NEXT: R_AVR_16_PM .text
@vtable.1 = private constant {
- void (%TraitObjectA*) addrspace(1)*,
+ ptr addrspace(1),
i16,
i16,
- i8 (%TraitObjectA*) addrspace(1)*
+ ptr addrspace(1)
} {
- void (%TraitObjectA*) addrspace(1)*
+ ptr addrspace(1)
@drop_in_place1,
i16 0,
i16 1,
- i8 (%TraitObjectA*) addrspace(1)*
+ ptr addrspace(1)
@trait_fn1
}, align 1
@@ -62,49 +62,39 @@ define internal fastcc i8 @TraitObjectA_method(i1 zeroext %choice) addrspace(1)
start:
%b = alloca %TraitObjectA, align 1
- %c = select i1 %choice, [3 x i16]* bitcast ({
- void (%TraitObjectA*) addrspace(1)*,
- i16,
- i16,
- i8 (%TraitObjectA*) addrspace(1)*
- }* @vtable.0 to [3 x i16]*),
- [3 x i16]* bitcast ({
- void (%TraitObjectA*) addrspace(1)*,
- i16,
- i16,
- i8 (%TraitObjectA*) addrspace(1)*
- }* @vtable.1 to [3 x i16]*)
- %b2 = bitcast %TraitObjectA* %b to {}*
+ %c = select i1 %choice, ptr @vtable.0,
+ ptr @vtable.1
+ %b2 = bitcast ptr %b to ptr
- %res = call fastcc addrspace(1) i8 @call_trait_object({}* nonnull align 1 %b2, [3 x i16]* noalias readonly align 1 dereferenceable(6) %c)
+ %res = call fastcc addrspace(1) i8 @call_trait_object(ptr nonnull align 1 %b2, ptr noalias readonly align 1 dereferenceable(6) %c)
ret i8 %res
}
-define internal fastcc i8 @call_trait_object({}* nonnull align 1 %a, [3 x i16]* noalias nocapture readonly align 1 dereferenceable(6) %b) addrspace(1) {
+define internal fastcc i8 @call_trait_object(ptr nonnull align 1 %a, ptr noalias nocapture readonly align 1 dereferenceable(6) %b) addrspace(1) {
start:
- %b2 = getelementptr inbounds [3 x i16], [3 x i16]* %b, i16 0, i16 3
- %c = bitcast i16* %b2 to i8 ({}*) addrspace(1)**
- %d = load i8 ({}*) addrspace(1)*, i8 ({}*) addrspace(1)** %c, align 1, !invariant.load !1, !nonnull !1
- %res = tail call addrspace(1) i8 %d({}* nonnull align 1 %a)
+ %b2 = getelementptr inbounds [3 x i16], ptr %b, i16 0, i16 3
+ %c = bitcast ptr %b2 to ptr
+ %d = load ptr addrspace(1), ptr %c, align 1, !invariant.load !1, !nonnull !1
+ %res = tail call addrspace(1) i8 %d(ptr nonnull align 1 %a)
ret i8 %res
}
-define internal void @drop_in_place1(%TraitObjectA* nocapture %a) addrspace(1) {
+define internal void @drop_in_place1(ptr nocapture %a) addrspace(1) {
start:
ret void
}
-define internal i8 @trait_fn1(%TraitObjectA* noalias nocapture nonnull readonly align 1 %self) addrspace(1) {
+define internal i8 @trait_fn1(ptr noalias nocapture nonnull readonly align 1 %self) addrspace(1) {
start:
ret i8 89
}
-define internal void @drop_in_place2(%TraitObjectA* nocapture %a) addrspace(1) {
+define internal void @drop_in_place2(ptr nocapture %a) addrspace(1) {
start:
ret void
}
-define internal i8 @trait_fn2(%TraitObjectA* noalias nocapture nonnull readonly align 1 %self) addrspace(1) {
+define internal i8 @trait_fn2(ptr noalias nocapture nonnull readonly align 1 %self) addrspace(1) {
start:
ret i8 79
}
diff --git a/llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll b/llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll
index 5580e3ae9731d..9f6fd5521f643 100644
--- a/llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll
+++ b/llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll
@@ -4,15 +4,15 @@ define i32 @std_ldd_overflow() {
%src = alloca [4 x i8]
%dst = alloca [4 x i8]
%buf = alloca [28 x i16]
- %1 = bitcast [4 x i8]* %src to i32*
- store i32 0, i32 *%1
- %2 = bitcast [4 x i8]* %dst to i8*
- %3 = bitcast [4 x i8]* %src to i8*
- call void @llvm.memcpy.p0i8.p0i8.i16(i8* %2, i8* %3, i16 4, i1 false)
+ %1 = bitcast ptr %src to ptr
+ store i32 0, ptr %1
+ %2 = bitcast ptr %dst to ptr
+ %3 = bitcast ptr %src to ptr
+ call void @llvm.memcpy.p0.p0.i16(ptr %2, ptr %3, i16 4, i1 false)
; CHECK-NOT: std {{[XYZ]}}+64, {{r[0-9]+}}
; CHECK-NOT: ldd {{r[0-9]+}}, {{[XYZ]}}+64
ret i32 0
}
-declare void @llvm.memcpy.p0i8.p0i8.i16(i8* nocapture writeonly, i8* nocapture readonly, i16, i1)
+declare void @llvm.memcpy.p0.p0.i16(ptr nocapture writeonly, ptr nocapture readonly, i16, i1)
diff --git a/llvm/test/CodeGen/AVR/store-undef.ll b/llvm/test/CodeGen/AVR/store-undef.ll
index 4ea1a572a02d5..63d938a5e5889 100644
--- a/llvm/test/CodeGen/AVR/store-undef.ll
+++ b/llvm/test/CodeGen/AVR/store-undef.ll
@@ -7,6 +7,6 @@
define void @foo() {
; CHECK: st [[PTRREG:X|Y|Z]], r1
- store i8 0, i8* undef, align 4
+ store i8 0, ptr undef, align 4
ret void
}
diff --git a/llvm/test/CodeGen/AVR/store.ll b/llvm/test/CodeGen/AVR/store.ll
index 8bfbcb0934ed1..4af4e0449643a 100644
--- a/llvm/test/CodeGen/AVR/store.ll
+++ b/llvm/test/CodeGen/AVR/store.ll
@@ -1,61 +1,61 @@
; RUN: llc -mattr=avr6,sram < %s -march=avr | FileCheck %s
-define void @store8(i8* %x, i8 %y) {
+define void @store8(ptr %x, i8 %y) {
; CHECK-LABEL: store8:
; CHECK: st {{[XYZ]}}, r22
- store i8 %y, i8* %x
+ store i8 %y, ptr %x
ret void
}
-define void @store16(i16* %x, i16 %y) {
+define void @store16(ptr %x, i16 %y) {
; CHECK-LABEL: store16:
; CHECK: std {{[YZ]}}+1, r23
; CHECK: st {{[YZ]}}, r22
- store i16 %y, i16* %x
+ store i16 %y, ptr %x
ret void
}
-define void @store8disp(i8* %x, i8 %y) {
+define void @store8disp(ptr %x, i8 %y) {
; CHECK-LABEL: store8disp:
; CHECK: std {{[YZ]}}+63, r22
- %arrayidx = getelementptr inbounds i8, i8* %x, i16 63
- store i8 %y, i8* %arrayidx
+ %arrayidx = getelementptr inbounds i8, ptr %x, i16 63
+ store i8 %y, ptr %arrayidx
ret void
}
-define void @store8nodisp(i8* %x, i8 %y) {
+define void @store8nodisp(ptr %x, i8 %y) {
; CHECK-LABEL: store8nodisp:
; CHECK: movw r26, r24
; CHECK: subi r26, 192
; CHECK: sbci r27, 255
; CHECK: st {{[XYZ]}}, r22
- %arrayidx = getelementptr inbounds i8, i8* %x, i16 64
- store i8 %y, i8* %arrayidx
+ %arrayidx = getelementptr inbounds i8, ptr %x, i16 64
+ store i8 %y, ptr %arrayidx
ret void
}
-define void @store16disp(i16* %x, i16 %y) {
+define void @store16disp(ptr %x, i16 %y) {
; CHECK-LABEL: store16disp:
; CHECK: std {{[YZ]}}+63, r23
; CHECK: std {{[YZ]}}+62, r22
- %arrayidx = getelementptr inbounds i16, i16* %x, i16 31
- store i16 %y, i16* %arrayidx
+ %arrayidx = getelementptr inbounds i16, ptr %x, i16 31
+ store i16 %y, ptr %arrayidx
ret void
}
-define void @store16nodisp(i16* %x, i16 %y) {
+define void @store16nodisp(ptr %x, i16 %y) {
; CHECK-LABEL: store16nodisp:
; CHECK: subi r24, 192
; CHECK: sbci r25, 255
; CHECK: movw r30, r24
; CHECK: std {{[YZ]}}+1, r23
; CHECK: st {{[YZ]}}, r22
- %arrayidx = getelementptr inbounds i16, i16* %x, i16 32
- store i16 %y, i16* %arrayidx
+ %arrayidx = getelementptr inbounds i16, ptr %x, i16 32
+ store i16 %y, ptr %arrayidx
ret void
}
-define void @store8postinc(i8* %x, i8 %y) {
+define void @store8postinc(ptr %x, i8 %y) {
; CHECK-LABEL: store8postinc:
; CHECK: st {{[XYZ]}}+, {{.*}}
entry:
@@ -63,17 +63,17 @@ entry:
br i1 %tobool3, label %while.end, label %while.body
while.body: ; preds = %entry, %while.body
%dec5.in = phi i8 [ %dec5, %while.body ], [ %y, %entry ]
- %x.addr.04 = phi i8* [ %incdec.ptr, %while.body ], [ %x, %entry ]
+ %x.addr.04 = phi ptr [ %incdec.ptr, %while.body ], [ %x, %entry ]
%dec5 = add i8 %dec5.in, -1
- %incdec.ptr = getelementptr inbounds i8, i8* %x.addr.04, i16 1
- store i8 %dec5, i8* %x.addr.04
+ %incdec.ptr = getelementptr inbounds i8, ptr %x.addr.04, i16 1
+ store i8 %dec5, ptr %x.addr.04
%tobool = icmp eq i8 %dec5, 0
br i1 %tobool, label %while.end, label %while.body
while.end: ; preds = %while.body, %entry
ret void
}
-define void @store16postinc(i16* %x, i16 %y) {
+define void @store16postinc(ptr %x, i16 %y) {
; CHECK-LABEL: store16postinc:
; CHECK: std {{[XYZ]}}+1, {{.*}}
; CHECK: st {{[XYZ]}}, {{.*}}
@@ -82,17 +82,17 @@ entry:
br i1 %tobool3, label %while.end, label %while.body
while.body: ; preds = %entry, %while.body
%dec5.in = phi i16 [ %dec5, %while.body ], [ %y, %entry ]
- %x.addr.04 = phi i16* [ %incdec.ptr, %while.body ], [ %x, %entry ]
+ %x.addr.04 = phi ptr [ %incdec.ptr, %while.body ], [ %x, %entry ]
%dec5 = add nsw i16 %dec5.in, -1
- %incdec.ptr = getelementptr inbounds i16, i16* %x.addr.04, i16 1
- store i16 %dec5, i16* %x.addr.04
+ %incdec.ptr = getelementptr inbounds i16, ptr %x.addr.04, i16 1
+ store i16 %dec5, ptr %x.addr.04
%tobool = icmp eq i16 %dec5, 0
br i1 %tobool, label %while.end, label %while.body
while.end: ; preds = %while.body, %entry
ret void
}
-define void @store8predec(i8* %x, i8 %y) {
+define void @store8predec(ptr %x, i8 %y) {
; CHECK-LABEL: store8predec:
; CHECK: st -{{[XYZ]}}, {{.*}}
entry:
@@ -100,17 +100,17 @@ entry:
br i1 %tobool3, label %while.end, label %while.body
while.body: ; preds = %entry, %while.body
%dec5.in = phi i8 [ %dec5, %while.body ], [ %y, %entry ]
- %x.addr.04 = phi i8* [ %incdec.ptr, %while.body ], [ %x, %entry ]
+ %x.addr.04 = phi ptr [ %incdec.ptr, %while.body ], [ %x, %entry ]
%dec5 = add i8 %dec5.in, -1
- %incdec.ptr = getelementptr inbounds i8, i8* %x.addr.04, i16 -1
- store i8 %dec5, i8* %incdec.ptr
+ %incdec.ptr = getelementptr inbounds i8, ptr %x.addr.04, i16 -1
+ store i8 %dec5, ptr %incdec.ptr
%tobool = icmp eq i8 %dec5, 0
br i1 %tobool, label %while.end, label %while.body
while.end: ; preds = %while.body, %entry
ret void
}
-define void @store16predec(i16* %x, i16 %y) {
+define void @store16predec(ptr %x, i16 %y) {
; CHECK-LABEL: store16predec:
; CHECK: st -{{[XYZ]}}, {{.*}}
; CHECK: st -{{[XYZ]}}, {{.*}}
@@ -119,10 +119,10 @@ entry:
br i1 %tobool3, label %while.end, label %while.body
while.body: ; preds = %entry, %while.body
%dec5.in = phi i16 [ %dec5, %while.body ], [ %y, %entry ]
- %x.addr.04 = phi i16* [ %incdec.ptr, %while.body ], [ %x, %entry ]
+ %x.addr.04 = phi ptr [ %incdec.ptr, %while.body ], [ %x, %entry ]
%dec5 = add nsw i16 %dec5.in, -1
- %incdec.ptr = getelementptr inbounds i16, i16* %x.addr.04, i16 -1
- store i16 %dec5, i16* %incdec.ptr
+ %incdec.ptr = getelementptr inbounds i16, ptr %x.addr.04, i16 -1
+ store i16 %dec5, ptr %incdec.ptr
%tobool = icmp eq i16 %dec5, 0
br i1 %tobool, label %while.end, label %while.body
while.end: ; preds = %while.body, %entry
diff --git a/llvm/test/CodeGen/AVR/struct.ll b/llvm/test/CodeGen/AVR/struct.ll
index 1064236030e68..1e01e05ed1dde 100644
--- a/llvm/test/CodeGen/AVR/struct.ll
+++ b/llvm/test/CodeGen/AVR/struct.ll
@@ -6,7 +6,7 @@
%struct.s06 = type { i16, i16, i16 }
%struct.s04 = type { i16, i16 }
-define void @foo10(%struct.s10* sret(%struct.s10) %0, i16 %1, i16 %2, i16 %3) addrspace(1) {
+define void @foo10(ptr sret(%struct.s10) %0, i16 %1, i16 %2, i16 %3) addrspace(1) {
; CHECKA-LABEL: foo10:
; CHECKA: ; %bb.0:
; CHECKA-NEXT: mov r30, r24
@@ -29,12 +29,12 @@ define void @foo10(%struct.s10* sret(%struct.s10) %0, i16 %1, i16 %2, i16 %3) ad
; CHECKB-NEXT: std Z+1, r19
; CHECKB-NEXT: st Z, r18
; CHECKB-NEXT: ret
- %5 = getelementptr inbounds %struct.s10, %struct.s10* %0, i16 0, i32 0
- store i16 %3, i16* %5
- %6 = getelementptr inbounds %struct.s10, %struct.s10* %0, i16 0, i32 1
- store i16 %2, i16* %6
- %7 = getelementptr inbounds %struct.s10, %struct.s10* %0, i16 0, i32 2
- store i16 %1, i16* %7
+ %5 = getelementptr inbounds %struct.s10, ptr %0, i16 0, i32 0
+ store i16 %3, ptr %5
+ %6 = getelementptr inbounds %struct.s10, ptr %0, i16 0, i32 1
+ store i16 %2, ptr %6
+ %7 = getelementptr inbounds %struct.s10, ptr %0, i16 0, i32 2
+ store i16 %1, ptr %7
ret void
}
diff --git a/llvm/test/CodeGen/AVR/umul.with.overflow.i16-bug.ll b/llvm/test/CodeGen/AVR/umul.with.overflow.i16-bug.ll
index 4ea8f32b61d1e..9ccb5d04aa075 100644
--- a/llvm/test/CodeGen/AVR/umul.with.overflow.i16-bug.ll
+++ b/llvm/test/CodeGen/AVR/umul.with.overflow.i16-bug.ll
@@ -10,14 +10,14 @@ define hidden void @setServoAngle(i16) {
; CHECK-LABEL: entry
entry:
%adjustedAngle = alloca %Vs6UInt16, align 2
- %1 = bitcast %Vs6UInt16* %adjustedAngle to i8*
- %adjustedAngle._value = getelementptr inbounds %Vs6UInt16, %Vs6UInt16* %adjustedAngle, i32 0, i32 0
- store i16 %0, i16* %adjustedAngle._value, align 2
+ %1 = bitcast ptr %adjustedAngle to ptr
+ %adjustedAngle._value = getelementptr inbounds %Vs6UInt16, ptr %adjustedAngle, i32 0, i32 0
+ store i16 %0, ptr %adjustedAngle._value, align 2
;print(unsignedInt: adjustedAngle &* UInt16(11))
; breaks here
- %adjustedAngle._value2 = getelementptr inbounds %Vs6UInt16, %Vs6UInt16* %adjustedAngle, i32 0, i32 0
- %2 = load i16, i16* %adjustedAngle._value2, align 2
+ %adjustedAngle._value2 = getelementptr inbounds %Vs6UInt16, ptr %adjustedAngle, i32 0, i32 0
+ %2 = load i16, ptr %adjustedAngle._value2, align 2
; CHECK: mov r22, r24
; CHECK: mov r23, r25
diff --git a/llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll b/llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll
index 113c851c255ab..4c8a5d38ef878 100644
--- a/llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll
+++ b/llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll
@@ -10,11 +10,11 @@
; CHECK-LABEL: foo
; CHECK: ret
-define void @foo(%AtomicI16* %self) {
+define void @foo(ptr %self) {
start:
- %a = getelementptr inbounds %AtomicI16, %AtomicI16* %self, i16 0, i32 0, i32 0
- load atomic i16, i16* %a seq_cst, align 1
- store atomic i16 5, i16* %a seq_cst, align 1
+ %a = getelementptr inbounds %AtomicI16, ptr %self, i16 0, i32 0, i32 0
+ load atomic i16, ptr %a seq_cst, align 1
+ store atomic i16 5, ptr %a seq_cst, align 1
ret void
}
diff --git a/llvm/test/CodeGen/AVR/varargs.ll b/llvm/test/CodeGen/AVR/varargs.ll
index 00952af02adb5..2ea670c534da0 100644
--- a/llvm/test/CodeGen/AVR/varargs.ll
+++ b/llvm/test/CodeGen/AVR/varargs.ll
@@ -1,10 +1,10 @@
; RUN: llc -mattr=sram,movw,addsubiw < %s -march=avr | FileCheck %s
-declare void @llvm.va_start(i8*)
-declare i16 @vsprintf(i8* nocapture, i8* nocapture, i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start(ptr)
+declare i16 @vsprintf(ptr nocapture, ptr nocapture, ptr)
+declare void @llvm.va_end(ptr)
-define i16 @varargs1(i8* nocapture %x, ...) {
+define i16 @varargs1(ptr nocapture %x, ...) {
; CHECK-LABEL: varargs1:
; CHECK: movw r20, r28
; CHECK: subi r20, 215
@@ -15,25 +15,25 @@ define i16 @varargs1(i8* nocapture %x, ...) {
; CHECK: ldd r23, Y+40
; CHECK: call
%buffer = alloca [32 x i8]
- %ap = alloca i8*
- %ap1 = bitcast i8** %ap to i8*
- call void @llvm.va_start(i8* %ap1)
- %arraydecay = getelementptr inbounds [32 x i8], [32 x i8]* %buffer, i16 0, i16 0
- %1 = load i8*, i8** %ap
- %call = call i16 @vsprintf(i8* %arraydecay, i8* %x, i8* %1)
- call void @llvm.va_end(i8* %ap1)
+ %ap = alloca ptr
+ %ap1 = bitcast ptr %ap to ptr
+ call void @llvm.va_start(ptr %ap1)
+ %arraydecay = getelementptr inbounds [32 x i8], ptr %buffer, i16 0, i16 0
+ %1 = load ptr, ptr %ap
+ %call = call i16 @vsprintf(ptr %arraydecay, ptr %x, ptr %1)
+ call void @llvm.va_end(ptr %ap1)
ret i16 0
}
-define i16 @varargs2(i8* nocapture %x, ...) {
+define i16 @varargs2(ptr nocapture %x, ...) {
; CHECK-LABEL: varargs2:
; CHECK: ldd r24, [[REG:X|Y|Z]]+{{[0-9]+}}
; CHECK: ldd r25, [[REG]]+{{[0-9]+}}
- %ap = alloca i8*
- %ap1 = bitcast i8** %ap to i8*
- call void @llvm.va_start(i8* %ap1)
- %1 = va_arg i8** %ap, i16
- call void @llvm.va_end(i8* %ap1)
+ %ap = alloca ptr
+ %ap1 = bitcast ptr %ap to ptr
+ call void @llvm.va_start(ptr %ap1)
+ %1 = va_arg ptr %ap, i16
+ call void @llvm.va_end(ptr %ap1)
ret i16 %1
}
diff --git a/llvm/test/CodeGen/AVR/zeroreg.ll b/llvm/test/CodeGen/AVR/zeroreg.ll
index 7d0ea5b8f38c7..6187b6b97380b 100644
--- a/llvm/test/CodeGen/AVR/zeroreg.ll
+++ b/llvm/test/CodeGen/AVR/zeroreg.ll
@@ -8,8 +8,8 @@
; CHECK: st {{[XYZ]}}, r1
; CHECK-NEXT: mov r24, r1
; CHECK-NEXT: ret
-define i8 @store8zero(i8* %x) {
- store i8 0, i8* %x
+define i8 @store8zero(ptr %x) {
+ store i8 0, ptr %x
ret i8 0
}
@@ -20,8 +20,8 @@ define i8 @store8zero(i8* %x) {
; CHECK-NEXT: clr r1
; CHECK-NEXT: st {{[XYZ]}}, r0
; CHECK-NEXT: ret
-define void @mul(i8* %ptr, i8 %n) {
+define void @mul(ptr %ptr, i8 %n) {
%result = mul i8 %n, 3
- store i8 %result, i8* %ptr
+ store i8 %result, ptr %ptr
ret void
}
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