[llvm] [Mips][AsmPrinter] Fix for assembler not printing a label (PR #80666)

[via llvm-commits]

https://github.com/urosbericsyrmia updated https://github.com/llvm/llvm-project/pull/80666

>From b763ac6339e7cd63d196ca8ef23eb4049fb7122a Mon Sep 17 00:00:00 2001
From: Uros Beric <Uros.Beric at Syrmia.com>
Date: Mon, 29 Jan 2024 09:21:53 +0100
Subject: [PATCH] [Mips] Fix for assembler not printing a label

---
 llvm/lib/Target/Mips/MipsAsmPrinter.cpp     | 17 +++++++++++++++++
 llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll |  2 +-
 llvm/test/CodeGen/Mips/br_equal_labels.ll   | 14 ++++++++++++++
 3 files changed, 32 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/Mips/br_equal_labels.ll

diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
index 718844bc36ff9..74e1cc6ca9ce1 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -502,6 +502,23 @@ bool MipsAsmPrinter::isBlockOnlyReachableByFallthrough(const MachineBasicBlock*
   if (Pred->empty())
     return true;
 
+  // Check the terminators in the previous block.
+  for (const auto &MI : Pred->terminators()) {
+    // If it is not a simple branch, we are in a table somewhere.
+    if (!MI.isBranch() || MI.isIndirectBranch())
+      return false;
+
+    // If we are the operands of one of the branches, this is not a fall
+    // through. Note that targets with delay slots will usually bundle
+    // terminators with the delay slot instruction.
+    for (ConstMIBundleOperands OP(MI); OP.isValid(); ++OP) {
+      if (OP->isJTI())
+        return false;
+      if (OP->isMBB() && OP->getMBB() == MBB)
+        return false;
+    }
+  }
+
   // Otherwise, check the last instruction.
   // Check if the last terminator is an unconditional branch.
   MachineBasicBlock::const_iterator I = Pred->end();
diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll b/llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
index 9e64d7b2fa039..c276515920d52 100644
--- a/llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
+++ b/llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
@@ -11,7 +11,7 @@ define void @test(i32 %x, ptr %p) nounwind {
 ; CHECK-NEXT:    andi $1, $4, 1
 ; CHECK-NEXT:    bgtz $1, $BB0_1
 ; CHECK-NEXT:    nop
-; CHECK-NEXT:  # %bb.1: # %foo
+; CHECK-NEXT:  $BB0_1: # %foo
 ; CHECK-NEXT:    jr $ra
 ; CHECK-NEXT:    nop
   %y = and i32 %x, 1
diff --git a/llvm/test/CodeGen/Mips/br_equal_labels.ll b/llvm/test/CodeGen/Mips/br_equal_labels.ll
new file mode 100644
index 0000000000000..3044ecafe5c34
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/br_equal_labels.ll
@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --filetype=asm -march=mips --relocation-model=pic -O0  < %s | FileCheck %s
+
+define void @test(i32 %x) nounwind {
+  %y = icmp eq i32 %x, 1
+  br i1 %y, label %bb1, label %bb1
+
+bb1:
+  ret void
+}
+
+; CHECK:      bgtz	${{[0-9]+}}, $[[BB1:BB[0-9]+_[0-9]+]]
+; CHECK-NEXT: nop
+; CHECK-NEXT: $[[BB1]]: