[llvm] [RISCV] Support Inline ASM for the bf16 type. (PR #80118)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 5 02:20:22 PST 2024
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@@ -9105,7 +9105,7 @@ getRegistersForValue(SelectionDAG &DAG, const SDLoc &DL,
// Get the actual register value type. This is important, because the user
// may have asked for (e.g.) the AX register in i32 type. We need to
// remember that AX is actually i16 to get the right extension.
- const MVT RegVT = *TRI.legalclasstypes_begin(*RC);
+ MVT RegVT = *TRI.legalclasstypes_begin(*RC);
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arsenm wrote:
Adding a new hook that implements TRI.legalclasstypes_begin is not what I meant. That doesn't really address the issue, and just forces more complexity into every target. I meant all of this code here can be factored into a function and repeated for every type in legalclasstypes until one works
https://github.com/llvm/llvm-project/pull/80118
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