[llvm] [DAGCombiner] Optimize more vector element extractions. (PR #80520)

[Matt Arsenault via llvm-commits]

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@@ -190,10 +190,6 @@ define <2 x half> @v_test_canonicalize_build_vector_v2f16(half %lo, half %hi) #1
 ; CI-LABEL: v_test_canonicalize_build_vector_v2f16:
 ; CI:       ; %bb.0:
 ; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; CI-NEXT:    v_cvt_f16_f32_e32 v0, v0
-; CI-NEXT:    v_cvt_f16_f32_e32 v1, v1
-; CI-NEXT:    v_cvt_f32_f16_e32 v0, v0
-; CI-NEXT:    v_cvt_f32_f16_e32 v1, v1
 ; CI-NEXT:    s_setpc_b64 s[30:31]
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arsenm wrote:

Not quieting signaling nans is permitted for non-strict functions. I would just ignore this, I think the forced promotion of half to float in the ABI is nonsense I gave up on fixing 

https://github.com/llvm/llvm-project/pull/80520