[llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)

[Florian Hahn via llvm-commits]

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@@ -9479,14 +9583,31 @@ void VPWidenMemoryInstructionRecipe::execute(VPTransformState &State) {
     }
   }
 
+  auto MaskValue = [&](unsigned Part) -> Value * {
+    if (isMaskRequired)
+      return BlockInMaskParts[Part];
+    return nullptr;
+  };
+
   // Handle Stores:
   if (SI) {
     State.setDebugLocFrom(SI->getDebugLoc());
 
     for (unsigned Part = 0; Part < State.UF; ++Part) {
       Instruction *NewSI = nullptr;
       Value *StoredVal = State.get(StoredValue, Part);
-      if (CreateGatherScatter) {
+      if (State.EVL) {
+        Value *EVLPart = State.get(State.EVL, Part);
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fhahn wrote:

> "Expected only UF==1 for predicated vectorization.");

Predicated vectorization seems ambiguous here, regular masked loads/stores are also predicated. Would probably be better to clearly refer to EVL, something like `Expected only UF == 1 when vectorizing with explicit vector length`.

Drop the part from `EVLPart` here as well? (going back to https://reviews.llvm.org/D99750?id=558054#inline-1551817))

https://github.com/llvm/llvm-project/pull/76172