[llvm] [InstCombineCompares] Try to "strengthen" compares based on known bits. (PR #79405)

[Yingwei Zheng via llvm-commits]

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@@ -6100,6 +6100,95 @@ bool InstCombinerImpl::replacedSelectWithOperand(SelectInst *SI,
   return false;
 }
 
+// Try to "strengthen" the RHS of compare based on known bits.
+// For example, replace `icmp ugt %x, 14` with `icmp ugt %x, 15` when
+// it is known that the two least significant bits of `%x` is zero.
+static Instruction *strengthenICmpUsingKnownBits(ICmpInst &I,
+                                                 KnownBits Op0Known,
+                                                 KnownBits Op1Known,
+                                                 unsigned BitWidth) {
+  if (!BitWidth)
+    return nullptr;
+  if (!(Op1Known.isConstant() && Op0Known.Zero.isMask()))
+    return nullptr;
+
+  Value *Op0 = I.getOperand(0);
+  ICmpInst::Predicate Pred = I.getPredicate();
+  Type *Ty = Op0->getType();
+  APInt RHSConst = Op1Known.getConstant();
+  bool TrueIfSigned = false;
+  // Don't break the SignBitCheck pattern;
+  if (InstCombiner::isSignBitCheck(Pred, RHSConst, TrueIfSigned))
+    return nullptr;
+
----------------
dtcxzyw wrote:

> @dtcxzyw Added a check not to break any select patterns.

Emm, it seems like some regressions are still there :(
https://github.com/dtcxzyw/llvm-opt-benchmark/pull/148#discussion_r1471344888


https://github.com/llvm/llvm-project/pull/79405