[llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)

[Wang Pengcheng via llvm-commits]

wangpc-pp wrote:

Based on my rough understanding, these changes are really straightforward, so I think this PR makes sense to me.
One thought: the test doesn't show the difference between two directions, is it possible to add a test that will have different scheduled results?

https://github.com/llvm/llvm-project/pull/76186