[llvm] [RISCV][GISEL] Add IRTranslation for shufflevector on scalable vector types (PR #80378)

[via llvm-commits]

github-actions[bot] wrote:

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``````````bash
git-clang-format --diff 59eadcd28f787a98a2fd5f057beb3df7950654ee 0b1db1494e8309a7c42d2aa99c5a20dfd507cd5d -- llvm/include/llvm/CodeGen/GlobalISel/Utils.h llvm/lib/CodeGen/GlobalISel/CallLowering.cpp llvm/lib/CodeGen/GlobalISel/Utils.cpp llvm/lib/CodeGen/MachineVerifier.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index f72584839f..ef1cefc487 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1632,7 +1632,7 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
 
     if (Src0Ty.isScalableVector()) {
       if (!llvm::all_of(MaskIdxes,
-                       [&MaskIdxes](int M) { return M == MaskIdxes[0]; }))
+                        [&MaskIdxes](int M) { return M == MaskIdxes[0]; }))
         report("Elements of a scalable G_SHUFFLE_VECTOR mask must match", MI);
       if (MaskIdxes[0] != 0 && MaskIdxes[0] != -1)
         report("Elements of a scalable G_SHUFFLE_VECTOR mask be zero or undef",

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https://github.com/llvm/llvm-project/pull/80378