[llvm] [TTI] Use Register in isLoadFromStackSlot and isStoreToStackSlot [nfc] (PR #80339)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff e296cedcd686e24fee75756185669f1bb3b47fdd e779259ce656f77437b15ed4f0e12ec024b2b4ca -- llvm/include/llvm/CodeGen/TargetInstrInfo.h llvm/lib/Target/AArch64/AArch64InstrInfo.cpp llvm/lib/Target/AArch64/AArch64InstrInfo.h llvm/lib/Target/AMDGPU/SIInstrInfo.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.h llvm/lib/Target/ARC/ARCInstrInfo.cpp llvm/lib/Target/ARC/ARCInstrInfo.h llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/lib/Target/ARM/ARMBaseInstrInfo.h llvm/lib/Target/AVR/AVRInstrInfo.cpp llvm/lib/Target/AVR/AVRInstrInfo.h llvm/lib/Target/CSKY/CSKYInstrInfo.cpp llvm/lib/Target/CSKY/CSKYInstrInfo.h llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp llvm/lib/Target/Hexagon/HexagonInstrInfo.h llvm/lib/Target/Lanai/LanaiInstrInfo.cpp llvm/lib/Target/Lanai/LanaiInstrInfo.h llvm/lib/Target/Mips/Mips16InstrInfo.cpp llvm/lib/Target/Mips/Mips16InstrInfo.h llvm/lib/Target/Mips/MipsSEInstrInfo.cpp llvm/lib/Target/Mips/MipsSEInstrInfo.h llvm/lib/Target/NVPTX/NVPTXInstrInfo.h llvm/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/lib/Target/PowerPC/PPCInstrInfo.h llvm/lib/Target/RISCV/RISCVInstrInfo.cpp llvm/lib/Target/RISCV/RISCVInstrInfo.h llvm/lib/Target/Sparc/SparcInstrInfo.cpp llvm/lib/Target/Sparc/SparcInstrInfo.h llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp llvm/lib/Target/SystemZ/SystemZInstrInfo.h llvm/lib/Target/VE/VEInstrInfo.cpp llvm/lib/Target/VE/VEInstrInfo.h llvm/lib/Target/X86/X86FrameLowering.cpp llvm/lib/Target/X86/X86InstrInfo.cpp llvm/lib/Target/X86/X86InstrInfo.h llvm/lib/Target/XCore/XCoreInstrInfo.cpp llvm/lib/Target/XCore/XCoreInstrInfo.h
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index 138c657854..b6393debbf 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -278,8 +278,7 @@ public:
   /// bytes loaded from the stack. This must be implemented if a backend
   /// supports partial stack slot spills/loads to further disambiguate
   /// what the load does.
-  virtual Register isLoadFromStackSlot(const MachineInstr &MI,
-                                       int &FrameIndex,
+  virtual Register isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex,
                                        unsigned &MemBytes) const {
     MemBytes = 0;
     return isLoadFromStackSlot(MI, FrameIndex);
@@ -316,8 +315,7 @@ public:
   /// bytes stored to the stack. This must be implemented if a backend
   /// supports partial stack slot spills/loads to further disambiguate
   /// what the store does.
-  virtual Register isStoreToStackSlot(const MachineInstr &MI,
-                                      int &FrameIndex,
+  virtual Register isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex,
                                       unsigned &MemBytes) const {
     MemBytes = 0;
     return isStoreToStackSlot(MI, FrameIndex);
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 53e68e92f3..593688865d 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -249,8 +249,7 @@ public:
 
   Register isLoadFromStackSlot(const MachineInstr &MI,
                                int &FrameIndex) const override;
-  Register isLoadFromStackSlot(const MachineInstr &MI,
-                               int &FrameIndex,
+  Register isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex,
                                unsigned &MemBytes) const override;
   /// isLoadFromStackSlotPostFE - Check for post-frame ptr elimination
   /// stack locations as well.  This uses a heuristic so it isn't
@@ -260,8 +259,7 @@ public:
 
   Register isStoreToStackSlot(const MachineInstr &MI,
                               int &FrameIndex) const override;
-  Register isStoreToStackSlot(const MachineInstr &MI,
-                              int &FrameIndex,
+  Register isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex,
                               unsigned &MemBytes) const override;
   /// isStoreToStackSlotPostFE - Check for post-frame ptr elimination
   /// stack locations as well.  This uses a heuristic so it isn't

``````````

</details>


https://github.com/llvm/llvm-project/pull/80339