[llvm] 41be541 - [RISCV] Add srmcfg CSR from Ssqosid extension. (#79914)

[via llvm-commits]

Author: Craig Topper
Date: 2024-02-01T11:59:13-08:00
New Revision: 41be5412e2da0235811af24b10eb2dacab03f8b5

URL: https://github.com/llvm/llvm-project/commit/41be5412e2da0235811af24b10eb2dacab03f8b5
DIFF: https://github.com/llvm/llvm-project/commit/41be5412e2da0235811af24b10eb2dacab03f8b5.diff

LOG: [RISCV] Add srmcfg CSR from Ssqosid extension. (#79914)

Based on the spec here
https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0-rc1

Ssqosid extension name will be added in a separate patch.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVSystemOperands.td
    llvm/test/MC/RISCV/supervisor-csr-names.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVSystemOperands.td b/llvm/lib/Target/RISCV/RISCVSystemOperands.td
index 43475e825b46f..f046312b1d428 100644
--- a/llvm/lib/Target/RISCV/RISCVSystemOperands.td
+++ b/llvm/lib/Target/RISCV/RISCVSystemOperands.td
@@ -132,6 +132,11 @@ def : SysReg<"sip", 0x144>;
 let DeprecatedName = "sptbr" in
 def : SysReg<"satp", 0x180>;
 
+//===----------------------------------------------------------------------===//
+// Quality-of-Service(QoS) Identifiers (Ssqosid)
+//===----------------------------------------------------------------------===//
+def : SysReg<"srmcfg", 0x181>;
+
 //===----------------------------------------------------------------------===//
 // Debug/Trace Registers
 //===----------------------------------------------------------------------===//

diff  --git a/llvm/test/MC/RISCV/supervisor-csr-names.s b/llvm/test/MC/RISCV/supervisor-csr-names.s
index 84f9edd595d09..127812de4bdc9 100644
--- a/llvm/test/MC/RISCV/supervisor-csr-names.s
+++ b/llvm/test/MC/RISCV/supervisor-csr-names.s
@@ -196,6 +196,24 @@ csrrs t1, satp, zero
 # uimm12
 csrrs t2, 0x180, zero
 
+#########################################
+# Quality-of-Service(QoS) Identifiers
+#########################################
+
+# srmcfg
+# name
+# CHECK-INST: csrrs t1, srmcfg, zero
+# CHECK-ENC: encoding: [0x73,0x23,0x10,0x18]
+# CHECK-INST-ALIAS: csrr t1, srmcfg
+# uimm12
+# CHECK-INST: csrrs t2, srmcfg, zero
+# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x18]
+# CHECK-INST-ALIAS: csrr t2, srmcfg
+# name
+csrrs t1, srmcfg, zero
+# uimm12
+csrrs t2, 0x181, zero
+
 #########################################
 # Debug/Trace Registers
 #########################################