[llvm] [Transforms] Resolve FIXME: Pick the smallest legal type that fits (PR #79158)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 1 08:35:15 PST 2024
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/79158
>From 1f0065dceaa9b6583dc4ca97c53c2f70218d8119 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Tue, 23 Jan 2024 10:15:46 -0500
Subject: [PATCH 1/3] [Transforms] pre-commit tests (NFC)
---
llvm/test/Transforms/Float2Int/basic.ll | 436 +++++++++++++++++++++++-
1 file changed, 435 insertions(+), 1 deletion(-)
diff --git a/llvm/test/Transforms/Float2Int/basic.ll b/llvm/test/Transforms/Float2Int/basic.ll
index 2854a83179b7e..a812dd759e03b 100644
--- a/llvm/test/Transforms/Float2Int/basic.ll
+++ b/llvm/test/Transforms/Float2Int/basic.ll
@@ -1,5 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -passes='float2int' -S | FileCheck %s
+; RUN: opt < %s -passes='float2int' -S | FileCheck %s -check-prefix=NONE
+; RUN: opt < %s -passes='float2int' -S --data-layout="n64" | FileCheck %s -check-prefix=ONLY64
+; RUN: opt < %s -passes='float2int' -S --data-layout="n8:16:32:64"| FileCheck %s -check-prefix=MULTIPLE
;
; Positive tests
@@ -11,6 +13,24 @@ define i16 @simple1(i8 %a) {
; CHECK-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 1
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
; CHECK-NEXT: ret i16 [[TMP2]]
+;
+; NONE-LABEL: @simple1(
+; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; NONE-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 1
+; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; NONE-NEXT: ret i16 [[TMP2]]
+;
+; ONLY64-LABEL: @simple1(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; ONLY64-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 1
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; ONLY64-NEXT: ret i16 [[TMP2]]
+;
+; MULTIPLE-LABEL: @simple1(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; MULTIPLE-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 1
+; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; MULTIPLE-NEXT: ret i16 [[TMP2]]
;
%t1 = uitofp i8 %a to float
%t2 = fadd float %t1, 1.0
@@ -24,6 +44,24 @@ define i8 @simple2(i8 %a) {
; CHECK-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i8
; CHECK-NEXT: ret i8 [[TMP2]]
+;
+; NONE-LABEL: @simple2(
+; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; NONE-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
+; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i8
+; NONE-NEXT: ret i8 [[TMP2]]
+;
+; ONLY64-LABEL: @simple2(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; ONLY64-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i8
+; ONLY64-NEXT: ret i8 [[TMP2]]
+;
+; MULTIPLE-LABEL: @simple2(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; MULTIPLE-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
+; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i8
+; MULTIPLE-NEXT: ret i8 [[TMP2]]
;
%t1 = uitofp i8 %a to float
%t2 = fsub float %t1, 1.0
@@ -36,6 +74,21 @@ define i32 @simple3(i8 %a) {
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
; CHECK-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
; CHECK-NEXT: ret i32 [[T21]]
+;
+; NONE-LABEL: @simple3(
+; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; NONE-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
+; NONE-NEXT: ret i32 [[T21]]
+;
+; ONLY64-LABEL: @simple3(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; ONLY64-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
+; ONLY64-NEXT: ret i32 [[T21]]
+;
+; MULTIPLE-LABEL: @simple3(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; MULTIPLE-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
+; MULTIPLE-NEXT: ret i32 [[T21]]
;
%t1 = uitofp i8 %a to float
%t2 = fsub float %t1, 1.0
@@ -49,6 +102,24 @@ define i1 @cmp(i8 %a, i8 %b) {
; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
; CHECK-NEXT: [[T31:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
; CHECK-NEXT: ret i1 [[T31]]
+;
+; NONE-LABEL: @cmp(
+; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; NONE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; NONE-NEXT: [[T31:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
+; NONE-NEXT: ret i1 [[T31]]
+;
+; ONLY64-LABEL: @cmp(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; ONLY64-NEXT: [[T31:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
+; ONLY64-NEXT: ret i1 [[T31]]
+;
+; MULTIPLE-LABEL: @cmp(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; MULTIPLE-NEXT: [[T31:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
+; MULTIPLE-NEXT: ret i1 [[T31]]
;
%t1 = uitofp i8 %a to float
%t2 = uitofp i8 %b to float
@@ -62,6 +133,24 @@ define i32 @simple4(i32 %a) {
; CHECK-NEXT: [[T21:%.*]] = add i64 [[TMP1]], 1
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i32
; CHECK-NEXT: ret i32 [[TMP2]]
+;
+; NONE-LABEL: @simple4(
+; NONE-NEXT: [[TMP1:%.*]] = zext i32 [[A:%.*]] to i64
+; NONE-NEXT: [[T21:%.*]] = add i64 [[TMP1]], 1
+; NONE-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i32
+; NONE-NEXT: ret i32 [[TMP2]]
+;
+; ONLY64-LABEL: @simple4(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i32 [[A:%.*]] to i64
+; ONLY64-NEXT: [[T21:%.*]] = add i64 [[TMP1]], 1
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i32
+; ONLY64-NEXT: ret i32 [[TMP2]]
+;
+; MULTIPLE-LABEL: @simple4(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i32 [[A:%.*]] to i64
+; MULTIPLE-NEXT: [[T21:%.*]] = add i64 [[TMP1]], 1
+; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i32
+; MULTIPLE-NEXT: ret i32 [[TMP2]]
;
%t1 = uitofp i32 %a to double
%t2 = fadd double %t1, 1.0
@@ -76,6 +165,27 @@ define i32 @simple5(i8 %a, i8 %b) {
; CHECK-NEXT: [[T31:%.*]] = add i32 [[TMP1]], 1
; CHECK-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
; CHECK-NEXT: ret i32 [[T42]]
+;
+; NONE-LABEL: @simple5(
+; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; NONE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; NONE-NEXT: [[T31:%.*]] = add i32 [[TMP1]], 1
+; NONE-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
+; NONE-NEXT: ret i32 [[T42]]
+;
+; ONLY64-LABEL: @simple5(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; ONLY64-NEXT: [[T31:%.*]] = add i32 [[TMP1]], 1
+; ONLY64-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
+; ONLY64-NEXT: ret i32 [[T42]]
+;
+; MULTIPLE-LABEL: @simple5(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; MULTIPLE-NEXT: [[T31:%.*]] = add i32 [[TMP1]], 1
+; MULTIPLE-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
+; MULTIPLE-NEXT: ret i32 [[T42]]
;
%t1 = uitofp i8 %a to float
%t2 = uitofp i8 %b to float
@@ -92,6 +202,27 @@ define i32 @simple6(i8 %a, i8 %b) {
; CHECK-NEXT: [[T31:%.*]] = sub i32 0, [[TMP1]]
; CHECK-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
; CHECK-NEXT: ret i32 [[T42]]
+;
+; NONE-LABEL: @simple6(
+; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; NONE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; NONE-NEXT: [[T31:%.*]] = sub i32 0, [[TMP1]]
+; NONE-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
+; NONE-NEXT: ret i32 [[T42]]
+;
+; ONLY64-LABEL: @simple6(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; ONLY64-NEXT: [[T31:%.*]] = sub i32 0, [[TMP1]]
+; ONLY64-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
+; ONLY64-NEXT: ret i32 [[T42]]
+;
+; MULTIPLE-LABEL: @simple6(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; MULTIPLE-NEXT: [[T31:%.*]] = sub i32 0, [[TMP1]]
+; MULTIPLE-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
+; MULTIPLE-NEXT: ret i32 [[T42]]
;
%t1 = uitofp i8 %a to float
%t2 = uitofp i8 %b to float
@@ -114,6 +245,36 @@ define i32 @multi1(i8 %a, i8 %b, i8 %c, float %d) {
; CHECK-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
; CHECK-NEXT: [[R:%.*]] = add i32 [[X1]], [[W]]
; CHECK-NEXT: ret i32 [[R]]
+;
+; NONE-LABEL: @multi1(
+; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; NONE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; NONE-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
+; NONE-NEXT: [[X1:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; NONE-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
+; NONE-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
+; NONE-NEXT: [[R:%.*]] = add i32 [[X1]], [[W]]
+; NONE-NEXT: ret i32 [[R]]
+;
+; ONLY64-LABEL: @multi1(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; ONLY64-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
+; ONLY64-NEXT: [[X1:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; ONLY64-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
+; ONLY64-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
+; ONLY64-NEXT: [[R:%.*]] = add i32 [[X1]], [[W]]
+; ONLY64-NEXT: ret i32 [[R]]
+;
+; MULTIPLE-LABEL: @multi1(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; MULTIPLE-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
+; MULTIPLE-NEXT: [[X1:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; MULTIPLE-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
+; MULTIPLE-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
+; MULTIPLE-NEXT: [[R:%.*]] = add i32 [[X1]], [[W]]
+; MULTIPLE-NEXT: ret i32 [[R]]
;
%fa = uitofp i8 %a to float
%fb = uitofp i8 %b to float
@@ -132,6 +293,24 @@ define i16 @simple_negzero(i8 %a) {
; CHECK-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 0
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
; CHECK-NEXT: ret i16 [[TMP2]]
+;
+; NONE-LABEL: @simple_negzero(
+; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; NONE-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 0
+; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; NONE-NEXT: ret i16 [[TMP2]]
+;
+; ONLY64-LABEL: @simple_negzero(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; ONLY64-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 0
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; ONLY64-NEXT: ret i16 [[TMP2]]
+;
+; MULTIPLE-LABEL: @simple_negzero(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; MULTIPLE-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 0
+; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; MULTIPLE-NEXT: ret i16 [[TMP2]]
;
%t1 = uitofp i8 %a to float
%t2 = fadd fast float %t1, -0.0
@@ -146,6 +325,27 @@ define i32 @simple_negative(i8 %call) {
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[MUL1]] to i8
; CHECK-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
; CHECK-NEXT: ret i32 [[CONV3]]
+;
+; NONE-LABEL: @simple_negative(
+; NONE-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i32
+; NONE-NEXT: [[MUL1:%.*]] = mul i32 [[TMP1]], -3
+; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[MUL1]] to i8
+; NONE-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
+; NONE-NEXT: ret i32 [[CONV3]]
+;
+; ONLY64-LABEL: @simple_negative(
+; ONLY64-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i32
+; ONLY64-NEXT: [[MUL1:%.*]] = mul i32 [[TMP1]], -3
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[MUL1]] to i8
+; ONLY64-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
+; ONLY64-NEXT: ret i32 [[CONV3]]
+;
+; MULTIPLE-LABEL: @simple_negative(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i32
+; MULTIPLE-NEXT: [[MUL1:%.*]] = mul i32 [[TMP1]], -3
+; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[MUL1]] to i8
+; MULTIPLE-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
+; MULTIPLE-NEXT: ret i32 [[CONV3]]
;
%conv1 = sitofp i8 %call to float
%mul = fmul float %conv1, -3.000000e+00
@@ -160,6 +360,24 @@ define i16 @simple_fneg(i8 %a) {
; CHECK-NEXT: [[T21:%.*]] = sub i32 0, [[TMP1]]
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
; CHECK-NEXT: ret i16 [[TMP2]]
+;
+; NONE-LABEL: @simple_fneg(
+; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; NONE-NEXT: [[T21:%.*]] = sub i32 0, [[TMP1]]
+; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; NONE-NEXT: ret i16 [[TMP2]]
+;
+; ONLY64-LABEL: @simple_fneg(
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; ONLY64-NEXT: [[T21:%.*]] = sub i32 0, [[TMP1]]
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; ONLY64-NEXT: ret i16 [[TMP2]]
+;
+; MULTIPLE-LABEL: @simple_fneg(
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
+; MULTIPLE-NEXT: [[T21:%.*]] = sub i32 0, [[TMP1]]
+; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; MULTIPLE-NEXT: ret i16 [[TMP2]]
;
%t1 = uitofp i8 %a to float
%t2 = fneg fast float %t1
@@ -184,6 +402,36 @@ define i32 @neg_multi1(i8 %a, i8 %b, i8 %c, float %d) {
; CHECK-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
; CHECK-NEXT: [[R:%.*]] = add i32 [[Y]], [[W]]
; CHECK-NEXT: ret i32 [[R]]
+;
+; NONE-LABEL: @neg_multi1(
+; NONE-NEXT: [[FA:%.*]] = uitofp i8 [[A:%.*]] to float
+; NONE-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
+; NONE-NEXT: [[X:%.*]] = fadd float [[FA]], [[FC]]
+; NONE-NEXT: [[Y:%.*]] = fptoui float [[X]] to i32
+; NONE-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
+; NONE-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
+; NONE-NEXT: [[R:%.*]] = add i32 [[Y]], [[W]]
+; NONE-NEXT: ret i32 [[R]]
+;
+; ONLY64-LABEL: @neg_multi1(
+; ONLY64-NEXT: [[FA:%.*]] = uitofp i8 [[A:%.*]] to float
+; ONLY64-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
+; ONLY64-NEXT: [[X:%.*]] = fadd float [[FA]], [[FC]]
+; ONLY64-NEXT: [[Y:%.*]] = fptoui float [[X]] to i32
+; ONLY64-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
+; ONLY64-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
+; ONLY64-NEXT: [[R:%.*]] = add i32 [[Y]], [[W]]
+; ONLY64-NEXT: ret i32 [[R]]
+;
+; MULTIPLE-LABEL: @neg_multi1(
+; MULTIPLE-NEXT: [[FA:%.*]] = uitofp i8 [[A:%.*]] to float
+; MULTIPLE-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
+; MULTIPLE-NEXT: [[X:%.*]] = fadd float [[FA]], [[FC]]
+; MULTIPLE-NEXT: [[Y:%.*]] = fptoui float [[X]] to i32
+; MULTIPLE-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
+; MULTIPLE-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
+; MULTIPLE-NEXT: [[R:%.*]] = add i32 [[Y]], [[W]]
+; MULTIPLE-NEXT: ret i32 [[R]]
;
%fa = uitofp i8 %a to float
%fc = uitofp i8 %c to float
@@ -205,6 +453,27 @@ define i64 @neg_muld(i32 %a, i32 %b) {
; CHECK-NEXT: [[MUL:%.*]] = fmul double [[FA]], [[FB]]
; CHECK-NEXT: [[R:%.*]] = fptoui double [[MUL]] to i64
; CHECK-NEXT: ret i64 [[R]]
+;
+; NONE-LABEL: @neg_muld(
+; NONE-NEXT: [[FA:%.*]] = uitofp i32 [[A:%.*]] to double
+; NONE-NEXT: [[FB:%.*]] = uitofp i32 [[B:%.*]] to double
+; NONE-NEXT: [[MUL:%.*]] = fmul double [[FA]], [[FB]]
+; NONE-NEXT: [[R:%.*]] = fptoui double [[MUL]] to i64
+; NONE-NEXT: ret i64 [[R]]
+;
+; ONLY64-LABEL: @neg_muld(
+; ONLY64-NEXT: [[FA:%.*]] = uitofp i32 [[A:%.*]] to double
+; ONLY64-NEXT: [[FB:%.*]] = uitofp i32 [[B:%.*]] to double
+; ONLY64-NEXT: [[MUL:%.*]] = fmul double [[FA]], [[FB]]
+; ONLY64-NEXT: [[R:%.*]] = fptoui double [[MUL]] to i64
+; ONLY64-NEXT: ret i64 [[R]]
+;
+; MULTIPLE-LABEL: @neg_muld(
+; MULTIPLE-NEXT: [[FA:%.*]] = uitofp i32 [[A:%.*]] to double
+; MULTIPLE-NEXT: [[FB:%.*]] = uitofp i32 [[B:%.*]] to double
+; MULTIPLE-NEXT: [[MUL:%.*]] = fmul double [[FA]], [[FB]]
+; MULTIPLE-NEXT: [[R:%.*]] = fptoui double [[MUL]] to i64
+; MULTIPLE-NEXT: ret i64 [[R]]
;
%fa = uitofp i32 %a to double
%fb = uitofp i32 %b to double
@@ -224,6 +493,27 @@ define i32 @neg_mulf(i16 %a, i16 %b) {
; CHECK-NEXT: [[MUL:%.*]] = fmul float [[FA]], [[FB]]
; CHECK-NEXT: [[R:%.*]] = fptoui float [[MUL]] to i32
; CHECK-NEXT: ret i32 [[R]]
+;
+; NONE-LABEL: @neg_mulf(
+; NONE-NEXT: [[FA:%.*]] = uitofp i16 [[A:%.*]] to float
+; NONE-NEXT: [[FB:%.*]] = uitofp i16 [[B:%.*]] to float
+; NONE-NEXT: [[MUL:%.*]] = fmul float [[FA]], [[FB]]
+; NONE-NEXT: [[R:%.*]] = fptoui float [[MUL]] to i32
+; NONE-NEXT: ret i32 [[R]]
+;
+; ONLY64-LABEL: @neg_mulf(
+; ONLY64-NEXT: [[FA:%.*]] = uitofp i16 [[A:%.*]] to float
+; ONLY64-NEXT: [[FB:%.*]] = uitofp i16 [[B:%.*]] to float
+; ONLY64-NEXT: [[MUL:%.*]] = fmul float [[FA]], [[FB]]
+; ONLY64-NEXT: [[R:%.*]] = fptoui float [[MUL]] to i32
+; ONLY64-NEXT: ret i32 [[R]]
+;
+; MULTIPLE-LABEL: @neg_mulf(
+; MULTIPLE-NEXT: [[FA:%.*]] = uitofp i16 [[A:%.*]] to float
+; MULTIPLE-NEXT: [[FB:%.*]] = uitofp i16 [[B:%.*]] to float
+; MULTIPLE-NEXT: [[MUL:%.*]] = fmul float [[FA]], [[FB]]
+; MULTIPLE-NEXT: [[R:%.*]] = fptoui float [[MUL]] to i32
+; MULTIPLE-NEXT: ret i32 [[R]]
;
%fa = uitofp i16 %a to float
%fb = uitofp i16 %b to float
@@ -240,6 +530,24 @@ define i1 @neg_cmp(i8 %a, i8 %b) {
; CHECK-NEXT: [[T2:%.*]] = uitofp i8 [[B:%.*]] to float
; CHECK-NEXT: [[T3:%.*]] = fcmp false float [[T1]], [[T2]]
; CHECK-NEXT: ret i1 [[T3]]
+;
+; NONE-LABEL: @neg_cmp(
+; NONE-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; NONE-NEXT: [[T2:%.*]] = uitofp i8 [[B:%.*]] to float
+; NONE-NEXT: [[T3:%.*]] = fcmp false float [[T1]], [[T2]]
+; NONE-NEXT: ret i1 [[T3]]
+;
+; ONLY64-LABEL: @neg_cmp(
+; ONLY64-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; ONLY64-NEXT: [[T2:%.*]] = uitofp i8 [[B:%.*]] to float
+; ONLY64-NEXT: [[T3:%.*]] = fcmp false float [[T1]], [[T2]]
+; ONLY64-NEXT: ret i1 [[T3]]
+;
+; MULTIPLE-LABEL: @neg_cmp(
+; MULTIPLE-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; MULTIPLE-NEXT: [[T2:%.*]] = uitofp i8 [[B:%.*]] to float
+; MULTIPLE-NEXT: [[T3:%.*]] = fcmp false float [[T1]], [[T2]]
+; MULTIPLE-NEXT: ret i1 [[T3]]
;
%t1 = uitofp i8 %a to float
%t2 = uitofp i8 %b to float
@@ -255,6 +563,24 @@ define i16 @neg_div(i8 %a) {
; CHECK-NEXT: [[T2:%.*]] = fdiv float [[T1]], 1.000000e+00
; CHECK-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
; CHECK-NEXT: ret i16 [[T3]]
+;
+; NONE-LABEL: @neg_div(
+; NONE-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; NONE-NEXT: [[T2:%.*]] = fdiv float [[T1]], 1.000000e+00
+; NONE-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
+; NONE-NEXT: ret i16 [[T3]]
+;
+; ONLY64-LABEL: @neg_div(
+; ONLY64-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; ONLY64-NEXT: [[T2:%.*]] = fdiv float [[T1]], 1.000000e+00
+; ONLY64-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
+; ONLY64-NEXT: ret i16 [[T3]]
+;
+; MULTIPLE-LABEL: @neg_div(
+; MULTIPLE-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; MULTIPLE-NEXT: [[T2:%.*]] = fdiv float [[T1]], 1.000000e+00
+; MULTIPLE-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
+; MULTIPLE-NEXT: ret i16 [[T3]]
;
%t1 = uitofp i8 %a to float
%t2 = fdiv float %t1, 1.0
@@ -270,6 +596,24 @@ define i16 @neg_remainder(i8 %a) {
; CHECK-NEXT: [[T2:%.*]] = fadd float [[T1]], 1.250000e+00
; CHECK-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
; CHECK-NEXT: ret i16 [[T3]]
+;
+; NONE-LABEL: @neg_remainder(
+; NONE-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; NONE-NEXT: [[T2:%.*]] = fadd float [[T1]], 1.250000e+00
+; NONE-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
+; NONE-NEXT: ret i16 [[T3]]
+;
+; ONLY64-LABEL: @neg_remainder(
+; ONLY64-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; ONLY64-NEXT: [[T2:%.*]] = fadd float [[T1]], 1.250000e+00
+; ONLY64-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
+; ONLY64-NEXT: ret i16 [[T3]]
+;
+; MULTIPLE-LABEL: @neg_remainder(
+; MULTIPLE-NEXT: [[T1:%.*]] = uitofp i8 [[A:%.*]] to float
+; MULTIPLE-NEXT: [[T2:%.*]] = fadd float [[T1]], 1.250000e+00
+; MULTIPLE-NEXT: [[T3:%.*]] = fptoui float [[T2]] to i16
+; MULTIPLE-NEXT: ret i16 [[T3]]
;
%t1 = uitofp i8 %a to float
%t2 = fadd float %t1, 1.25
@@ -285,6 +629,24 @@ define i80 @neg_toolarge(i80 %a) {
; CHECK-NEXT: [[T2:%.*]] = fadd fp128 [[T1]], [[T1]]
; CHECK-NEXT: [[T3:%.*]] = fptoui fp128 [[T2]] to i80
; CHECK-NEXT: ret i80 [[T3]]
+;
+; NONE-LABEL: @neg_toolarge(
+; NONE-NEXT: [[T1:%.*]] = uitofp i80 [[A:%.*]] to fp128
+; NONE-NEXT: [[T2:%.*]] = fadd fp128 [[T1]], [[T1]]
+; NONE-NEXT: [[T3:%.*]] = fptoui fp128 [[T2]] to i80
+; NONE-NEXT: ret i80 [[T3]]
+;
+; ONLY64-LABEL: @neg_toolarge(
+; ONLY64-NEXT: [[T1:%.*]] = uitofp i80 [[A:%.*]] to fp128
+; ONLY64-NEXT: [[T2:%.*]] = fadd fp128 [[T1]], [[T1]]
+; ONLY64-NEXT: [[T3:%.*]] = fptoui fp128 [[T2]] to i80
+; ONLY64-NEXT: ret i80 [[T3]]
+;
+; MULTIPLE-LABEL: @neg_toolarge(
+; MULTIPLE-NEXT: [[T1:%.*]] = uitofp i80 [[A:%.*]] to fp128
+; MULTIPLE-NEXT: [[T2:%.*]] = fadd fp128 [[T1]], [[T1]]
+; MULTIPLE-NEXT: [[T3:%.*]] = fptoui fp128 [[T2]] to i80
+; MULTIPLE-NEXT: ret i80 [[T3]]
;
%t1 = uitofp i80 %a to fp128
%t2 = fadd fp128 %t1, %t1
@@ -304,6 +666,36 @@ define i32 @neg_calluser(i32 %value) {
; CHECK-NEXT: [[T6:%.*]] = zext i1 [[T3]] to i32
; CHECK-NEXT: [[T7:%.*]] = add i32 [[T6]], [[T5]]
; CHECK-NEXT: ret i32 [[T7]]
+;
+; NONE-LABEL: @neg_calluser(
+; NONE-NEXT: [[T1:%.*]] = sitofp i32 [[VALUE:%.*]] to double
+; NONE-NEXT: [[T2:%.*]] = fadd double [[T1]], 1.000000e+00
+; NONE-NEXT: [[T3:%.*]] = fcmp olt double [[T2]], 0.000000e+00
+; NONE-NEXT: [[T4:%.*]] = tail call double @g(double [[T2]])
+; NONE-NEXT: [[T5:%.*]] = fptosi double [[T4]] to i32
+; NONE-NEXT: [[T6:%.*]] = zext i1 [[T3]] to i32
+; NONE-NEXT: [[T7:%.*]] = add i32 [[T6]], [[T5]]
+; NONE-NEXT: ret i32 [[T7]]
+;
+; ONLY64-LABEL: @neg_calluser(
+; ONLY64-NEXT: [[T1:%.*]] = sitofp i32 [[VALUE:%.*]] to double
+; ONLY64-NEXT: [[T2:%.*]] = fadd double [[T1]], 1.000000e+00
+; ONLY64-NEXT: [[T3:%.*]] = fcmp olt double [[T2]], 0.000000e+00
+; ONLY64-NEXT: [[T4:%.*]] = tail call double @g(double [[T2]])
+; ONLY64-NEXT: [[T5:%.*]] = fptosi double [[T4]] to i32
+; ONLY64-NEXT: [[T6:%.*]] = zext i1 [[T3]] to i32
+; ONLY64-NEXT: [[T7:%.*]] = add i32 [[T6]], [[T5]]
+; ONLY64-NEXT: ret i32 [[T7]]
+;
+; MULTIPLE-LABEL: @neg_calluser(
+; MULTIPLE-NEXT: [[T1:%.*]] = sitofp i32 [[VALUE:%.*]] to double
+; MULTIPLE-NEXT: [[T2:%.*]] = fadd double [[T1]], 1.000000e+00
+; MULTIPLE-NEXT: [[T3:%.*]] = fcmp olt double [[T2]], 0.000000e+00
+; MULTIPLE-NEXT: [[T4:%.*]] = tail call double @g(double [[T2]])
+; MULTIPLE-NEXT: [[T5:%.*]] = fptosi double [[T4]] to i32
+; MULTIPLE-NEXT: [[T6:%.*]] = zext i1 [[T3]] to i32
+; MULTIPLE-NEXT: [[T7:%.*]] = add i32 [[T6]], [[T5]]
+; MULTIPLE-NEXT: ret i32 [[T7]]
;
%t1 = sitofp i32 %value to double
%t2 = fadd double %t1, 1.0
@@ -322,6 +714,21 @@ define <4 x i16> @neg_vector(<4 x i8> %a) {
; CHECK-NEXT: [[T1:%.*]] = uitofp <4 x i8> [[A:%.*]] to <4 x float>
; CHECK-NEXT: [[T2:%.*]] = fptoui <4 x float> [[T1]] to <4 x i16>
; CHECK-NEXT: ret <4 x i16> [[T2]]
+;
+; NONE-LABEL: @neg_vector(
+; NONE-NEXT: [[T1:%.*]] = uitofp <4 x i8> [[A:%.*]] to <4 x float>
+; NONE-NEXT: [[T2:%.*]] = fptoui <4 x float> [[T1]] to <4 x i16>
+; NONE-NEXT: ret <4 x i16> [[T2]]
+;
+; ONLY64-LABEL: @neg_vector(
+; ONLY64-NEXT: [[T1:%.*]] = uitofp <4 x i8> [[A:%.*]] to <4 x float>
+; ONLY64-NEXT: [[T2:%.*]] = fptoui <4 x float> [[T1]] to <4 x i16>
+; ONLY64-NEXT: ret <4 x i16> [[T2]]
+;
+; MULTIPLE-LABEL: @neg_vector(
+; MULTIPLE-NEXT: [[T1:%.*]] = uitofp <4 x i8> [[A:%.*]] to <4 x float>
+; MULTIPLE-NEXT: [[T2:%.*]] = fptoui <4 x float> [[T1]] to <4 x i16>
+; MULTIPLE-NEXT: ret <4 x i16> [[T2]]
;
%t1 = uitofp <4 x i8> %a to <4 x float>
%t2 = fptoui <4 x float> %t1 to <4 x i16>
@@ -340,6 +747,33 @@ define void @PR38502() {
; CHECK-NEXT: [[TOBOOL:%.*]] = fcmp une double [[INC]], 0.000000e+00
; CHECK-NEXT: br label [[BOGUSBB:%.*]]
;
+; NONE-LABEL: @PR38502(
+; NONE-NEXT: entry:
+; NONE-NEXT: ret void
+; NONE: bogusBB:
+; NONE-NEXT: [[INC1:%.*]] = fadd double [[INC:%.*]], 1.000000e+00
+; NONE-NEXT: [[INC]] = fadd double [[INC1]], 1.000000e+00
+; NONE-NEXT: [[TOBOOL:%.*]] = fcmp une double [[INC]], 0.000000e+00
+; NONE-NEXT: br label [[BOGUSBB:%.*]]
+;
+; ONLY64-LABEL: @PR38502(
+; ONLY64-NEXT: entry:
+; ONLY64-NEXT: ret void
+; ONLY64: bogusBB:
+; ONLY64-NEXT: [[INC1:%.*]] = fadd double [[INC:%.*]], 1.000000e+00
+; ONLY64-NEXT: [[INC]] = fadd double [[INC1]], 1.000000e+00
+; ONLY64-NEXT: [[TOBOOL:%.*]] = fcmp une double [[INC]], 0.000000e+00
+; ONLY64-NEXT: br label [[BOGUSBB:%.*]]
+;
+; MULTIPLE-LABEL: @PR38502(
+; MULTIPLE-NEXT: entry:
+; MULTIPLE-NEXT: ret void
+; MULTIPLE: bogusBB:
+; MULTIPLE-NEXT: [[INC1:%.*]] = fadd double [[INC:%.*]], 1.000000e+00
+; MULTIPLE-NEXT: [[INC]] = fadd double [[INC1]], 1.000000e+00
+; MULTIPLE-NEXT: [[TOBOOL:%.*]] = fcmp une double [[INC]], 0.000000e+00
+; MULTIPLE-NEXT: br label [[BOGUSBB:%.*]]
+;
entry:
ret void
>From b3bafd3eda69d8ce661b686e0c7abfd78c32bfc9 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Mon, 29 Jan 2024 13:48:34 -0500
Subject: [PATCH 2/3] [Transforms] Resolve FIXME: Pick the smallest legal type
that fits
Pick the type based on the smallest bit-width possible, using DataLayout.
---
.../llvm/Transforms/Scalar/Float2Int.h | 2 +-
llvm/lib/Transforms/Scalar/Float2Int.cpp | 27 ++--
llvm/test/Transforms/Float2Int/basic.ll | 129 +++++++++---------
3 files changed, 84 insertions(+), 74 deletions(-)
diff --git a/llvm/include/llvm/Transforms/Scalar/Float2Int.h b/llvm/include/llvm/Transforms/Scalar/Float2Int.h
index 83be329bed60b..337e229efcf37 100644
--- a/llvm/include/llvm/Transforms/Scalar/Float2Int.h
+++ b/llvm/include/llvm/Transforms/Scalar/Float2Int.h
@@ -44,7 +44,7 @@ class Float2IntPass : public PassInfoMixin<Float2IntPass> {
std::optional<ConstantRange> calcRange(Instruction *I);
void walkBackwards();
void walkForwards();
- bool validateAndTransform();
+ bool validateAndTransform(const DataLayout &DL);
Value *convert(Instruction *I, Type *ToTy);
void cleanup();
diff --git a/llvm/lib/Transforms/Scalar/Float2Int.cpp b/llvm/lib/Transforms/Scalar/Float2Int.cpp
index ccca8bcc1a56a..dd9c4e59d509a 100644
--- a/llvm/lib/Transforms/Scalar/Float2Int.cpp
+++ b/llvm/lib/Transforms/Scalar/Float2Int.cpp
@@ -311,7 +311,7 @@ void Float2IntPass::walkForwards() {
}
// If there is a valid transform to be done, do it.
-bool Float2IntPass::validateAndTransform() {
+bool Float2IntPass::validateAndTransform(const DataLayout &DL) {
bool MadeChange = false;
// Iterate over every disjoint partition of the def-use graph.
@@ -376,15 +376,21 @@ bool Float2IntPass::validateAndTransform() {
LLVM_DEBUG(dbgs() << "F2I: Value not guaranteed to be representable!\n");
continue;
}
- if (MinBW > 64) {
- LLVM_DEBUG(
- dbgs() << "F2I: Value requires more than 64 bits to represent!\n");
- continue;
- }
- // OK, R is known to be representable. Now pick a type for it.
- // FIXME: Pick the smallest legal type that will fit.
- Type *Ty = (MinBW > 32) ? Type::getInt64Ty(*Ctx) : Type::getInt32Ty(*Ctx);
+ // OK, R is known to be representable.
+ // Pick the smallest legal type that will fit.
+ Type *Ty = DL.getSmallestLegalIntType(*Ctx, MinBW);
+ if (!Ty) {
+ if (MinBW > 64) {
+ LLVM_DEBUG(dbgs() << "F2I: Value requires more than bits to represent "
+ "than the target supports!\n");
+ continue;
+ }
+
+ // Every supported target supports 64 and 32-bit
+ // integers.
+ Ty = (MinBW > 32) ? Type::getInt64Ty(*Ctx) : Type::getInt32Ty(*Ctx);
+ }
for (auto MI = ECs.member_begin(It), ME = ECs.member_end();
MI != ME; ++MI)
@@ -491,7 +497,8 @@ bool Float2IntPass::runImpl(Function &F, const DominatorTree &DT) {
walkBackwards();
walkForwards();
- bool Modified = validateAndTransform();
+ const DataLayout &DL = F.getParent()->getDataLayout();
+ bool Modified = validateAndTransform(DL);
if (Modified)
cleanup();
return Modified;
diff --git a/llvm/test/Transforms/Float2Int/basic.ll b/llvm/test/Transforms/Float2Int/basic.ll
index a812dd759e03b..393cc899756f6 100644
--- a/llvm/test/Transforms/Float2Int/basic.ll
+++ b/llvm/test/Transforms/Float2Int/basic.ll
@@ -21,16 +21,15 @@ define i16 @simple1(i8 %a) {
; NONE-NEXT: ret i16 [[TMP2]]
;
; ONLY64-LABEL: @simple1(
-; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; ONLY64-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 1
-; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
+; ONLY64-NEXT: [[T21:%.*]] = add i64 [[TMP1]], 1
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i16
; ONLY64-NEXT: ret i16 [[TMP2]]
;
; MULTIPLE-LABEL: @simple1(
-; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; MULTIPLE-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 1
-; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
-; MULTIPLE-NEXT: ret i16 [[TMP2]]
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
+; MULTIPLE-NEXT: [[T21:%.*]] = add i16 [[TMP1]], 1
+; MULTIPLE-NEXT: ret i16 [[T21]]
;
%t1 = uitofp i8 %a to float
%t2 = fadd float %t1, 1.0
@@ -52,15 +51,15 @@ define i8 @simple2(i8 %a) {
; NONE-NEXT: ret i8 [[TMP2]]
;
; ONLY64-LABEL: @simple2(
-; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; ONLY64-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
-; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i8
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
+; ONLY64-NEXT: [[T21:%.*]] = sub i64 [[TMP1]], 1
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i8
; ONLY64-NEXT: ret i8 [[TMP2]]
;
; MULTIPLE-LABEL: @simple2(
-; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; MULTIPLE-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
-; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i8
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
+; MULTIPLE-NEXT: [[T21:%.*]] = sub i16 [[TMP1]], 1
+; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i16 [[T21]] to i8
; MULTIPLE-NEXT: ret i8 [[TMP2]]
;
%t1 = uitofp i8 %a to float
@@ -81,14 +80,16 @@ define i32 @simple3(i8 %a) {
; NONE-NEXT: ret i32 [[T21]]
;
; ONLY64-LABEL: @simple3(
-; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; ONLY64-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
-; ONLY64-NEXT: ret i32 [[T21]]
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
+; ONLY64-NEXT: [[T21:%.*]] = sub i64 [[TMP1]], 1
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i32
+; ONLY64-NEXT: ret i32 [[TMP2]]
;
; MULTIPLE-LABEL: @simple3(
-; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; MULTIPLE-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
-; MULTIPLE-NEXT: ret i32 [[T21]]
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
+; MULTIPLE-NEXT: [[T21:%.*]] = sub i16 [[TMP1]], 1
+; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i16 [[T21]] to i32
+; MULTIPLE-NEXT: ret i32 [[TMP2]]
;
%t1 = uitofp i8 %a to float
%t2 = fsub float %t1, 1.0
@@ -110,15 +111,15 @@ define i1 @cmp(i8 %a, i8 %b) {
; NONE-NEXT: ret i1 [[T31]]
;
; ONLY64-LABEL: @cmp(
-; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
-; ONLY64-NEXT: [[T31:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
+; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i64
+; ONLY64-NEXT: [[T31:%.*]] = icmp slt i64 [[TMP1]], [[TMP2]]
; ONLY64-NEXT: ret i1 [[T31]]
;
; MULTIPLE-LABEL: @cmp(
-; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
-; MULTIPLE-NEXT: [[T31:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
+; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i16
+; MULTIPLE-NEXT: [[T31:%.*]] = icmp slt i16 [[TMP1]], [[TMP2]]
; MULTIPLE-NEXT: ret i1 [[T31]]
;
%t1 = uitofp i8 %a to float
@@ -174,11 +175,12 @@ define i32 @simple5(i8 %a, i8 %b) {
; NONE-NEXT: ret i32 [[T42]]
;
; ONLY64-LABEL: @simple5(
-; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
-; ONLY64-NEXT: [[T31:%.*]] = add i32 [[TMP1]], 1
-; ONLY64-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
-; ONLY64-NEXT: ret i32 [[T42]]
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
+; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i64
+; ONLY64-NEXT: [[T31:%.*]] = add i64 [[TMP1]], 1
+; ONLY64-NEXT: [[T42:%.*]] = mul i64 [[T31]], [[TMP2]]
+; ONLY64-NEXT: [[TMP3:%.*]] = trunc i64 [[T42]] to i32
+; ONLY64-NEXT: ret i32 [[TMP3]]
;
; MULTIPLE-LABEL: @simple5(
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
@@ -211,11 +213,12 @@ define i32 @simple6(i8 %a, i8 %b) {
; NONE-NEXT: ret i32 [[T42]]
;
; ONLY64-LABEL: @simple6(
-; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
-; ONLY64-NEXT: [[T31:%.*]] = sub i32 0, [[TMP1]]
-; ONLY64-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
-; ONLY64-NEXT: ret i32 [[T42]]
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
+; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i64
+; ONLY64-NEXT: [[T31:%.*]] = sub i64 0, [[TMP1]]
+; ONLY64-NEXT: [[T42:%.*]] = mul i64 [[T31]], [[TMP2]]
+; ONLY64-NEXT: [[TMP3:%.*]] = trunc i64 [[T42]] to i32
+; ONLY64-NEXT: ret i32 [[TMP3]]
;
; MULTIPLE-LABEL: @simple6(
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
@@ -257,23 +260,25 @@ define i32 @multi1(i8 %a, i8 %b, i8 %c, float %d) {
; NONE-NEXT: ret i32 [[R]]
;
; ONLY64-LABEL: @multi1(
-; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
+; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i64
; ONLY64-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
-; ONLY64-NEXT: [[X1:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; ONLY64-NEXT: [[X1:%.*]] = add i64 [[TMP1]], [[TMP2]]
+; ONLY64-NEXT: [[TMP3:%.*]] = trunc i64 [[X1]] to i32
; ONLY64-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
; ONLY64-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
-; ONLY64-NEXT: [[R:%.*]] = add i32 [[X1]], [[W]]
+; ONLY64-NEXT: [[R:%.*]] = add i32 [[TMP3]], [[W]]
; ONLY64-NEXT: ret i32 [[R]]
;
; MULTIPLE-LABEL: @multi1(
-; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
+; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i16
; MULTIPLE-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
-; MULTIPLE-NEXT: [[X1:%.*]] = add i32 [[TMP1]], [[TMP2]]
+; MULTIPLE-NEXT: [[X1:%.*]] = add i16 [[TMP1]], [[TMP2]]
+; MULTIPLE-NEXT: [[TMP3:%.*]] = zext i16 [[X1]] to i32
; MULTIPLE-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
; MULTIPLE-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
-; MULTIPLE-NEXT: [[R:%.*]] = add i32 [[X1]], [[W]]
+; MULTIPLE-NEXT: [[R:%.*]] = add i32 [[TMP3]], [[W]]
; MULTIPLE-NEXT: ret i32 [[R]]
;
%fa = uitofp i8 %a to float
@@ -301,16 +306,15 @@ define i16 @simple_negzero(i8 %a) {
; NONE-NEXT: ret i16 [[TMP2]]
;
; ONLY64-LABEL: @simple_negzero(
-; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; ONLY64-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 0
-; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
+; ONLY64-NEXT: [[T21:%.*]] = add i64 [[TMP1]], 0
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i16
; ONLY64-NEXT: ret i16 [[TMP2]]
;
; MULTIPLE-LABEL: @simple_negzero(
-; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; MULTIPLE-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 0
-; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
-; MULTIPLE-NEXT: ret i16 [[TMP2]]
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
+; MULTIPLE-NEXT: [[T21:%.*]] = add i16 [[TMP1]], 0
+; MULTIPLE-NEXT: ret i16 [[T21]]
;
%t1 = uitofp i8 %a to float
%t2 = fadd fast float %t1, -0.0
@@ -334,16 +338,16 @@ define i32 @simple_negative(i8 %call) {
; NONE-NEXT: ret i32 [[CONV3]]
;
; ONLY64-LABEL: @simple_negative(
-; ONLY64-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i32
-; ONLY64-NEXT: [[MUL1:%.*]] = mul i32 [[TMP1]], -3
-; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[MUL1]] to i8
+; ONLY64-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i64
+; ONLY64-NEXT: [[MUL1:%.*]] = mul i64 [[TMP1]], -3
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[MUL1]] to i8
; ONLY64-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
; ONLY64-NEXT: ret i32 [[CONV3]]
;
; MULTIPLE-LABEL: @simple_negative(
-; MULTIPLE-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i32
-; MULTIPLE-NEXT: [[MUL1:%.*]] = mul i32 [[TMP1]], -3
-; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[MUL1]] to i8
+; MULTIPLE-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i16
+; MULTIPLE-NEXT: [[MUL1:%.*]] = mul i16 [[TMP1]], -3
+; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i16 [[MUL1]] to i8
; MULTIPLE-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
; MULTIPLE-NEXT: ret i32 [[CONV3]]
;
@@ -368,16 +372,15 @@ define i16 @simple_fneg(i8 %a) {
; NONE-NEXT: ret i16 [[TMP2]]
;
; ONLY64-LABEL: @simple_fneg(
-; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; ONLY64-NEXT: [[T21:%.*]] = sub i32 0, [[TMP1]]
-; ONLY64-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
+; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
+; ONLY64-NEXT: [[T21:%.*]] = sub i64 0, [[TMP1]]
+; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i16
; ONLY64-NEXT: ret i16 [[TMP2]]
;
; MULTIPLE-LABEL: @simple_fneg(
-; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
-; MULTIPLE-NEXT: [[T21:%.*]] = sub i32 0, [[TMP1]]
-; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
-; MULTIPLE-NEXT: ret i16 [[TMP2]]
+; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
+; MULTIPLE-NEXT: [[T21:%.*]] = sub i16 0, [[TMP1]]
+; MULTIPLE-NEXT: ret i16 [[T21]]
;
%t1 = uitofp i8 %a to float
%t2 = fneg fast float %t1
>From 9600dd12df5df92f21bd2d251114ce276527afa0 Mon Sep 17 00:00:00 2001
From: AtariDreams <83477269+AtariDreams at users.noreply.github.com>
Date: Thu, 1 Feb 2024 11:35:07 -0500
Subject: [PATCH 3/3] Update llvm/test/Transforms/Float2Int/basic.ll
Co-authored-by: Nikita Popov <github at npopov.com>
---
llvm/test/Transforms/Float2Int/basic.ll | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/llvm/test/Transforms/Float2Int/basic.ll b/llvm/test/Transforms/Float2Int/basic.ll
index 393cc899756f6..98a73003efd0b 100644
--- a/llvm/test/Transforms/Float2Int/basic.ll
+++ b/llvm/test/Transforms/Float2Int/basic.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -passes='float2int' -S | FileCheck %s -check-prefix=NONE
-; RUN: opt < %s -passes='float2int' -S --data-layout="n64" | FileCheck %s -check-prefix=ONLY64
-; RUN: opt < %s -passes='float2int' -S --data-layout="n8:16:32:64"| FileCheck %s -check-prefix=MULTIPLE
+; RUN: opt < %s -passes='float2int' -S | FileCheck %s -check-prefixes=CHECK,NONE
+; RUN: opt < %s -passes='float2int' -S --data-layout="n64" | FileCheck %s -check-prefixes=CHECK,ONLY64
+; RUN: opt < %s -passes='float2int' -S --data-layout="n8:16:32:64"| FileCheck %s -check-prefixes=CHECK,MULTIPLE
;
; Positive tests
More information about the llvm-commits
mailing list