[llvm] [PowerPC] Mask constant operands in ValueBit tracking (PR #67653)

[Kai Luo via llvm-commits]

================
@@ -1635,7 +1635,7 @@ class BitPermutationSelector {
     default: break;
     case ISD::ROTL:
       if (isa<ConstantSDNode>(V.getOperand(1))) {
-        unsigned RotAmt = V.getConstantOperandVal(1);
+        unsigned RotAmt = V.getConstantOperandVal(1) & (NumBits - 1);
----------------
bzEq wrote:

```suggestion
        assert(isPowerOf2_32(NumBits) && "...");
        unsigned RotAmt = V.getConstantOperandVal(1) & (NumBits - 1);
```

https://github.com/llvm/llvm-project/pull/67653