[llvm] WIP: AMDGPU: Document more backend recognized attributes (PR #80239)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 31 20:16:19 PST 2024


https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/80239

None

>From 66a0f7ab5dc5a58425307011d334eb9da0b3c302 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Wed, 31 Jan 2024 13:59:01 +0530
Subject: [PATCH] WIP: AMDGPU: Document more backend recognized attributes

---
 llvm/docs/AMDGPUUsage.rst | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 6b2417143ca06..ee4af9f51998e 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -1312,6 +1312,31 @@ The AMDGPU backend supports the following LLVM IR attributes.
                                              the frame. This is an internal detail of how LDS variables are lowered,
                                              language front ends should not set this attribute.
 
+    "amdgpu-gds-size"                        Bytes expected to be allocated at the start of GDS memory at entry.
+
+    "amdgpu-git-ptr-high"                    The hard-wired high half of the address of the global information table
+                                             for AMDPAL OS type. 0xffffffff represents no hard-wired high half, since
+                                             current hardware only allows a 16 bit value.
+
+    "amdgpu-32bit-address-high-bits"         Assumed high 32-bits for
+                                             32-bit address spaces which are really truncated
+                                             64-bit addresses (i.e., addrspace(6))
+
+    "amdgpu-color-export"                    Assumed 1 for :ref:`amdgpu_ps <amdgpu_ps>`, and 0 for other calling conventions.
+
+    "amdgpu-depth-export"                    ..TODO:: Describe.
+
+    "InitialPSInputAddr"                     ..TODO:: Describe.
+
+
+    "amdgpu-wave-priority-threshold"         ..TODO:: Describe.
+
+    "amdgpu-memory-bound".                   Set internally by backend
+
+    "amdgpu-wave-limiter"                    Set internally by backend
+
+    "amdgpu-unroll-threshold"                ..TODO:: Describe.
+
      ======================================= ==========================================================
 
 Calling Conventions
@@ -1397,7 +1422,7 @@ The AMDGPU backend supports the following calling conventions:
      ``amdgpu_ls``                   Used for AMDPAL vertex shader if tessellation is in use.
                                      ..TODO::
                                      Describe.
-
+.. _amdgpu_ps:
      ``amdgpu_ps``                   Used for Mesa/AMDPAL pixel shaders.
                                      ..TODO::
                                      Describe.



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