[llvm] [Transforms] Let amdgcn take advantage of sin(-x) --> -sin(x) (PR #79700)
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Wed Jan 31 12:49:20 PST 2024
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/79700
>From 99436af2d31c7302d4b8a5663b522d1d24b404ad Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Mon, 29 Jan 2024 13:22:55 -0500
Subject: [PATCH 1/3] [Transforms] Add pre-commit tests [NFC]
---
.../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 44 +++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
index 804283cc20cd6..b59f74aa6e968 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -1023,6 +1023,50 @@ define float @cos_fabs_unary_fneg_f32(float %x) {
ret float %cos
}
+
+; --------------------------------------------------------------------
+; llvm.amdgcn.sin
+; --------------------------------------------------------------------
+declare float @llvm.amdgcn.sin.f32(float) nounwind readnone
+
+; CHECK-NEXT: ret float %cos
+define float @sin_fneg_f32(float %x) {
+; CHECK-LABEL: @sin_fneg_f32(
+; CHECK-NEXT: [[X_FNEG:%.*]] = fneg float [[X:%.*]]
+; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FNEG]])
+; CHECK-NEXT: ret float [[SIN]]
+;
+ %x.fneg = fsub float -0.0, %x
+ %sin = call float @llvm.amdgcn.sin.f32(float %x.fneg)
+ ret float %sin
+}
+
+; CHECK-NEXT: ret float %sin
+define float @sin_fabs_f32(float %x) {
+; CHECK-LABEL: @sin_fabs_f32(
+; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
+; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS]])
+; CHECK-NEXT: ret float [[SIN]]
+;
+ %x.fabs = call float @llvm.fabs.f32(float %x)
+ %sin = call float @llvm.amdgcn.sin.f32(float %x.fabs)
+ ret float %sin
+}
+
+; CHECK-NEXT: ret float %sin
+define float @sin_fabs_fneg_f32(float %x) {
+; CHECK-LABEL: @sin_fabs_fneg_f32(
+; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
+; CHECK-NEXT: [[X_FABS_FNEG:%.*]] = fneg float [[X_FABS]]
+; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS_FNEG]])
+; CHECK-NEXT: ret float [[SIN]]
+;
+ %x.fabs = call float @llvm.fabs.f32(float %x)
+ %x.fabs.fneg = fsub float -0.0, %x.fabs
+ %sin = call float @llvm.amdgcn.sin.f32(float %x.fabs.fneg)
+ ret float %sin
+}
+
; --------------------------------------------------------------------
; llvm.amdgcn.cvt.pkrtz
; --------------------------------------------------------------------
>From d90bf76b2d3655acc2c3e596bdbee3ec90973c82 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Wed, 31 Jan 2024 15:46:43 -0500
Subject: [PATCH 2/3] Update amdgcn-intrinsics.ll
---
llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
index b59f74aa6e968..8bffb1a7f9a3c 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -1029,7 +1029,7 @@ define float @cos_fabs_unary_fneg_f32(float %x) {
; --------------------------------------------------------------------
declare float @llvm.amdgcn.sin.f32(float) nounwind readnone
-; CHECK-NEXT: ret float %cos
+; CHECK-NEXT: ret float %sin
define float @sin_fneg_f32(float %x) {
; CHECK-LABEL: @sin_fneg_f32(
; CHECK-NEXT: [[X_FNEG:%.*]] = fneg float [[X:%.*]]
>From 9e450fdc7818459fe1f5c0a4c2cc241f6d2e4880 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Sat, 27 Jan 2024 12:54:09 -0500
Subject: [PATCH 3/3] [Transforms] Let amdgcn take advantage of sin(-x) -->
-sin(x)
We do it for amdgcn_cos, and we should do it for amdgcn_sin as well.
---
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp | 5 +++--
.../Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll | 8 ++++----
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index b7e73856f4060..415becb68c1d8 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -2497,11 +2497,12 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
}
break;
}
- case Intrinsic::sin: {
+ case Intrinsic::sin:
+ case Intrinsic::amdgcn_sin: {
Value *X;
if (match(II->getArgOperand(0), m_OneUse(m_FNeg(m_Value(X))))) {
// sin(-x) --> -sin(x)
- Value *NewSin = Builder.CreateUnaryIntrinsic(Intrinsic::sin, X, II);
+ Value *NewSin = Builder.CreateUnaryIntrinsic(IID, X, II);
Instruction *FNeg = UnaryOperator::CreateFNeg(NewSin);
FNeg->copyFastMathFlags(II);
return FNeg;
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
index 8bffb1a7f9a3c..c4cee365cdea1 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -1032,8 +1032,8 @@ declare float @llvm.amdgcn.sin.f32(float) nounwind readnone
; CHECK-NEXT: ret float %sin
define float @sin_fneg_f32(float %x) {
; CHECK-LABEL: @sin_fneg_f32(
-; CHECK-NEXT: [[X_FNEG:%.*]] = fneg float [[X:%.*]]
-; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FNEG]])
+; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X:%.*]])
+; CHECK-NEXT: [[SIN:%.*]] = fneg float [[TMP1]]
; CHECK-NEXT: ret float [[SIN]]
;
%x.fneg = fsub float -0.0, %x
@@ -1057,8 +1057,8 @@ define float @sin_fabs_f32(float %x) {
define float @sin_fabs_fneg_f32(float %x) {
; CHECK-LABEL: @sin_fabs_fneg_f32(
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
-; CHECK-NEXT: [[X_FABS_FNEG:%.*]] = fneg float [[X_FABS]]
-; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS_FNEG]])
+; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS]])
+; CHECK-NEXT: [[SIN:%.*]] = fneg float [[TMP1]]
; CHECK-NEXT: ret float [[SIN]]
;
%x.fabs = call float @llvm.fabs.f32(float %x)
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