[llvm] 648eb7c - [X86] divrem8_ext.ll - replace X32 check prefixes with X86
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 31 04:09:13 PST 2024
Author: Simon Pilgrim
Date: 2024-01-31T12:06:48Z
New Revision: 648eb7c1415afb818b45782e1f2758a1f7677496
URL: https://github.com/llvm/llvm-project/commit/648eb7c1415afb818b45782e1f2758a1f7677496
DIFF: https://github.com/llvm/llvm-project/commit/648eb7c1415afb818b45782e1f2758a1f7677496.diff
LOG: [X86] divrem8_ext.ll - replace X32 check prefixes with X86
We try to only use X32 for gnux32 triple tests.
Added:
Modified:
llvm/test/CodeGen/X86/divrem8_ext.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/divrem8_ext.ll b/llvm/test/CodeGen/X86/divrem8_ext.ll
index c722b827cf736..bfc982d2def5d 100644
--- a/llvm/test/CodeGen/X86/divrem8_ext.ll
+++ b/llvm/test/CodeGen/X86/divrem8_ext.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) {
-; X32-LABEL: test_udivrem_zext_ah:
-; X32: # %bb.0:
-; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: divb {{[0-9]+}}(%esp)
-; X32-NEXT: movzbl %ah, %ecx
-; X32-NEXT: movb %al, z
-; X32-NEXT: movl %ecx, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_udivrem_zext_ah:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: divb {{[0-9]+}}(%esp)
+; X86-NEXT: movzbl %ah, %ecx
+; X86-NEXT: movb %al, z
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_udivrem_zext_ah:
; X64: # %bb.0:
@@ -27,13 +27,13 @@ define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) {
}
define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) {
-; X32-LABEL: test_urem_zext_ah:
-; X32: # %bb.0:
-; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: divb {{[0-9]+}}(%esp)
-; X32-NEXT: movzbl %ah, %eax
-; X32-NEXT: # kill: def $al killed $al killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_urem_zext_ah:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: divb {{[0-9]+}}(%esp)
+; X86-NEXT: movzbl %ah, %eax
+; X86-NEXT: # kill: def $al killed $al killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_urem_zext_ah:
; X64: # %bb.0:
@@ -47,15 +47,15 @@ define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) {
}
define i8 @test_urem_noext_ah(i8 %x, i8 %y) {
-; X32-LABEL: test_urem_noext_ah:
-; X32: # %bb.0:
-; X32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: divb %cl
-; X32-NEXT: movzbl %ah, %eax
-; X32-NEXT: addb %cl, %al
-; X32-NEXT: # kill: def $al killed $al killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_urem_noext_ah:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: divb %cl
+; X86-NEXT: movzbl %ah, %eax
+; X86-NEXT: addb %cl, %al
+; X86-NEXT: # kill: def $al killed $al killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_urem_noext_ah:
; X64: # %bb.0:
@@ -71,13 +71,13 @@ define i8 @test_urem_noext_ah(i8 %x, i8 %y) {
}
define i64 @test_urem_zext64_ah(i8 %x, i8 %y) {
-; X32-LABEL: test_urem_zext64_ah:
-; X32: # %bb.0:
-; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: divb {{[0-9]+}}(%esp)
-; X32-NEXT: movzbl %ah, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_urem_zext64_ah:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: divb {{[0-9]+}}(%esp)
+; X86-NEXT: movzbl %ah, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_urem_zext64_ah:
; X64: # %bb.0:
@@ -91,14 +91,14 @@ define i64 @test_urem_zext64_ah(i8 %x, i8 %y) {
}
define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) {
-; X32-LABEL: test_sdivrem_sext_ah:
-; X32: # %bb.0:
-; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: idivb {{[0-9]+}}(%esp)
-; X32-NEXT: movsbl %ah, %ecx
-; X32-NEXT: movb %al, z
-; X32-NEXT: movl %ecx, %eax
-; X32-NEXT: retl
+; X86-LABEL: test_sdivrem_sext_ah:
+; X86: # %bb.0:
+; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: idivb {{[0-9]+}}(%esp)
+; X86-NEXT: movsbl %ah, %ecx
+; X86-NEXT: movb %al, z
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test_sdivrem_sext_ah:
; X64: # %bb.0:
@@ -115,13 +115,13 @@ define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) {
}
define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) {
-; X32-LABEL: test_srem_sext_ah:
-; X32: # %bb.0:
-; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: idivb {{[0-9]+}}(%esp)
-; X32-NEXT: movsbl %ah, %eax
-; X32-NEXT: # kill: def $al killed $al killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_srem_sext_ah:
+; X86: # %bb.0:
+; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: idivb {{[0-9]+}}(%esp)
+; X86-NEXT: movsbl %ah, %eax
+; X86-NEXT: # kill: def $al killed $al killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_srem_sext_ah:
; X64: # %bb.0:
@@ -135,15 +135,15 @@ define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) {
}
define i8 @test_srem_noext_ah(i8 %x, i8 %y) {
-; X32-LABEL: test_srem_noext_ah:
-; X32: # %bb.0:
-; X32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: idivb %cl
-; X32-NEXT: movsbl %ah, %eax
-; X32-NEXT: addb %cl, %al
-; X32-NEXT: # kill: def $al killed $al killed $eax
-; X32-NEXT: retl
+; X86-LABEL: test_srem_noext_ah:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: idivb %cl
+; X86-NEXT: movsbl %ah, %eax
+; X86-NEXT: addb %cl, %al
+; X86-NEXT: # kill: def $al killed $al killed $eax
+; X86-NEXT: retl
;
; X64-LABEL: test_srem_noext_ah:
; X64: # %bb.0:
@@ -159,14 +159,14 @@ define i8 @test_srem_noext_ah(i8 %x, i8 %y) {
}
define i64 @test_srem_sext64_ah(i8 %x, i8 %y) {
-; X32-LABEL: test_srem_sext64_ah:
-; X32: # %bb.0:
-; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: idivb {{[0-9]+}}(%esp)
-; X32-NEXT: movsbl %ah, %eax
-; X32-NEXT: movl %eax, %edx
-; X32-NEXT: sarl $31, %edx
-; X32-NEXT: retl
+; X86-LABEL: test_srem_sext64_ah:
+; X86: # %bb.0:
+; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: idivb {{[0-9]+}}(%esp)
+; X86-NEXT: movsbl %ah, %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: sarl $31, %edx
+; X86-NEXT: retl
;
; X64-LABEL: test_srem_sext64_ah:
; X64: # %bb.0:
@@ -181,15 +181,15 @@ define i64 @test_srem_sext64_ah(i8 %x, i8 %y) {
}
define i64 @pr25754(i8 %a, i8 %c) {
-; X32-LABEL: pr25754:
-; X32: # %bb.0:
-; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: divb {{[0-9]+}}(%esp)
-; X32-NEXT: movzbl %ah, %ecx
-; X32-NEXT: movzbl %al, %eax
-; X32-NEXT: addl %ecx, %eax
-; X32-NEXT: xorl %edx, %edx
-; X32-NEXT: retl
+; X86-LABEL: pr25754:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: divb {{[0-9]+}}(%esp)
+; X86-NEXT: movzbl %ah, %ecx
+; X86-NEXT: movzbl %al, %eax
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: retl
;
; X64-LABEL: pr25754:
; X64: # %bb.0:
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