[llvm] f292f90 - [InstCombine] Fold select with signbit idiom into fabs (#76342)

via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 30 23:42:13 PST 2024


Author: Yingwei Zheng
Date: 2024-01-31T15:42:09+08:00
New Revision: f292f90bc2ec2c1ec4306027e17877bb4603d8d2

URL: https://github.com/llvm/llvm-project/commit/f292f90bc2ec2c1ec4306027e17877bb4603d8d2
DIFF: https://github.com/llvm/llvm-project/commit/f292f90bc2ec2c1ec4306027e17877bb4603d8d2.diff

LOG: [InstCombine] Fold select with signbit idiom into fabs (#76342)

This patch folds:
```
((bitcast X to int) <s 0 ? -X : X) -> fabs(X)
((bitcast X to int) >s -1 ? X : -X) -> fabs(X)
((bitcast X to int) <s 0 ? X : -X) -> -fabs(X)
((bitcast X to int) >s -1 ? -X : X) -> -fabs(X)
```
Alive2: https://alive2.llvm.org/ce/z/rGepow

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
    llvm/test/Transforms/InstCombine/fabs.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 21bfc91148bfe..453e4d788705f 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -2767,6 +2767,37 @@ static Instruction *foldSelectWithFCmpToFabs(SelectInst &SI,
     }
   }
 
+  // Match select with (icmp slt (bitcast X to int), 0)
+  //                or (icmp sgt (bitcast X to int), -1)
+  if (ICmpInst::makeCmpResultType(SI.getType()) != CondVal->getType())
+    return ChangedFMF ? &SI : nullptr;
+
+  for (bool Swap : {false, true}) {
+    Value *TrueVal = SI.getTrueValue();
+    Value *X = SI.getFalseValue();
+
+    if (Swap)
+      std::swap(TrueVal, X);
+
+    CmpInst::Predicate Pred;
+    const APInt *C;
+    bool TrueIfSigned;
+    if (!match(CondVal, m_ICmp(Pred, m_BitCast(m_Specific(X)), m_APInt(C))) ||
+        !IC.isSignBitCheck(Pred, *C, TrueIfSigned))
+      continue;
+    if (!match(TrueVal, m_FNeg(m_Specific(X))))
+      return nullptr;
+    if (Swap == TrueIfSigned && !CondVal->hasOneUse() && !TrueVal->hasOneUse())
+      return nullptr;
+
+    // Fold (IsNeg ? -X : X) or (!IsNeg ? X : -X) to fabs(X)
+    // Fold (IsNeg ? X : -X) or (!IsNeg ? -X : X) to -fabs(X)
+    Value *Fabs = IC.Builder.CreateUnaryIntrinsic(Intrinsic::fabs, X, &SI);
+    if (Swap != TrueIfSigned)
+      return IC.replaceInstUsesWith(SI, Fabs);
+    return UnaryOperator::CreateFNegFMF(Fabs, &SI);
+  }
+
   return ChangedFMF ? &SI : nullptr;
 }
 

diff  --git a/llvm/test/Transforms/InstCombine/fabs.ll b/llvm/test/Transforms/InstCombine/fabs.ll
index acffc88380954..7e380c2e4590a 100644
--- a/llvm/test/Transforms/InstCombine/fabs.ll
+++ b/llvm/test/Transforms/InstCombine/fabs.ll
@@ -15,6 +15,7 @@ declare float @llvm.fma.f32(float, float, float)
 declare float @llvm.fmuladd.f32(float, float, float)
 
 declare void @use(float)
+declare void @usebool(i1)
 
 define float @replace_fabs_call_f32(float %x) {
 ; CHECK-LABEL: @replace_fabs_call_f32(
@@ -1034,3 +1035,209 @@ define <2 x float> @select_fneg_vec(<2 x i1> %c, <2 x float> %x) {
   %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %s)
   ret <2 x float> %fabs
 }
+
+define float @test_select_neg_negx_x(float %value) {
+; CHECK-LABEL: @test_select_neg_negx_x(
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = call float @llvm.fabs.f32(float [[VALUE:%.*]])
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp slt i32 %a0, 0
+  %fneg.i = fneg float %value
+  %value.addr.0.i = select i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+define float @test_select_nneg_negx_x(float %value) {
+; CHECK-LABEL: @test_select_nneg_negx_x(
+; CHECK-NEXT:    [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[VALUE:%.*]])
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = fneg float [[TMP1]]
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp sgt i32 %a0, -1
+  %fneg.i = fneg float %value
+  %value.addr.0.i = select i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+define float @test_select_neg_x_negx(float %value) {
+; CHECK-LABEL: @test_select_neg_x_negx(
+; CHECK-NEXT:    [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[VALUE:%.*]])
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = fneg float [[TMP1]]
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp slt i32 %a0, 0
+  %fneg.i = fneg float %value
+  %value.addr.0.i = select i1 %a1, float %value, float %fneg.i
+  ret float %value.addr.0.i
+}
+
+define float @test_select_nneg_x_negx(float %value) {
+; CHECK-LABEL: @test_select_nneg_x_negx(
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = call float @llvm.fabs.f32(float [[VALUE:%.*]])
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp sgt i32 %a0, -1
+  %fneg.i = fneg float %value
+  %value.addr.0.i = select i1 %a1, float %value, float %fneg.i
+  ret float %value.addr.0.i
+}
+
+define float @test_select_neg_negx_x_multiuse1(float %value) {
+; CHECK-LABEL: @test_select_neg_negx_x_multiuse1(
+; CHECK-NEXT:    [[A0:%.*]] = bitcast float [[VALUE:%.*]] to i32
+; CHECK-NEXT:    [[A1:%.*]] = icmp slt i32 [[A0]], 0
+; CHECK-NEXT:    call void @usebool(i1 [[A1]])
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = call float @llvm.fabs.f32(float [[VALUE]])
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp slt i32 %a0, 0
+  call void @usebool(i1 %a1)
+  %fneg.i = fneg float %value
+  %value.addr.0.i = select i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+define float @test_select_neg_negx_x_multiuse2(float %value) {
+; CHECK-LABEL: @test_select_neg_negx_x_multiuse2(
+; CHECK-NEXT:    [[FNEG_I:%.*]] = fneg float [[VALUE:%.*]]
+; CHECK-NEXT:    call void @use(float [[FNEG_I]])
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = call float @llvm.fabs.f32(float [[VALUE]])
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp slt i32 %a0, 0
+  %fneg.i = fneg float %value
+  call void @use(float %fneg.i)
+  %value.addr.0.i = select i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+define float @test_select_neg_negx_x_multiuse3(float %value) {
+; CHECK-LABEL: @test_select_neg_negx_x_multiuse3(
+; CHECK-NEXT:    [[A0:%.*]] = bitcast float [[VALUE:%.*]] to i32
+; CHECK-NEXT:    [[A1:%.*]] = icmp slt i32 [[A0]], 0
+; CHECK-NEXT:    call void @usebool(i1 [[A1]])
+; CHECK-NEXT:    [[FNEG_I:%.*]] = fneg float [[VALUE]]
+; CHECK-NEXT:    call void @use(float [[FNEG_I]])
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = call float @llvm.fabs.f32(float [[VALUE]])
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp slt i32 %a0, 0
+  call void @usebool(i1 %a1)
+  %fneg.i = fneg float %value
+  call void @use(float %fneg.i)
+  %value.addr.0.i = select i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+define float @test_select_neg_negx_x_fmf(float %value) {
+; CHECK-LABEL: @test_select_neg_negx_x_fmf(
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = call nnan ninf nsz float @llvm.fabs.f32(float [[VALUE:%.*]])
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp slt i32 %a0, 0
+  %fneg.i = fneg float %value
+  %value.addr.0.i = select nsz nnan ninf i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+define float @test_select_nneg_negx_x_fmf(float %value) {
+; CHECK-LABEL: @test_select_nneg_negx_x_fmf(
+; CHECK-NEXT:    [[TMP1:%.*]] = call nnan ninf nsz float @llvm.fabs.f32(float [[VALUE:%.*]])
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = fneg nnan ninf nsz float [[TMP1]]
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp sgt i32 %a0, -1
+  %fneg.i = fneg float %value
+  %value.addr.0.i = select nsz nnan ninf i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+; Negative tests
+
+define float @test_select_nneg_negx_x_multiuse4(float %value) {
+; CHECK-LABEL: @test_select_nneg_negx_x_multiuse4(
+; CHECK-NEXT:    [[A0:%.*]] = bitcast float [[VALUE:%.*]] to i32
+; CHECK-NEXT:    [[A1:%.*]] = icmp sgt i32 [[A0]], -1
+; CHECK-NEXT:    call void @usebool(i1 [[A1]])
+; CHECK-NEXT:    [[FNEG_I:%.*]] = fneg float [[VALUE]]
+; CHECK-NEXT:    call void @use(float [[FNEG_I]])
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = select i1 [[A1]], float [[FNEG_I]], float [[VALUE]]
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp sgt i32 %a0, -1
+  call void @usebool(i1 %a1)
+  %fneg.i = fneg float %value
+  call void @use(float %fneg.i)
+  %value.addr.0.i = select i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+define float @test_select_neg_negx_x_mismatched1(float %value, float %y) {
+; CHECK-LABEL: @test_select_neg_negx_x_mismatched1(
+; CHECK-NEXT:    [[A0:%.*]] = bitcast float [[Y:%.*]] to i32
+; CHECK-NEXT:    [[A1:%.*]] = icmp slt i32 [[A0]], 0
+; CHECK-NEXT:    [[FNEG_I:%.*]] = fneg float [[VALUE:%.*]]
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = select i1 [[A1]], float [[FNEG_I]], float [[VALUE]]
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %y to i32
+  %a1 = icmp slt i32 %a0, 0
+  %fneg.i = fneg float %value
+  %value.addr.0.i = select i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+define float @test_select_neg_negx_x_mismatched2(float %value, float %y) {
+; CHECK-LABEL: @test_select_neg_negx_x_mismatched2(
+; CHECK-NEXT:    [[A0:%.*]] = bitcast float [[VALUE:%.*]] to i32
+; CHECK-NEXT:    [[A1:%.*]] = icmp slt i32 [[A0]], 0
+; CHECK-NEXT:    [[FNEG_I:%.*]] = fneg float [[Y:%.*]]
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = select i1 [[A1]], float [[FNEG_I]], float [[VALUE]]
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp slt i32 %a0, 0
+  %fneg.i = fneg float %y
+  %value.addr.0.i = select i1 %a1, float %fneg.i, float %value
+  ret float %value.addr.0.i
+}
+
+define float @test_select_neg_negx_x_mismatched3(float %value, float %y) {
+; CHECK-LABEL: @test_select_neg_negx_x_mismatched3(
+; CHECK-NEXT:    [[A0:%.*]] = bitcast float [[VALUE:%.*]] to i32
+; CHECK-NEXT:    [[A1:%.*]] = icmp slt i32 [[A0]], 0
+; CHECK-NEXT:    [[FNEG_I:%.*]] = fneg float [[VALUE]]
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = select i1 [[A1]], float [[FNEG_I]], float [[Y:%.*]]
+; CHECK-NEXT:    ret float [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast float %value to i32
+  %a1 = icmp slt i32 %a0, 0
+  %fneg.i = fneg float %value
+  %value.addr.0.i = select i1 %a1, float %fneg.i, float %y
+  ret float %value.addr.0.i
+}
+
+define <2 x float> @test_select_neg_negx_x_wrong_type(<2 x float> %value) {
+; CHECK-LABEL: @test_select_neg_negx_x_wrong_type(
+; CHECK-NEXT:    [[A0:%.*]] = bitcast <2 x float> [[VALUE:%.*]] to i64
+; CHECK-NEXT:    [[A1:%.*]] = icmp slt i64 [[A0]], 0
+; CHECK-NEXT:    [[FNEG_I:%.*]] = fneg <2 x float> [[VALUE]]
+; CHECK-NEXT:    [[VALUE_ADDR_0_I:%.*]] = select i1 [[A1]], <2 x float> [[FNEG_I]], <2 x float> [[VALUE]]
+; CHECK-NEXT:    ret <2 x float> [[VALUE_ADDR_0_I]]
+;
+  %a0 = bitcast <2 x float> %value to i64
+  %a1 = icmp slt i64 %a0, 0
+  %fneg.i = fneg <2 x float> %value
+  %value.addr.0.i = select i1 %a1, <2 x float> %fneg.i, <2 x float> %value
+  ret <2 x float> %value.addr.0.i
+}


        


More information about the llvm-commits mailing list