[llvm] eef6485 - [AMDGPU] Use llvm::all_of (NFC)

[Kazu Hirata via llvm-commits]

Author: Kazu Hirata
Date: 2024-01-30T22:12:07-08:00
New Revision: eef6485ac1bffb6adf0b25ff4a117aa1590e70d0

URL: https://github.com/llvm/llvm-project/commit/eef6485ac1bffb6adf0b25ff4a117aa1590e70d0
DIFF: https://github.com/llvm/llvm-project/commit/eef6485ac1bffb6adf0b25ff4a117aa1590e70d0.diff

LOG: [AMDGPU] Use llvm::all_of (NFC)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
index 795bc898a7bfc..77935cb4cde1a 100644
--- a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
+++ b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
@@ -261,12 +261,8 @@ void R600VectorRegMerger::SwizzleInput(MachineInstr &MI,
 }
 
 bool R600VectorRegMerger::areAllUsesSwizzeable(Register Reg) const {
-  for (MachineRegisterInfo::use_instr_iterator It = MRI->use_instr_begin(Reg),
-      E = MRI->use_instr_end(); It != E; ++It) {
-    if (!canSwizzle(*It))
-      return false;
-  }
-  return true;
+  return llvm::all_of(MRI->use_instructions(Reg),
+                      [&](const MachineInstr &MI) { return canSwizzle(MI); });
 }
 
 bool R600VectorRegMerger::tryMergeUsingCommonSlot(RegSeqInfo &RSI,