[llvm] [AsmPrinter][DebugNames] Implement DW_IDX_parent entries (PR #77457)
Alexander Yermolovich via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 30 18:16:58 PST 2024
================
@@ -395,36 +401,90 @@ void Dwarf5AccelTableWriter::Header::emit(Dwarf5AccelTableWriter &Ctx) {
Asm->OutStreamer->emitBytes({AugmentationString, AugmentationStringSize});
}
-static uint32_t constexpr LowerBitSize = dwarf::DW_IDX_type_hash;
+std::optional<uint64_t>
+DWARF5AccelTableData::getDefiningParentDieOffset(const DIE &Die) {
+ if (auto *Parent = Die.getParent();
+ Parent && !Parent->findAttribute(dwarf::Attribute::DW_AT_declaration))
+ return Parent->getOffset();
+ return {};
+}
+
+enum IdxParentEncoding : uint8_t {
+ NoIndexedParent = 0, /// Parent information present but parent isn't indexed.
+ Ref4 = 1, /// Parent information present and parent is indexed.
+ NoParent = 2, /// Parent information missing.
+};
+
+static uint32_t constexpr NumBitsIdxParent = 2;
+
+uint8_t encodeIdxParent(const std::optional<dwarf::Form> MaybeParentForm) {
+ if (!MaybeParentForm)
+ return NoParent;
+ switch (*MaybeParentForm) {
+ case dwarf::Form::DW_FORM_flag_present:
+ return NoIndexedParent;
+ case dwarf::Form::DW_FORM_ref4:
+ return Ref4;
+ default:
+ // This is not crashing on bad input: we should only reach this if the
+ // internal compiler logic is faulty; see getFormForIdxParent.
+ llvm_unreachable("Bad form for IDX_parent");
+ }
+}
+
+static uint32_t constexpr ParentBitOffset = dwarf::DW_IDX_type_hash;
+static uint32_t constexpr TagBitOffset = ParentBitOffset + NumBitsIdxParent;
static uint32_t getTagFromAbbreviationTag(const uint32_t AbbrvTag) {
- return AbbrvTag >> LowerBitSize;
+ return AbbrvTag >> TagBitOffset;
}
----------------
ayermolo wrote:
Combining the two. Something like:
```
union AbbrevDescriptor {
struct {
uint32_t CompUnit : 1;
uint32_t TypeUnit : 1;
uint32_t DieOffset : 1;
uint32_t Parent : 1;
uint32_t TypeHash : 1;
uint32_t Tag : 27;
} Bits;
uint32_t Value = 0;
};
DWARF5AcceleratorTable::TagIndex DWARF5AcceleratorTable::getTagFromAbbreviationTagAndIndex(const uint32_t AbbrvTag) const {
auto Iter = AbbrevTagToIndexMap.find(AbbrvTag);
assert(Iter != AbbrevTagToIndexMap.end() && "No index for an abbreviation tag");
AbbrevDescriptor AbbrvDesc;
AbbrvDesc.Value = AbbrvTag;
return {(uint32_t)AbbrvDesc.Bits.Tag, Iter->second};
}
DWARF5AcceleratorTable::TagIndex DWARF5AcceleratorTable::getTagFromAbbreviationTagAndIndex(const uint32_t AbbrvTag) const {
auto Iter = AbbrevTagToIndexMap.find(AbbrvTag);
assert(Iter != AbbrevTagToIndexMap.end() && "No index for an abbreviation tag");
AbbrevDescriptor AbbrvDesc;
AbbrvDesc.Value = AbbrvTag;
return {(uint32_t)AbbrvDesc.Bits.Tag, Iter->second};
}
/// Constructs a unique AbbrevTag that captures what a DIE accesses.
/// Returns an index in the Abbreviation table.
uint32_t DWARF5AcceleratorTable::constructAbbreviationTag(
const unsigned Tag,
const std::optional<DWARF5AccelTable::UnitIndexAndEncoding> &EntryRet,
const std::optional<DWARF5AccelTable::UnitIndexAndEncoding>
&SecondEntryRet) {
AbbrevDescriptor AbbrvDesc;
auto setFields =
[&](const std::optional<DWARF5AccelTable::UnitIndexAndEncoding> &Entry)
-> void {
if (!Entry)
return;
switch (Entry->Encoding.Index) {
case dwarf::DW_IDX_compile_unit:
AbbrvDesc.Bits.CompUnit = true;
break;
case dwarf::DW_IDX_type_unit:
AbbrvDesc.Bits.TypeUnit = true;
break;
case dwarf::DW_IDX_parent:
AbbrvDesc.Bits.Parent = true;
break;
case dwarf::DW_IDX_type_hash:
AbbrvDesc.Bits.TypeHash = true;
break;
default:
return;
}
};
setFields(EntryRet);
setFields(SecondEntryRet);
AbbrvDesc.Bits.DieOffset = true;
AbbrvDesc.Bits.Tag = Tag;
AbbrevTagToIndexMap.insert({AbbrvDesc.Value, (uint32_t)(AbbrevTagToIndexMap.size() + 1)});
return AbbrvDesc.Value;
}
```
https://github.com/llvm/llvm-project/pull/77457
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