[llvm] [InstCombine] Loosen one-use restriction if common operand is constant (PR #79767)

[via llvm-commits]

https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/79767

>From ce041cc595402dcad48887093617181ff842ab77 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Sun, 28 Jan 2024 15:32:44 -0500
Subject: [PATCH 1/2] [InstCombine] pre-commit tests (NFC)

---
 .../test/Transforms/InstCombine/xor-and-or.ll | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/llvm/test/Transforms/InstCombine/xor-and-or.ll b/llvm/test/Transforms/InstCombine/xor-and-or.ll
index feba47912b1da..7bb83ecdf7736 100644
--- a/llvm/test/Transforms/InstCombine/xor-and-or.ll
+++ b/llvm/test/Transforms/InstCombine/xor-and-or.ll
@@ -241,4 +241,23 @@ define i1 @xor_and_or_negative_oneuse(i1 %c, i1 %x, i1 %y) {
   ret i1 %r
 }
 
+ at A = global i32 10
+
+define i32 @xor_and_or_constant(i32 %B, i32 %C) {
+; CHECK-LABEL: @xor_and_or_constant(
+; CHECK-NEXT:    [[A_VAL:%.*]] = load i32, ptr @A, align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = or i32 [[A_VAL]], [[B:%.*]]
+; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[A_VAL]], [[C:%.*]]
+; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT:    ret i32 [[TMP3]]
+;
+  %A_val = load i32, i32* @A
+  %1 = or i32 %A_val, %B
+  %2 = or i32 %A_val, %C
+  %3 = xor i32 %1, %2
+  %4 = xor i32 %A_val, -1
+  %5 = and i32 %3, %4
+  ret i32 %5
+}
+
 declare void @use(i1)

>From 18743bdd8e0ac73dec7699aeae114e8c73562665 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Sun, 28 Jan 2024 13:30:29 -0500
Subject: [PATCH 2/2] [InstCombine] Loosen one-use restriction if common
 operand is constant

Add a new version that checks if A is a constant instead of one-use.
---
 .../Transforms/InstCombine/InstCombineAndOrXor.cpp    | 11 ++++++++++-
 llvm/test/Transforms/InstCombine/xor-and-or.ll        |  6 +++---
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index 5fd944a859ef0..c8c090f18711a 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -4756,7 +4756,6 @@ Instruction *InstCombinerImpl::visitXor(BinaryOperator &I) {
     return BinaryOperator::CreateNot(Builder.CreateAnd(Op0, B));
 
   // (A | B) ^ (A | C) --> (B ^ C) & ~A -- There are 4 commuted variants.
-  // TODO: Loosen one-use restriction if common operand is a constant.
   Value *D;
   if (match(Op0, m_OneUse(m_Or(m_Value(A), m_Value(B)))) &&
       match(Op1, m_OneUse(m_Or(m_Value(C), m_Value(D))))) {
@@ -4770,6 +4769,16 @@ Instruction *InstCombinerImpl::visitXor(BinaryOperator &I) {
     }
   }
 
+  // (A | B) ^ (A | C) --> (B ^ C) & ~A -- There are 4 commuted variants.
+  // We do this if common operand is a constant.
+  if (match(Op0, m_c_Or(m_Value(A), m_Value(B))) &&
+      match(Op1, m_c_Or(m_Specific(A), m_Value(C)))) {
+    if (match(A, m_ImmConstant())) {
+      Value *NotA = Builder.CreateNot(A);
+      return BinaryOperator::CreateAnd(Builder.CreateXor(B, C), NotA);
+    }
+  }
+
   // (A & B) ^ (A | C) --> A ? ~B : C -- There are 4 commuted variants.
   if (I.getType()->isIntOrIntVectorTy(1) &&
       match(Op0, m_OneUse(m_LogicalAnd(m_Value(A), m_Value(B)))) &&
diff --git a/llvm/test/Transforms/InstCombine/xor-and-or.ll b/llvm/test/Transforms/InstCombine/xor-and-or.ll
index 7bb83ecdf7736..a8aa9e5b3e019 100644
--- a/llvm/test/Transforms/InstCombine/xor-and-or.ll
+++ b/llvm/test/Transforms/InstCombine/xor-and-or.ll
@@ -246,9 +246,9 @@ define i1 @xor_and_or_negative_oneuse(i1 %c, i1 %x, i1 %y) {
 define i32 @xor_and_or_constant(i32 %B, i32 %C) {
 ; CHECK-LABEL: @xor_and_or_constant(
 ; CHECK-NEXT:    [[A_VAL:%.*]] = load i32, ptr @A, align 4
-; CHECK-NEXT:    [[TMP1:%.*]] = or i32 [[A_VAL]], [[B:%.*]]
-; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[A_VAL]], [[C:%.*]]
-; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT:    [[TMP1:%.*]] = xor i32 [[A_VAL]], -1
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[B:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[TMP3:%.*]] = and i32 [[TMP2]], [[TMP1]]
 ; CHECK-NEXT:    ret i32 [[TMP3]]
 ;
   %A_val = load i32, i32* @A