[llvm] [AArch64][GlobalISel] Legalize BSWAP for Vector Types (PR #80036)

[David Green via llvm-commits]

================
@@ -5163,6 +5163,13 @@ def : Pat<(v8i16 (concat_vectors
                                            (v4i32 VImm8000)))))),
           (SQXTNv8i16 (INSERT_SUBREG (IMPLICIT_DEF), V64:$Vd, dsub), V128:$Vn)>;
 
+// Select BSWAP vector instructions into REV instructions
+def : Pat<(v4i16 (bswap (v4i16 V64:$Rn))), (v4i16 (REV16v8i8 (v4i16 V64:$Rn)))>;
----------------
davemgreen wrote:

I prefer it when patterns are:
```
def : Pat<(Input),
          (Output)>;
```
It makes the easier to parse.

https://github.com/llvm/llvm-project/pull/80036