[llvm] [InstCombine] Remove shl if we only demand known signbits of shift source (PR #79014)

[via llvm-commits]

================
@@ -640,25 +640,31 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
                                                     DemandedMask, Known))
             return R;
 
-      // TODO: If we only want bits that already match the signbit then we don't
+      uint64_t ShiftAmt = SA->getLimitedValue(BitWidth - 1);
+      // If we only want bits that already match the signbit then we don't
       // need to shift.
+      if (DemandedMask.countr_zero() >= ShiftAmt) {
+        unsigned NumLowDemandedBits = BitWidth - DemandedMask.countr_zero();
+        unsigned SignBits =
+            ComputeNumSignBits(I->getOperand(0), Depth + 1, CxtI);
+        if (SignBits > ShiftAmt && SignBits - ShiftAmt >= NumLowDemandedBits)
----------------
ParkHanbum wrote:

I'm update alive link for showing verification of case `SignBits == ShiftAmt` and `SignBits > ShiftAmt && SignBits - ShiftAmt >= NumHighDemandedBits`.  if I misunderstand of it, please let me know.

https://github.com/llvm/llvm-project/pull/79014