[llvm] [clang] [NVPTX] Add 'activemask' builtin and intrinsic support (PR #79768)

[Artem Belevich via llvm-commits]

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@@ -65,7 +65,7 @@ def : Proc<"sm_61", [SM61, PTX50]>;
 def : Proc<"sm_62", [SM62, PTX50]>;
 def : Proc<"sm_70", [SM70, PTX60]>;
 def : Proc<"sm_72", [SM72, PTX61]>;
-def : Proc<"sm_75", [SM75, PTX63]>;
+def : Proc<"sm_75", [SM75, PTX62, PTX63]>;
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Artem-B wrote:

Why are we adding PTX62 here?

According to [PTX docs](https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#release-notes-ptx-release-history) sm_75 has been introduced in PTX ISA 6.3 in CUDA-10.0.

https://github.com/llvm/llvm-project/pull/79768