[llvm] [BDCE] Handle multi-use `select` of `and`s on demanded bits (PR #79688)

[via llvm-commits]

XChy wrote:

For a single BDCE pass, I think a minimal testcase can be like:
```llvm
define void @src(i64 %a) {
entry:
  %and = and i64 %a, 24
  %ret1 = and i64 %and, 8
  %ret2 = and i64 %and, 16
  call void @use(i64 %ret1)
  call void @use(i64 %ret2)
  ret void
}

define void @tgt(i64 %a) {
entry:
  %ret1 = and i64 %a, 8
  %ret2 = and i64 %a, 16
  call void @use(i64 %ret1)
  call void @use(i64 %ret2)
  ret void
}
```

https://github.com/llvm/llvm-project/pull/79688