[llvm] [AArch64][SVE2] Generate urshr/srshr rounding shift rights (PR #78374)

Usman Nadeem via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 26 19:43:35 PST 2024


UsmanNadeem wrote:

- Handled overflows.
- Added the following combine for wide shifts: `uzp1(urshr(uunpklo(X),C), urshr(uunpkhi(X), C)) -> urshr(X, C)`
- Removed code for signed RSHR for now.

https://github.com/llvm/llvm-project/pull/78374


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