[llvm] [PowerPC] adjust cost for vector insert/extract with non const index (PR #79092)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 26 07:34:12 PST 2024
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@@ -697,39 +697,51 @@ InstructionCost PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
return Cost;
- } else if (Val->getScalarType()->isIntegerTy() && Index != -1U) {
+ } else if (Val->getScalarType()->isIntegerTy()) {
unsigned EltSize = Val->getScalarSizeInBits();
// Computing on 1 bit values requires extra mask or compare operations.
- unsigned MaskCost = VecMaskCost && EltSize == 1 ? 1 : 0;
+ unsigned MaskCostForOneBitSize = (VecMaskCost && EltSize == 1) ? 1 : 0;
+ // Computing on non const index requires extra mask or compare operations.
+ unsigned MaskCostForIdx = (Index != -1U) ? 0 : 1;
if (ST->hasP9Altivec()) {
- if (ISD == ISD::INSERT_VECTOR_ELT)
- // A move-to VSR and a permute/insert. Assume vector operation cost
- // for both (cost will be 2x on P9).
- return 2 * CostFactor;
-
- // It's an extract. Maybe we can do a cheap move-from VSR.
- unsigned EltSize = Val->getScalarSizeInBits();
- if (EltSize == 64) {
- unsigned MfvsrdIndex = ST->isLittleEndian() ? 1 : 0;
- if (Index == MfvsrdIndex)
- return 1;
- } else if (EltSize == 32) {
- unsigned MfvsrwzIndex = ST->isLittleEndian() ? 2 : 1;
- if (Index == MfvsrwzIndex)
- return 1;
- }
-
- // We need a vector extract (or mfvsrld). Assume vector operation cost.
- // The cost of the load constant for a vector extract is disregarded
- // (invariant, easily schedulable).
- return CostFactor + MaskCost;
+ // P10 has vxform insert which can handle non const index. The MaskCost is
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RolandF77 wrote:
nit: MaskCost => maskCostForIdx
https://github.com/llvm/llvm-project/pull/79092
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