[llvm] 0d5ba8a - [X86] Comment all getTargetConstantBitsFromNode calls that override the Whole/Partial Undefs flags. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 26 06:49:13 PST 2024
Author: Simon Pilgrim
Date: 2024-01-26T14:48:58Z
New Revision: 0d5ba8ace697a7ebc08e4eaa2be3aa959aabe298
URL: https://github.com/llvm/llvm-project/commit/0d5ba8ace697a7ebc08e4eaa2be3aa959aabe298
DIFF: https://github.com/llvm/llvm-project/commit/0d5ba8ace697a7ebc08e4eaa2be3aa959aabe298.diff
LOG: [X86] Comment all getTargetConstantBitsFromNode calls that override the Whole/Partial Undefs flags. NFC.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 86de5dd0c3f0974..c17ca55eda910d1 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4926,9 +4926,9 @@ namespace X86 {
bool isConstantSplat(SDValue Op, APInt &SplatVal, bool AllowPartialUndefs) {
APInt UndefElts;
SmallVector<APInt, 16> EltBits;
- if (getTargetConstantBitsFromNode(Op, Op.getScalarValueSizeInBits(),
- UndefElts, EltBits, true,
- AllowPartialUndefs)) {
+ if (getTargetConstantBitsFromNode(
+ Op, Op.getScalarValueSizeInBits(), UndefElts, EltBits,
+ /*AllowWholeUndefs*/ true, AllowPartialUndefs)) {
int SplatIndex = -1;
for (int i = 0, e = EltBits.size(); i != e; ++i) {
if (UndefElts[i])
@@ -5533,9 +5533,11 @@ static bool getTargetShuffleAndZeroables(SDValue N, SmallVectorImpl<int> &Mask,
SmallVector<APInt, 32> SrcEltBits[2];
bool IsSrcConstant[2] = {
getTargetConstantBitsFromNode(V1, EltSizeInBits, UndefSrcElts[0],
- SrcEltBits[0], true, false),
+ SrcEltBits[0], /*AllowWholeUndefs*/ true,
+ /*AllowPartialUndefs*/ false),
getTargetConstantBitsFromNode(V2, EltSizeInBits, UndefSrcElts[1],
- SrcEltBits[1], true, false)};
+ SrcEltBits[1], /*AllowWholeUndefs*/ true,
+ /*AllowPartialUndefs*/ false)};
for (int i = 0; i < Size; ++i) {
int M = Mask[i];
@@ -5647,7 +5649,8 @@ static bool createShuffleMaskFromVSELECT(SmallVectorImpl<int> &Mask,
APInt UndefElts;
SmallVector<APInt, 32> EltBits;
if (!getTargetConstantBitsFromNode(Cond, EltSizeInBits, UndefElts, EltBits,
- true, false))
+ /*AllowWholeUndefs*/ true,
+ /*AllowPartialUndefs*/ false))
return false;
Mask.resize(NumElts, SM_SentinelUndef);
@@ -23261,9 +23264,9 @@ static SDValue LowerVSETCC(SDValue Op, const X86Subtarget &Subtarget,
if (BC0.getOpcode() == ISD::AND) {
APInt UndefElts;
SmallVector<APInt, 64> EltBits;
- if (getTargetConstantBitsFromNode(BC0.getOperand(1),
- VT.getScalarSizeInBits(), UndefElts,
- EltBits, false, false)) {
+ if (getTargetConstantBitsFromNode(
+ BC0.getOperand(1), VT.getScalarSizeInBits(), UndefElts, EltBits,
+ /*AllowWholeUndefs*/ false, /*AllowPartialUndefs*/ false)) {
if (llvm::all_of(EltBits, [](APInt &V) { return V.isPowerOf2(); })) {
Cond = ISD::SETEQ;
Op1 = DAG.getBitcast(VT, BC0.getOperand(1));
@@ -44156,7 +44159,8 @@ static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG,
SmallVector<APInt, 16> EltBits;
unsigned VecEltBitWidth = SrcVT.getScalarSizeInBits();
if (getTargetConstantBitsFromNode(InputVector, VecEltBitWidth, UndefVecElts,
- EltBits, true, false)) {
+ EltBits, /*AllowWholeUndefs*/ true,
+ /*AllowPartialUndefs*/ false)) {
uint64_t Idx = CIdx->getZExtValue();
if (UndefVecElts[Idx])
return IsPextr ? DAG.getConstant(0, dl, VT) : DAG.getUNDEF(VT);
@@ -47492,7 +47496,9 @@ static SDValue combineVectorShiftVar(SDNode *N, SelectionDAG &DAG,
// Detect constant shift amounts.
APInt UndefElts;
SmallVector<APInt, 32> EltBits;
- if (getTargetConstantBitsFromNode(N1, 64, UndefElts, EltBits, true, false)) {
+ if (getTargetConstantBitsFromNode(N1, 64, UndefElts, EltBits,
+ /*AllowWholeUndefs*/ true,
+ /*AllowPartialUndefs*/ false)) {
unsigned X86Opc = getTargetVShiftUniformOpcode(N->getOpcode(), false);
return getTargetVShiftByConstNode(X86Opc, SDLoc(N), VT.getSimpleVT(), N0,
EltBits[0].getZExtValue(), DAG);
@@ -48812,10 +48818,12 @@ static SDValue canonicalizeBitSelect(SDNode *N, SelectionDAG &DAG,
APInt UndefElts0, UndefElts1;
SmallVector<APInt, 32> EltBits0, EltBits1;
if (!getTargetConstantBitsFromNode(N0.getOperand(1), 8, UndefElts0, EltBits0,
- false, false))
+ /*AllowWholeUndefs*/ false,
+ /*AllowPartialUndefs*/ false))
return SDValue();
if (!getTargetConstantBitsFromNode(N1.getOperand(1), 8, UndefElts1, EltBits1,
- false, false))
+ /*AllowWholeUndefs*/ false,
+ /*AllowPartialUndefs*/ false))
return SDValue();
for (unsigned i = 0, e = EltBits0.size(); i != e; ++i) {
@@ -55151,7 +55159,8 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
APInt OpUndefElts;
SmallVector<APInt> OpEltBits;
if (!getTargetConstantBitsFromNode(Ops[I], EltSizeInBits, OpUndefElts,
- OpEltBits, true, false))
+ OpEltBits, /*AllowWholeUndefs*/ true,
+ /*AllowPartialUndefs*/ false))
break;
EltBits.append(OpEltBits);
UndefElts.insertBits(OpUndefElts, I * OpUndefElts.getBitWidth());
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