[llvm] 821dee9 - [X86][CodeGen] Add NDD entries for isAssociativeAndCommutative
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 26 02:40:51 PST 2024
Author: Shengchen Kan
Date: 2024-01-26T18:39:52+08:00
New Revision: 821dee98526057286ec2161b3c40ad6676b5377f
URL: https://github.com/llvm/llvm-project/commit/821dee98526057286ec2161b3c40ad6676b5377f
DIFF: https://github.com/llvm/llvm-project/commit/821dee98526057286ec2161b3c40ad6676b5377f.diff
LOG: [X86][CodeGen] Add NDD entries for isAssociativeAndCommutative
Added:
Modified:
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/test/CodeGen/X86/apx/mul-i1024.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 975d12d271d836..dfd3d888870861 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -9517,25 +9517,25 @@ bool X86InstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst,
if (Invert)
return false;
switch (Inst.getOpcode()) {
- case X86::ADD8rr:
- case X86::ADD16rr:
- case X86::ADD32rr:
- case X86::ADD64rr:
- case X86::AND8rr:
- case X86::AND16rr:
- case X86::AND32rr:
- case X86::AND64rr:
- case X86::OR8rr:
- case X86::OR16rr:
- case X86::OR32rr:
- case X86::OR64rr:
- case X86::XOR8rr:
- case X86::XOR16rr:
- case X86::XOR32rr:
- case X86::XOR64rr:
- case X86::IMUL16rr:
- case X86::IMUL32rr:
- case X86::IMUL64rr:
+ CASE_ND(ADD8rr)
+ CASE_ND(ADD16rr)
+ CASE_ND(ADD32rr)
+ CASE_ND(ADD64rr)
+ CASE_ND(AND8rr)
+ CASE_ND(AND16rr)
+ CASE_ND(AND32rr)
+ CASE_ND(AND64rr)
+ CASE_ND(OR8rr)
+ CASE_ND(OR16rr)
+ CASE_ND(OR32rr)
+ CASE_ND(OR64rr)
+ CASE_ND(XOR8rr)
+ CASE_ND(XOR16rr)
+ CASE_ND(XOR32rr)
+ CASE_ND(XOR64rr)
+ CASE_ND(IMUL16rr)
+ CASE_ND(IMUL32rr)
+ CASE_ND(IMUL64rr)
case X86::PANDrr:
case X86::PORrr:
case X86::PXORrr:
diff --git a/llvm/test/CodeGen/X86/apx/mul-i1024.ll b/llvm/test/CodeGen/X86/apx/mul-i1024.ll
index 2eaa161225e4a2..2b99c44fc769a2 100644
--- a/llvm/test/CodeGen/X86/apx/mul-i1024.ll
+++ b/llvm/test/CodeGen/X86/apx/mul-i1024.ll
@@ -1618,9 +1618,9 @@ define void @test_1024(ptr %a, ptr %b, ptr %out) nounwind {
; EGPR-NDD-NEXT: movq %r22, %rax
; EGPR-NDD-NEXT: mulq %rdi
; EGPR-NDD-NEXT: movq %rax, %r26
-; EGPR-NDD-NEXT: imulq 120(%r20), %r22, %rax
+; EGPR-NDD-NEXT: imulq %rdi, %r21, %rax
; EGPR-NDD-NEXT: addq %rdx, %rax
-; EGPR-NDD-NEXT: imulq %rdi, %r21, %rdx
+; EGPR-NDD-NEXT: imulq 120(%r20), %r22, %rdx
; EGPR-NDD-NEXT: addq %rdx, %rax, %r8
; EGPR-NDD-NEXT: movq 96(%r20), %r28
; EGPR-NDD-NEXT: movq 104(%r20), %rdi
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