[llvm] [NewPM][CodeGen] add TargetPassConfig like API (PR #70906)

[via llvm-commits]

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@@ -735,6 +746,9 @@ class PassBuilder {
       MachineFunctionAnalysisRegistrationCallbacks;
   SmallVector<std::function<bool(StringRef, MachineFunctionPassManager &)>, 2>
       MachinePipelineParsingCallbacks;
+  SmallVector<
+      std::function<bool(StringRef, MachineFunctionPassManager &, bool)>, 2>
+      RegAllocPassParsingCallbacks;
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paperchalice wrote:

AMDGPU and RISCV, all regalloc passes are derived from `RegisterRegAllocBase`.

https://github.com/llvm/llvm-project/pull/70906