[llvm] GlobalISel needs fdiv 1 / sqrt(x) to rsq combine (PR #78673)

[Nick Anderson via llvm-commits]

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@@ -334,6 +336,19 @@ bool AMDGPUPostLegalizerCombinerImpl::matchRcpSqrtToRsq(
   return false;
 }
 
+void AMDGPUPostLegalizerCombinerImpl::applyOneFDivSqrtToRsq(
+    MachineInstr &MI, const Register &X) const {
+  // B.setInstrAndDebugLoc(MI);
+
+  Register Dst = MI.getOperand(0).getReg();
+
+  B.buildIntrinsic(Intrinsic::amdgcn_rsq, ArrayRef<Register>({Dst}))
+      .addUse(X)
+      .setMIFlags(MI.getFlags());
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nickleus27 wrote:

I have removed adding the flags since the initial review. Let me know what the final decision is so I can implement. Since I am trying to learn I would like to ask, what would be the potential harm of adding the flags?

https://github.com/llvm/llvm-project/pull/78673