[llvm] [RISCV] Add IsSignExtendingOpW to amocas.w. (PR #79351)

[Craig Topper via llvm-commits]

================
@@ -2,11 +2,15 @@
 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefix=RV32I %s
 ; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
-; RUN:   | FileCheck -check-prefix=RV32IA %s
+; RUN:   | FileCheck -check-prefixes=RV32IA,RV32IA-NOZACAS %s
+; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-zacas -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS %s
----------------
topperc wrote:

Because RV32IA is used by the +a and the +a,+experimental-zacas run lines as a common prefix.

https://github.com/llvm/llvm-project/pull/79351