[llvm] GlobalISel needs fdiv 1 / sqrt(x) to rsq combine (PR #78673)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 24 02:58:07 PST 2024


================
@@ -334,6 +336,19 @@ bool AMDGPUPostLegalizerCombinerImpl::matchRcpSqrtToRsq(
   return false;
 }
 
+void AMDGPUPostLegalizerCombinerImpl::applyOneFDivSqrtToRsq(
+    MachineInstr &MI, const Register &X) const {
+  // B.setInstrAndDebugLoc(MI);
+
+  Register Dst = MI.getOperand(0).getReg();
+
+  B.buildIntrinsic(Intrinsic::amdgcn_rsq, ArrayRef<Register>({Dst}))
+      .addUse(X)
+      .setMIFlags(MI.getFlags());
----------------
jayfoad wrote:

Seems reasonable to me to copy the flags. Contracting again should be allowed (but I don't know if it would ever happen in practice for rsq). Other flags like nnan and ninf could perhaps be useful too. If you wanted to get really clever you should union (or intersect?) the flags from the two operations being contracted.

https://github.com/llvm/llvm-project/pull/78673


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