[llvm] f7b61f8 - [X86][CodeGen] Transform NDD SUB to CMP if dest reg is dead (#79135)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 23 21:58:52 PST 2024
Author: Shengchen Kan
Date: 2024-01-24T13:58:48+08:00
New Revision: f7b61f81b5c4710fe089c357ef57ac0afcaf4b56
URL: https://github.com/llvm/llvm-project/commit/f7b61f81b5c4710fe089c357ef57ac0afcaf4b56
DIFF: https://github.com/llvm/llvm-project/commit/f7b61f81b5c4710fe089c357ef57ac0afcaf4b56.diff
LOG: [X86][CodeGen] Transform NDD SUB to CMP if dest reg is dead (#79135)
Added:
Modified:
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/test/CodeGen/X86/apx/adc.ll
llvm/test/CodeGen/X86/apx/sbb.ll
llvm/test/CodeGen/X86/apx/sub.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index d6f9aa6d6acec09..c5c6d5a67c16e14 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -2268,72 +2268,44 @@ MachineInstr *X86InstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,
MachineInstr *WorkingMI = nullptr;
unsigned Opc = MI.getOpcode();
+#define CASE_ND(OP) \
+ case X86::OP: \
+ case X86::OP##_ND:
+
switch (Opc) {
// SHLD B, C, I <-> SHRD C, B, (BitWidth - I)
- case X86::SHRD16rri8:
- case X86::SHLD16rri8:
- case X86::SHRD32rri8:
- case X86::SHLD32rri8:
- case X86::SHRD64rri8:
- case X86::SHLD64rri8:
- case X86::SHRD16rri8_ND:
- case X86::SHLD16rri8_ND:
- case X86::SHRD32rri8_ND:
- case X86::SHLD32rri8_ND:
- case X86::SHRD64rri8_ND:
- case X86::SHLD64rri8_ND: {
+ CASE_ND(SHRD16rri8)
+ CASE_ND(SHLD16rri8)
+ CASE_ND(SHRD32rri8)
+ CASE_ND(SHLD32rri8)
+ CASE_ND(SHRD64rri8)
+ CASE_ND(SHLD64rri8) {
unsigned Size;
switch (Opc) {
default:
llvm_unreachable("Unreachable!");
- case X86::SHRD16rri8:
- Size = 16;
- Opc = X86::SHLD16rri8;
- break;
- case X86::SHLD16rri8:
- Size = 16;
- Opc = X86::SHRD16rri8;
- break;
- case X86::SHRD32rri8:
- Size = 32;
- Opc = X86::SHLD32rri8;
- break;
- case X86::SHLD32rri8:
- Size = 32;
- Opc = X86::SHRD32rri8;
- break;
- case X86::SHRD64rri8:
- Size = 64;
- Opc = X86::SHLD64rri8;
- break;
- case X86::SHLD64rri8:
- Size = 64;
- Opc = X86::SHRD64rri8;
- break;
- case X86::SHRD16rri8_ND:
- Size = 16;
- Opc = X86::SHLD16rri8_ND;
- break;
- case X86::SHLD16rri8_ND:
- Size = 16;
- Opc = X86::SHRD16rri8_ND;
- break;
- case X86::SHRD32rri8_ND:
- Size = 32;
- Opc = X86::SHLD32rri8_ND;
- break;
- case X86::SHLD32rri8_ND:
- Size = 32;
- Opc = X86::SHRD32rri8_ND;
- break;
- case X86::SHRD64rri8_ND:
- Size = 64;
- Opc = X86::SHLD64rri8_ND;
- break;
- case X86::SHLD64rri8_ND:
- Size = 64;
- Opc = X86::SHRD64rri8_ND;
- break;
+#define FROM_TO_SIZE(A, B, S) \
+ case X86::A: \
+ Opc = X86::B; \
+ Size = S; \
+ break; \
+ case X86::A##_ND: \
+ Opc = X86::B##_ND; \
+ Size = S; \
+ break; \
+ case X86::B: \
+ Opc = X86::A; \
+ Size = S; \
+ break; \
+ case X86::B##_ND: \
+ Opc = X86::A##_ND; \
+ Size = S; \
+ break;
+
+ FROM_TO_SIZE(SHRD16rri8, SHLD16rri8, 16)
+ FROM_TO_SIZE(SHRD32rri8, SHLD32rri8, 32)
+ FROM_TO_SIZE(SHRD64rri8, SHLD64rri8, 64)
+#undef FROM_TO_SIZE
}
WorkingMI = CloneIfNew(MI);
WorkingMI->setDesc(get(Opc));
@@ -4684,28 +4656,28 @@ bool X86InstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg,
}
return true;
// A SUB can be used to perform comparison.
- case X86::SUB64rm:
- case X86::SUB32rm:
- case X86::SUB16rm:
- case X86::SUB8rm:
+ CASE_ND(SUB64rm)
+ CASE_ND(SUB32rm)
+ CASE_ND(SUB16rm)
+ CASE_ND(SUB8rm)
SrcReg = MI.getOperand(1).getReg();
SrcReg2 = 0;
CmpMask = 0;
CmpValue = 0;
return true;
- case X86::SUB64rr:
- case X86::SUB32rr:
- case X86::SUB16rr:
- case X86::SUB8rr:
+ CASE_ND(SUB64rr)
+ CASE_ND(SUB32rr)
+ CASE_ND(SUB16rr)
+ CASE_ND(SUB8rr)
SrcReg = MI.getOperand(1).getReg();
SrcReg2 = MI.getOperand(2).getReg();
CmpMask = 0;
CmpValue = 0;
return true;
- case X86::SUB64ri32:
- case X86::SUB32ri:
- case X86::SUB16ri:
- case X86::SUB8ri:
+ CASE_ND(SUB64ri32)
+ CASE_ND(SUB32ri)
+ CASE_ND(SUB16ri)
+ CASE_ND(SUB8ri)
SrcReg = MI.getOperand(1).getReg();
SrcReg2 = 0;
if (MI.getOperand(2).isImm()) {
@@ -4750,10 +4722,10 @@ bool X86InstrInfo::isRedundantFlagInstr(const MachineInstr &FlagI,
case X86::CMP32rr:
case X86::CMP16rr:
case X86::CMP8rr:
- case X86::SUB64rr:
- case X86::SUB32rr:
- case X86::SUB16rr:
- case X86::SUB8rr: {
+ CASE_ND(SUB64rr)
+ CASE_ND(SUB32rr)
+ CASE_ND(SUB16rr)
+ CASE_ND(SUB8rr) {
Register OISrcReg;
Register OISrcReg2;
int64_t OIMask;
@@ -4775,10 +4747,10 @@ bool X86InstrInfo::isRedundantFlagInstr(const MachineInstr &FlagI,
case X86::CMP32ri:
case X86::CMP16ri:
case X86::CMP8ri:
- case X86::SUB64ri32:
- case X86::SUB32ri:
- case X86::SUB16ri:
- case X86::SUB8ri:
+ CASE_ND(SUB64ri32)
+ CASE_ND(SUB32ri)
+ CASE_ND(SUB16ri)
+ CASE_ND(SUB8ri)
case X86::TEST64rr:
case X86::TEST32rr:
case X86::TEST16rr:
@@ -5110,62 +5082,42 @@ bool X86InstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
switch (CmpInstr.getOpcode()) {
default:
break;
- case X86::SUB64ri32:
- case X86::SUB32ri:
- case X86::SUB16ri:
- case X86::SUB8ri:
- case X86::SUB64rm:
- case X86::SUB32rm:
- case X86::SUB16rm:
- case X86::SUB8rm:
- case X86::SUB64rr:
- case X86::SUB32rr:
- case X86::SUB16rr:
- case X86::SUB8rr: {
+ CASE_ND(SUB64ri32)
+ CASE_ND(SUB32ri)
+ CASE_ND(SUB16ri)
+ CASE_ND(SUB8ri)
+ CASE_ND(SUB64rm)
+ CASE_ND(SUB32rm)
+ CASE_ND(SUB16rm)
+ CASE_ND(SUB8rm)
+ CASE_ND(SUB64rr)
+ CASE_ND(SUB32rr)
+ CASE_ND(SUB16rr)
+ CASE_ND(SUB8rr) {
if (!MRI->use_nodbg_empty(CmpInstr.getOperand(0).getReg()))
return false;
// There is no use of the destination register, we can replace SUB with CMP.
unsigned NewOpcode = 0;
+#define FROM_TO(A, B) \
+ CASE_ND(A) NewOpcode = X86::B; \
+ break;
switch (CmpInstr.getOpcode()) {
default:
llvm_unreachable("Unreachable!");
- case X86::SUB64rm:
- NewOpcode = X86::CMP64rm;
- break;
- case X86::SUB32rm:
- NewOpcode = X86::CMP32rm;
- break;
- case X86::SUB16rm:
- NewOpcode = X86::CMP16rm;
- break;
- case X86::SUB8rm:
- NewOpcode = X86::CMP8rm;
- break;
- case X86::SUB64rr:
- NewOpcode = X86::CMP64rr;
- break;
- case X86::SUB32rr:
- NewOpcode = X86::CMP32rr;
- break;
- case X86::SUB16rr:
- NewOpcode = X86::CMP16rr;
- break;
- case X86::SUB8rr:
- NewOpcode = X86::CMP8rr;
- break;
- case X86::SUB64ri32:
- NewOpcode = X86::CMP64ri32;
- break;
- case X86::SUB32ri:
- NewOpcode = X86::CMP32ri;
- break;
- case X86::SUB16ri:
- NewOpcode = X86::CMP16ri;
- break;
- case X86::SUB8ri:
- NewOpcode = X86::CMP8ri;
- break;
+ FROM_TO(SUB64rm, CMP64rm)
+ FROM_TO(SUB32rm, CMP32rm)
+ FROM_TO(SUB16rm, CMP16rm)
+ FROM_TO(SUB8rm, CMP8rm)
+ FROM_TO(SUB64rr, CMP64rr)
+ FROM_TO(SUB32rr, CMP32rr)
+ FROM_TO(SUB16rr, CMP16rr)
+ FROM_TO(SUB8rr, CMP8rr)
+ FROM_TO(SUB64ri32, CMP64ri32)
+ FROM_TO(SUB32ri, CMP32ri)
+ FROM_TO(SUB16ri, CMP16ri)
+ FROM_TO(SUB8ri, CMP8ri)
}
+#undef FROM_TO
CmpInstr.setDesc(get(NewOpcode));
CmpInstr.removeOperand(0);
// Mutating this instruction invalidates any debug data associated with it.
diff --git a/llvm/test/CodeGen/X86/apx/adc.ll b/llvm/test/CodeGen/X86/apx/adc.ll
index e8657acea8ad420..342d64e6bca009c 100644
--- a/llvm/test/CodeGen/X86/apx/adc.ll
+++ b/llvm/test/CodeGen/X86/apx/adc.ll
@@ -4,7 +4,7 @@
define i8 @adc8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: adc8rr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
; CHECK-NEXT: adcb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x10,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = add i8 %a, %b
@@ -17,7 +17,7 @@ define i8 @adc8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
define i16 @adc16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16rr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
; CHECK-NEXT: adcw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x11,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = add i16 %a, %b
@@ -30,7 +30,7 @@ define i16 @adc16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind {
define i32 @adc32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32rr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
; CHECK-NEXT: adcl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x11,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = add i32 %a, %b
@@ -43,7 +43,7 @@ define i32 @adc32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
define i64 @adc64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64rr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
; CHECK-NEXT: adcq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x11,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = add i64 %a, %b
@@ -56,7 +56,7 @@ define i64 @adc64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: adc8rm:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
; CHECK-NEXT: adcb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x12,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i8, ptr %ptr
@@ -70,7 +70,7 @@ define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16rm:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
; CHECK-NEXT: adcw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x13,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i16, ptr %ptr
@@ -84,7 +84,7 @@ define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32rm:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
; CHECK-NEXT: adcl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x13,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i32, ptr %ptr
@@ -98,7 +98,7 @@ define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64rm:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
; CHECK-NEXT: adcq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x13,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i64, ptr %ptr
@@ -112,7 +112,7 @@ define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0x00,0x00]
; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -127,7 +127,7 @@ define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind {
define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
; CHECK-NEXT: adcl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x7b,0x00,0x00,0x00]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = add i32 %a, 123
@@ -140,7 +140,7 @@ define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind {
define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
; CHECK-NEXT: adcq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xd7,0x7b,0x00,0x00,0x00]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = add i64 %a, 123
@@ -153,7 +153,7 @@ define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind {
define i8 @adc8ri(i8 %a, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: adc8ri:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2]
+; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
; CHECK-NEXT: adcb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xd7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = add i8 %a, 123
@@ -166,7 +166,7 @@ define i8 @adc8ri(i8 %a, i8 %x, i8 %y) nounwind {
define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16ri:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0x00,0x00]
; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
; CHECK-NEXT: # imm = 0x4D2
@@ -182,7 +182,7 @@ define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind {
define i32 @adc32ri(i32 %a, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32ri:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
; CHECK-NEXT: adcl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -196,7 +196,7 @@ define i32 @adc32ri(i32 %a, i32 %x, i32 %y) nounwind {
define i64 @adc64ri(i64 %a, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64ri:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
; CHECK-NEXT: adcq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -210,7 +210,7 @@ define i64 @adc64ri(i64 %a, i64 %x, i64 %y) nounwind {
define i8 @adc8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: adc8mr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
; CHECK-NEXT: adcb %dil, (%rsi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x10,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i8, ptr %ptr
@@ -224,7 +224,7 @@ define i8 @adc8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
define i16 @adc16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16mr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
; CHECK-NEXT: adcw %di, (%rsi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x11,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i16, ptr %ptr
@@ -238,7 +238,7 @@ define i16 @adc16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
define i32 @adc32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32mr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
; CHECK-NEXT: adcl %edi, (%rsi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x11,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i32, ptr %ptr
@@ -252,7 +252,7 @@ define i32 @adc32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
define i64 @adc64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64mr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
; CHECK-NEXT: adcq %rdi, (%rsi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x11,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i64, ptr %ptr
@@ -266,7 +266,7 @@ define i64 @adc64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16mi8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00]
; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -282,7 +282,7 @@ define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32mi8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
; CHECK-NEXT: adcl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x17,0x7b,0x00,0x00,0x00]
; CHECK-NEXT: retq # encoding: [0xc3]
%a = load i32, ptr %ptr
@@ -296,7 +296,7 @@ define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64mi8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
; CHECK-NEXT: adcq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x17,0x7b,0x00,0x00,0x00]
; CHECK-NEXT: retq # encoding: [0xc3]
%a = load i64, ptr %ptr
@@ -310,7 +310,7 @@ define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
define i8 @adc8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: adc8mi:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2]
+; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
; CHECK-NEXT: adcb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x17,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
%a = load i8, ptr %ptr
@@ -324,7 +324,7 @@ define i8 @adc8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16mi:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00]
; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
; CHECK-NEXT: # imm = 0x4D2
@@ -341,7 +341,7 @@ define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
define i32 @adc32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32mi:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
; CHECK-NEXT: adcl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x17,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -356,7 +356,7 @@ define i32 @adc32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
define i64 @adc64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64mi:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
; CHECK-NEXT: adcq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x17,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -371,7 +371,7 @@ define i64 @adc64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
define void @adc8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: adc8mr_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
; CHECK-NEXT: adcb %dil, (%rsi) # encoding: [0x40,0x10,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i8, ptr %ptr
@@ -386,7 +386,7 @@ define void @adc8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
define void @adc16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16mr_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
; CHECK-NEXT: adcw %di, (%rsi) # encoding: [0x66,0x11,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i16, ptr %ptr
@@ -401,7 +401,7 @@ define void @adc16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
define void @adc32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32mr_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
; CHECK-NEXT: adcl %edi, (%rsi) # encoding: [0x11,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i32, ptr %ptr
@@ -416,7 +416,7 @@ define void @adc32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
define void @adc64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64mr_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
; CHECK-NEXT: adcq %rdi, (%rsi) # encoding: [0x48,0x11,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i64, ptr %ptr
@@ -431,7 +431,7 @@ define void @adc64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
define void @adc8mi_legacy(ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: adc8mi_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2]
+; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
; CHECK-NEXT: adcb $123, (%rdi) # encoding: [0x80,0x17,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
%a = load i8, ptr %ptr
@@ -446,7 +446,7 @@ define void @adc8mi_legacy(ptr %ptr, i8 %x, i8 %y) nounwind {
define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16mi_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00]
; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
; CHECK-NEXT: # imm = 0x4D2
@@ -464,7 +464,7 @@ define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind {
define void @adc32mi_legacy(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32mi_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
; CHECK-NEXT: adcl $123456, (%rdi) # encoding: [0x81,0x17,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -480,7 +480,7 @@ define void @adc32mi_legacy(ptr %ptr, i32 %x, i32 %y) nounwind {
define void @adc64mi_legacy(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64mi_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
; CHECK-NEXT: adcq $123456, (%rdi) # encoding: [0x48,0x81,0x17,0x40,0xe2,0x01,0x00]
; CHECK-NEXT: # imm = 0x1E240
; CHECK-NEXT: retq # encoding: [0xc3]
diff --git a/llvm/test/CodeGen/X86/apx/sbb.ll b/llvm/test/CodeGen/X86/apx/sbb.ll
index 755193588a7b014..778fea04b62b5f8 100644
--- a/llvm/test/CodeGen/X86/apx/sbb.ll
+++ b/llvm/test/CodeGen/X86/apx/sbb.ll
@@ -4,7 +4,7 @@
define i8 @sbb8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: sbb8rr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
; CHECK-NEXT: sbbb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x18,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = sub i8 %a, %b
@@ -17,7 +17,7 @@ define i8 @sbb8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
define i16 @sbb16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16rr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
; CHECK-NEXT: sbbw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x19,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = sub i16 %a, %b
@@ -30,7 +30,7 @@ define i16 @sbb16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind {
define i32 @sbb32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32rr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
; CHECK-NEXT: sbbl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x19,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = sub i32 %a, %b
@@ -43,7 +43,7 @@ define i32 @sbb32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
define i64 @sbb64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64rr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
; CHECK-NEXT: sbbq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x19,0xf7]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = sub i64 %a, %b
@@ -56,7 +56,7 @@ define i64 @sbb64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
define i8 @sbb8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: sbb8rm:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
; CHECK-NEXT: sbbb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x1a,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i8, ptr %ptr
@@ -70,7 +70,7 @@ define i8 @sbb8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
define i16 @sbb16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16rm:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
; CHECK-NEXT: sbbw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x1b,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i16, ptr %ptr
@@ -84,7 +84,7 @@ define i16 @sbb16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
define i32 @sbb32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32rm:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
; CHECK-NEXT: sbbl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x1b,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i32, ptr %ptr
@@ -98,7 +98,7 @@ define i32 @sbb32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
define i64 @sbb64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64rm:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
; CHECK-NEXT: sbbq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x1b,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i64, ptr %ptr
@@ -112,7 +112,7 @@ define i64 @sbb64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
define i16 @sbb16ri8(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
; CHECK-NEXT: sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xdf,0x00,0x00]
; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -127,7 +127,7 @@ define i16 @sbb16ri8(i16 %a, i16 %x, i16 %y) nounwind {
define i32 @sbb32ri8(i32 %a, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
; CHECK-NEXT: sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xdf,0x00,0x00,0x00,0x00]
; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -141,7 +141,7 @@ define i32 @sbb32ri8(i32 %a, i32 %x, i32 %y) nounwind {
define i64 @sbb64ri8(i64 %a, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
; CHECK-NEXT: sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xdf,0x00,0x00,0x00,0x00]
; CHECK-NEXT: addq $-123, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xc0,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -155,7 +155,7 @@ define i64 @sbb64ri8(i64 %a, i64 %x, i64 %y) nounwind {
define i8 @sbb8ri(i8 %a, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: sbb8ri:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2]
+; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
; CHECK-NEXT: sbbb $0, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xdf,0x00]
; CHECK-NEXT: addb $-123, %al # EVEX TO LEGACY Compression encoding: [0x04,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -169,7 +169,7 @@ define i8 @sbb8ri(i8 %a, i8 %x, i8 %y) nounwind {
define i16 @sbb16ri(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16ri:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
; CHECK-NEXT: sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xdf,0x00,0x00]
; CHECK-NEXT: addl $-1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0x2e,0xfb,0xff,0xff]
; CHECK-NEXT: # imm = 0xFB2E
@@ -185,7 +185,7 @@ define i16 @sbb16ri(i16 %a, i16 %x, i16 %y) nounwind {
define i32 @sbb32ri(i32 %a, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32ri:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
; CHECK-NEXT: sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xdf,0x00,0x00,0x00,0x00]
; CHECK-NEXT: addl $-123456, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
@@ -200,7 +200,7 @@ define i32 @sbb32ri(i32 %a, i32 %x, i32 %y) nounwind {
define i64 @sbb64ri(i64 %a, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64ri:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
; CHECK-NEXT: sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xdf,0x00,0x00,0x00,0x00]
; CHECK-NEXT: addq $-123456, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
@@ -215,7 +215,7 @@ define i64 @sbb64ri(i64 %a, i64 %x, i64 %y) nounwind {
define i8 @sbb8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: sbb8mr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
; CHECK-NEXT: sbbb %dil, (%rsi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x18,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i8, ptr %ptr
@@ -229,7 +229,7 @@ define i8 @sbb8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
define i16 @sbb16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16mr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
; CHECK-NEXT: sbbw %di, (%rsi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x19,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i16, ptr %ptr
@@ -243,7 +243,7 @@ define i16 @sbb16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
define i32 @sbb32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32mr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
; CHECK-NEXT: sbbl %edi, (%rsi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x19,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i32, ptr %ptr
@@ -257,7 +257,7 @@ define i32 @sbb32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
define i64 @sbb64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64mr:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
; CHECK-NEXT: sbbq %rdi, (%rsi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x19,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i64, ptr %ptr
@@ -271,7 +271,7 @@ define i64 @sbb64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
define i16 @sbb16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16mi8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
; CHECK-NEXT: sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x1f,0x00,0x00]
; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -287,7 +287,7 @@ define i16 @sbb16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
define i32 @sbb32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32mi8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
; CHECK-NEXT: sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x1f,0x00,0x00,0x00,0x00]
; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -302,7 +302,7 @@ define i32 @sbb32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
define i64 @sbb64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64mi8:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
; CHECK-NEXT: sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x1f,0x00,0x00,0x00,0x00]
; CHECK-NEXT: addq $-123, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xc0,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -317,7 +317,7 @@ define i64 @sbb64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
define i8 @sbb8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: sbb8mi:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2]
+; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
; CHECK-NEXT: sbbb $0, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x1f,0x00]
; CHECK-NEXT: addb $-123, %al # EVEX TO LEGACY Compression encoding: [0x04,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -332,7 +332,7 @@ define i8 @sbb8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
define i16 @sbb16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16mi:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
; CHECK-NEXT: sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x1f,0x00,0x00]
; CHECK-NEXT: addl $-1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0x2e,0xfb,0xff,0xff]
; CHECK-NEXT: # imm = 0xFB2E
@@ -349,7 +349,7 @@ define i16 @sbb16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
define i32 @sbb32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32mi:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2]
; CHECK-NEXT: sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x1f,0x00,0x00,0x00,0x00]
; CHECK-NEXT: addl $-123456, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
@@ -365,7 +365,7 @@ define i32 @sbb32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
define i64 @sbb64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64mi:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
+; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
; CHECK-NEXT: sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x1f,0x00,0x00,0x00,0x00]
; CHECK-NEXT: addq $-123456, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
@@ -381,7 +381,7 @@ define i64 @sbb64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
define void @sbb8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: sbb8mr_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1]
+; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
; CHECK-NEXT: sbbb %dil, (%rsi) # encoding: [0x40,0x18,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i8, ptr %ptr
@@ -396,7 +396,7 @@ define void @sbb8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
define void @sbb16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16mr_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
; CHECK-NEXT: sbbw %di, (%rsi) # encoding: [0x66,0x19,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i16, ptr %ptr
@@ -411,7 +411,7 @@ define void @sbb16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
define void @sbb32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32mr_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
; CHECK-NEXT: sbbl %edi, (%rsi) # encoding: [0x19,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i32, ptr %ptr
@@ -426,7 +426,7 @@ define void @sbb32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
define void @sbb64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64mr_legacy:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1]
+; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
; CHECK-NEXT: sbbq %rdi, (%rsi) # encoding: [0x48,0x19,0x3e]
; CHECK-NEXT: retq # encoding: [0xc3]
%b = load i64, ptr %ptr
diff --git a/llvm/test/CodeGen/X86/apx/sub.ll b/llvm/test/CodeGen/X86/apx/sub.ll
index aaf45c6b499c2b9..c8e48dbb981af19 100644
--- a/llvm/test/CodeGen/X86/apx/sub.ll
+++ b/llvm/test/CodeGen/X86/apx/sub.ll
@@ -500,8 +500,8 @@ declare void @f()
define void @sub64ri_reloc(i64 %val) {
; CHECK-LABEL: sub64ri_reloc:
; CHECK: # %bb.0:
-; CHECK-NEXT: subq $val, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xef,A,A,A,A]
-; CHECK-NEXT: # fixup A - offset: 6, value: val, kind: reloc_signed_4byte
+; CHECK-NEXT: cmpq $val, %rdi # encoding: [0x48,0x81,0xff,A,A,A,A]
+; CHECK-NEXT: # fixup A - offset: 3, value: val, kind: reloc_signed_4byte
; CHECK-NEXT: jbe .LBB41_2 # encoding: [0x76,A]
; CHECK-NEXT: # fixup A - offset: 1, value: .LBB41_2-1, kind: FK_PCRel_1
; CHECK-NEXT: # %bb.1: # %t
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