[llvm] [X86] Support APX promoted RAO-INT and MOVBE instructions (PR #77431)

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 23 18:50:30 PST 2024


================
@@ -25,21 +25,30 @@ def X86rao_xor  : SDNode<"X86ISD::AXOR", SDTRAOBinaryArith,
 def X86rao_and  : SDNode<"X86ISD::AAND", SDTRAOBinaryArith,
                          [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
 
-multiclass RAOINT_BASE<string OpcodeStr> {
+multiclass RAOINT_BASE<string m, string suffix = ""> {
   let Predicates = [HasRAOINT] in
-    def 32mr : I<0xfc, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
-                 !strconcat("a", OpcodeStr, "{l}\t{$src, $dst|$dst, $src}"),
-                 [(!cast<SDNode>("X86rao_" # OpcodeStr) addr:$dst, GR32:$src)]>,
-               Sched<[WriteALURMW]>;
+    def 32mr#suffix : I<0xfc, MRMDestMem, (outs), (ins i32mem:$src1, GR32:$src2),
+                        !strconcat("a", m, "{l}\t", binop_args),
----------------
KanRobert wrote:

You will find the difference if you check the instruction in MCA test

https://github.com/llvm/llvm-project/pull/77431


More information about the llvm-commits mailing list