[llvm] [PowerPC] Spill non-volatile registers required for traceback table (PR #71115)

Stefan Pintilie via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 22 12:25:46 PST 2024


================
@@ -0,0 +1,300 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mcpu=pwr9 -mattr=+altivec -verify-machineinstrs --vec-extabi \
+; RUN:   -mtriple=powerpc-unknown-aix < %s  | FileCheck %s --check-prefix 32BIT
----------------
stefanp-ibm wrote:

nit:
Please add `-ppc-asm-full-reg-names -ppc-vsr-nums-as-vr` to the run lines. It makes the test easier to read.

https://github.com/llvm/llvm-project/pull/71115


More information about the llvm-commits mailing list